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intr.h revision 1.21
      1 /* 	$NetBSD: intr.h,v 1.21 2006/12/21 15:55:25 yamt Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 Matt Thomas.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. The name of the company nor the name of the author may be used to
     16  *    endorse or promote products derived from this software without specific
     17  *    prior written permission.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
     20  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     21  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     22  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     23  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29  * SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _VAX_INTR_H_
     33 #define _VAX_INTR_H_
     34 
     35 #include <sys/queue.h>
     36 
     37 /* Define the various Interrupt Priority Levels */
     38 
     39 /* Interrupt Priority Levels are not mutually exclusive. */
     40 
     41 /* Hardware interrupt levels are 16 (0x10) thru 31 (0x1f)
     42  */
     43 #define IPL_HIGH	0x1f	/* high -- blocks all interrupts */
     44 #define IPL_CLOCK	0x18	/* clock */
     45 #define IPL_STATCLOCK	IPL_CLOCK
     46 #define IPL_UBA		0x17	/* unibus adapters */
     47 #define IPL_VM		0x17	/* memory allocation */
     48 #define IPL_NET		0x16	/* network */
     49 #define IPL_BIO		0x15	/* block I/O */
     50 #define IPL_TTY		0x15	/* terminal */
     51 #define IPL_AUDIO	0x15	/* audio */
     52 #define IPL_IPI		0x14	/* interprocessor interrupt */
     53 #define IPL_CONSMEDIA	0x14	/* console media */
     54 
     55 /* Software interrupt level s are 0 (0x00) thru 15 (0x0f)
     56  */
     57 #define IPL_SOFTDDB	0x0f	/* used by DDB on VAX */
     58 #define IPL_SOFTSERIAL	0x0d	/* soft serial */
     59 #define IPL_SOFTNET	0x0c	/* soft network */
     60 #define IPL_SOFTCLOCK	0x08
     61 #define IPL_NONE	0x00
     62 
     63 /* Misc
     64  */
     65 
     66 #define	IPL_SCHED	IPL_HIGH
     67 #define	IPL_LOCK	IPL_HIGH
     68 
     69 #define IPL_LEVELS	32
     70 
     71 #define IST_UNUSABLE	-1	/* interrupt cannot be used */
     72 #define IST_NONE	0	/* none (dummy) */
     73 #define IST_PULSE	1	/* pulsed */
     74 #define IST_EDGE	2	/* edge-triggered */
     75 #define IST_LEVEL	3	/* level-triggered */
     76 
     77 
     78 #ifdef _KERNEL
     79 #ifndef __lint__
     80 #define splx(reg)						\
     81 ({								\
     82 	register int __val;					\
     83 	__asm volatile ("mfpr $0x12,%0;mtpr %1,$0x12"		\
     84 				: "=&g" (__val)			\
     85 				: "g" (reg));			\
     86 	__val;							\
     87 })
     88 
     89 #define _splset(reg)						\
     90 ((void)({							\
     91 	__asm volatile ("mtpr %0,$0x12"			\
     92 				: 				\
     93 				: "g" (reg));			\
     94 }))
     95 
     96 typedef int ipl_t;
     97 typedef struct {
     98 	ipl_t _ipl;
     99 } ipl_cookie_t;
    100 
    101 static inline ipl_cookie_t
    102 makeiplcookie(ipl_t ipl)
    103 {
    104 
    105 	return (ipl_cookie_t){._ipl = ipl};
    106 }
    107 
    108 static inline int
    109 splraiseipl(ipl_cookie_t icookie)
    110 {
    111 	register int __val;
    112 	int newipl = icookie._ipl;
    113 
    114 	__asm volatile ("mfpr $0x12,%0" : "=&g" (__val) : );
    115 	if (newipl > __val) {
    116 		_splset(newipl);
    117 	}
    118 	return __val;
    119 }
    120 
    121 #define _setsirr(reg)						\
    122 do {								\
    123 	__asm volatile ("mtpr %0,$0x14"			\
    124 				:				\
    125 				: "g" (reg));			\
    126 } while (0)
    127 #endif
    128 
    129 #define spl0()		_splset(IPL_NONE)		/* IPL00 */
    130 #define spllowersoftclock() _splset(IPL_SOFTCLOCK)	/* IPL08 */
    131 #define splddb()	splraiseipl(makeiplcookie(IPL_SOFTDDB)) /* IPL0F */
    132 #define splconsmedia()	splraiseipl(makeiplcookie(IPL_CONSMEDIA)) /* IPL14 */
    133 
    134 #include <sys/spl.h>
    135 
    136 /* These are better to use when playing with VAX buses */
    137 #define	spluba()	splraiseipl(makeiplcookie(IPL_UBA)) /* IPL17 */
    138 #define spl4()		splx(0x14)
    139 #define spl5()		splx(0x15)
    140 #define spl6()		splx(0x16)
    141 #define spl7()		splx(0x17)
    142 
    143 /* schedule software interrupts
    144  */
    145 #define setsoftddb()	_setsirr(IPL_SOFTDDB)
    146 #define setsoftserial()	_setsirr(IPL_SOFTSERIAL)
    147 #define setsoftnet()	_setsirr(IPL_SOFTNET)
    148 
    149 #if !defined(_LOCORE)
    150 LIST_HEAD(sh_head, softintr_handler);
    151 
    152 struct softintr_head {
    153 	int shd_ipl;
    154 	struct sh_head shd_intrs;
    155 };
    156 
    157 struct softintr_handler {
    158 	struct softintr_head *sh_head;
    159 	LIST_ENTRY(softintr_handler) sh_link;
    160 	void (*sh_func)(void *);
    161 	void *sh_arg;
    162 	int sh_pending;
    163 };
    164 
    165 extern void *softintr_establish(int, void (*)(void *), void *);
    166 extern void softintr_disestablish(void *);
    167 
    168 static __inline void
    169 softintr_schedule(void *arg)
    170 {
    171 	struct softintr_handler * const sh = arg;
    172 	sh->sh_pending = 1;
    173 	_setsirr(sh->sh_head->shd_ipl);
    174 }
    175 #endif /* _LOCORE */
    176 #endif /* _KERNEL */
    177 #endif	/* _VAX_INTR_H */
    178