intr.h revision 1.22 1 /* $NetBSD: intr.h,v 1.22 2007/02/16 01:34:02 matt Exp $ */
2
3 /*
4 * Copyright (c) 1998 Matt Thomas.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the company nor the name of the author may be used to
16 * endorse or promote products derived from this software without specific
17 * prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32 #ifndef _VAX_INTR_H_
33 #define _VAX_INTR_H_
34
35 #include <sys/queue.h>
36 #include <machine/mtpr.h>
37
38 /* Define the various Interrupt Priority Levels */
39
40 /* Interrupt Priority Levels are not mutually exclusive. */
41
42 /* Hardware interrupt levels are 16 (0x10) thru 31 (0x1f)
43 */
44 #define IPL_HIGH 0x1f /* high -- blocks all interrupts */
45 #define IPL_CLOCK 0x18 /* clock */
46 #define IPL_STATCLOCK IPL_CLOCK
47 #define IPL_UBA 0x17 /* unibus adapters */
48 #define IPL_VM 0x17 /* memory allocation */
49 #define IPL_NET 0x16 /* network */
50 #define IPL_BIO 0x15 /* block I/O */
51 #define IPL_TTY 0x15 /* terminal */
52 #define IPL_AUDIO 0x15 /* audio */
53 #define IPL_IPI 0x14 /* interprocessor interrupt */
54 #define IPL_CONSMEDIA 0x14 /* console media */
55
56 /* Software interrupt level s are 0 (0x00) thru 15 (0x0f)
57 */
58 #define IPL_SOFTDDB 0x0f /* used by DDB on VAX */
59 #define IPL_SOFTSERIAL 0x0d /* soft serial */
60 #define IPL_SOFTNET 0x0c /* soft network */
61 #define IPL_SOFTCLOCK 0x08
62 #define IPL_NONE 0x00
63
64 /* Misc
65 */
66
67 #define IPL_SCHED IPL_HIGH
68 #define IPL_LOCK IPL_HIGH
69
70 #define IPL_LEVELS 32
71
72 #define IST_UNUSABLE -1 /* interrupt cannot be used */
73 #define IST_NONE 0 /* none (dummy) */
74 #define IST_PULSE 1 /* pulsed */
75 #define IST_EDGE 2 /* edge-triggered */
76 #define IST_LEVEL 3 /* level-triggered */
77
78
79 #ifdef _KERNEL
80 typedef int ipl_t;
81
82 static inline ipl_t
83 splx(ipl_t new_ipl)
84 {
85 ipl_t old_ipl = mfpr(PR_IPL);
86 mtpr(new_ipl, PR_IPL);
87 return old_ipl;
88 }
89
90 static inline void
91 _splset(ipl_t ipl)
92 {
93 mtpr(ipl, PR_IPL);
94 }
95
96 typedef struct {
97 ipl_t _ipl;
98 } ipl_cookie_t;
99
100 static inline ipl_cookie_t
101 makeiplcookie(ipl_t ipl)
102 {
103
104 return (ipl_cookie_t){._ipl = ipl};
105 }
106
107 static inline int
108 splraiseipl(ipl_cookie_t icookie)
109 {
110 register ipl_t __val;
111 ipl_t newipl = icookie._ipl;
112
113 __asm volatile ("mfpr %1,%0" : "=&g" (__val) : "g" (PR_IPL));
114 if (newipl > __val) {
115 _splset(newipl);
116 }
117 return __val;
118 }
119
120 #define _setsirr(reg) mtpr((reg), PR_SIRR)
121
122 #define spl0() _splset(IPL_NONE) /* IPL00 */
123 #define spllowersoftclock() _splset(IPL_SOFTCLOCK) /* IPL08 */
124 #define splddb() splraiseipl(makeiplcookie(IPL_SOFTDDB)) /* IPL0F */
125 #define splconsmedia() splraiseipl(makeiplcookie(IPL_CONSMEDIA)) /* IPL14 */
126
127 #include <sys/spl.h>
128
129 /* These are better to use when playing with VAX buses */
130 #define spluba() splraiseipl(makeiplcookie(IPL_UBA)) /* IPL17 */
131 #define spl4() splx(0x14)
132 #define spl5() splx(0x15)
133 #define spl6() splx(0x16)
134 #define spl7() splx(0x17)
135
136 /* schedule software interrupts
137 */
138 #define setsoftddb() _setsirr(IPL_SOFTDDB)
139 #define setsoftserial() _setsirr(IPL_SOFTSERIAL)
140 #define setsoftnet() _setsirr(IPL_SOFTNET)
141
142 #if !defined(_LOCORE)
143 LIST_HEAD(sh_head, softintr_handler);
144
145 struct softintr_head {
146 int shd_ipl;
147 struct sh_head shd_intrs;
148 };
149
150 struct softintr_handler {
151 struct softintr_head *sh_head;
152 LIST_ENTRY(softintr_handler) sh_link;
153 void (*sh_func)(void *);
154 void *sh_arg;
155 int sh_pending;
156 };
157
158 extern void *softintr_establish(int, void (*)(void *), void *);
159 extern void softintr_disestablish(void *);
160
161 static __inline void
162 softintr_schedule(void *arg)
163 {
164 struct softintr_handler * const sh = arg;
165 sh->sh_pending = 1;
166 _setsirr(sh->sh_head->shd_ipl);
167 }
168 #endif /* _LOCORE */
169 #endif /* _KERNEL */
170 #endif /* _VAX_INTR_H */
171