ka670.h revision 1.3 1 1.3 matt /* $NetBSD: ka670.h,v 1.3 2002/12/01 21:21:45 matt Exp $ */
2 1.1 ragge /*
3 1.1 ragge * Copyright (c) 1999 Ludd, University of Lule}, Sweden.
4 1.1 ragge * All rights reserved.
5 1.1 ragge *
6 1.1 ragge * This code is derived from software contributed to Ludd by Bertram Barth.
7 1.1 ragge *
8 1.1 ragge * Redistribution and use in source and binary forms, with or without
9 1.1 ragge * modification, are permitted provided that the following conditions
10 1.1 ragge * are met:
11 1.1 ragge * 1. Redistributions of source code must retain the above copyright
12 1.1 ragge * notice, this list of conditions and the following disclaimer.
13 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 ragge * notice, this list of conditions and the following disclaimer in the
15 1.1 ragge * documentation and/or other materials provided with the distribution.
16 1.1 ragge * 3. All advertising materials mentioning features or use of this software
17 1.1 ragge * must display the following acknowledgement:
18 1.2 ragge * This product includes software developed at Ludd, University of
19 1.2 ragge * Lule}, Sweden and its contributors.
20 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
21 1.1 ragge * derived from this software without specific prior written permission
22 1.1 ragge *
23 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.1 ragge */
34 1.1 ragge
35 1.1 ragge /*
36 1.1 ragge * Definitions for I/O addresses of
37 1.1 ragge *
38 1.1 ragge * VAX 4000/300 (KA670)
39 1.1 ragge */
40 1.3 matt #ifndef _VAX_KA670_H_
41 1.3 matt #define _VAX_KA670_H_
42 1.1 ragge
43 1.1 ragge #define KA670_SIDEX 0x20040004 /* SID extension register */
44 1.1 ragge #define KA670_IORESET 0x20020000 /* I/O Reset register */
45 1.1 ragge
46 1.1 ragge #define KA670_ROM_BASE 0x20040000 /* System module ROM */
47 1.1 ragge #define KA670_ROM_END 0x2007FFFF
48 1.1 ragge #define KA670_ROM_SIZE 0x40000
49 1.1 ragge
50 1.1 ragge /*
51 1.1 ragge * The following values refer to bits/bitfields within the 4 internal
52 1.1 ragge * registers controlling primary cache:
53 1.1 ragge * PR_PCTAG(124, tag-register) PR_PCIDX(125, index-register)
54 1.1 ragge * PR_PCERR(126, error-register) PR_PCSTS(127, status-register)
55 1.1 ragge */
56 1.1 ragge #define KA670_PCTAG_TAG 0x1FFFF800 /* bits 11-29 */
57 1.1 ragge #define KA670_PCTAG_PARITY 0x40000000
58 1.1 ragge #define KA670_PCTAG_VALID 0x80000000
59 1.1 ragge
60 1.1 ragge #define KA670_PCIDX_INDEX 0x000007F8 /* 0x100 Q-word entries */
61 1.1 ragge
62 1.1 ragge #define KA670_PCERR_ADDR 0x3FFFFFFF
63 1.1 ragge
64 1.1 ragge #define KA670_PCS_FORCEHIT 0x00000001 /* Force hit */
65 1.1 ragge #define KA670_PCS_ENABLE 0x00000002 /* Enable primary cache */
66 1.1 ragge #define KA670_PCS_FLUSH 0x00000004 /* Flush cache */
67 1.1 ragge #define KA670_PCS_REFRESH 0x00000008 /* Enable refresh */
68 1.1 ragge #define KA670_PCS_HIT 0x00000010 /* Cache hit */
69 1.1 ragge #define KA670_PCS_INTERRUPT 0x00000020 /* Interrupt pending */
70 1.1 ragge #define KA670_PCS_TRAP2 0x00000040 /* Trap while trap */
71 1.1 ragge #define KA670_PCS_TRAP1 0x00000080 /* Micro trap/machine check */
72 1.1 ragge #define KA670_PCS_TPERR 0x00000100 /* Tag parity error */
73 1.1 ragge #define KA670_PCS_DPERR 0x00000200 /* Dal data parity error */
74 1.1 ragge #define KA670_PCS_PPERR 0x00000400 /* P data parity error */
75 1.1 ragge #define KA670_PCS_BUSERR 0x00000800 /* Bus error */
76 1.1 ragge #define KA670_PCS_BCHIT 0x00001000 /* B cache hit */
77 1.1 ragge
78 1.1 ragge #define KA670_PCSTS_BITS \
79 1.1 ragge "\020\015BCHIT\014BUSERR\013PPERR\012DPERR\011TPERR\010TRAP1" \
80 1.1 ragge "\007TRAP2\006INTR\005HIT\004REFRESH\003FLUSH\002ENABLE\001FORCEHIT"
81 1.1 ragge
82 1.1 ragge #define KA670_BCSTS_BITS \
83 1.1 ragge "\020\015BCHIT\014BUSERR\013PPERR\012DPERR\011TPERR\010TRAP1" \
84 1.1 ragge "\007TRAP2\006INTR\005HIT\004REFRESH\003FLUSH\002ENABLE\001FORCEHIT"
85 1.1 ragge
86 1.1 ragge /*
87 1.1 ragge * Bits in PR_ACCS (Floating Point Accelerator Register)
88 1.1 ragge */
89 1.1 ragge #define KA670_ACCS_VECTOR (1<<0) /* Vector Unit Present */
90 1.1 ragge #define KA670_ACCS_FCHIP (1<<1) /* FPU chip present */
91 1.2 ragge #define KA670_ACCS_WEP (1<<31) /* Write Even Parity */
92 1.2 ragge
93 1.2 ragge /*
94 1.2 ragge * CPU-specific definitions for VAX 6000/400 (Calypso/XRP).
95 1.2 ragge */
96 1.2 ragge
97 1.2 ragge /* Rigel SSC definitions */
98 1.2 ragge #define RSSC_ADDR 0x20140000 /* Phys address */
99 1.2 ragge #define RSSC_CONFIG 0x10 /* Offset */
100 1.2 ragge #define RSSC_BUSCTRL 0x20 /* Offset */
101 1.2 ragge #define RSSC_OPORT 0x30 /* Offset */
102 1.2 ragge #define RSSC_IPORT 0x40 /* Offset */
103 1.2 ragge
104 1.3 matt #endif /* _VAX_KA670_H_ */
105