lock.h revision 1.11 1 1.11 matt /* $NetBSD: lock.h,v 1.11 2003/02/25 23:29:53 matt Exp $ */
2 1.1 ragge
3 1.1 ragge /*
4 1.1 ragge * Copyright (c) 2000 Ludd, University of Lule}, Sweden.
5 1.1 ragge * All rights reserved.
6 1.1 ragge *
7 1.1 ragge * Redistribution and use in source and binary forms, with or without
8 1.1 ragge * modification, are permitted provided that the following conditions
9 1.1 ragge * are met:
10 1.1 ragge * 1. Redistributions of source code must retain the above copyright
11 1.1 ragge * notice, this list of conditions and the following disclaimer.
12 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 ragge * notice, this list of conditions and the following disclaimer in the
14 1.1 ragge * documentation and/or other materials provided with the distribution.
15 1.1 ragge * 3. All advertising materials mentioning features or use of this software
16 1.1 ragge * must display the following acknowledgement:
17 1.1 ragge * This product includes software developed at Ludd, University of Lule}.
18 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
19 1.1 ragge * derived from this software without specific prior written permission
20 1.1 ragge *
21 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 ragge */
32 1.1 ragge
33 1.1 ragge #ifndef _VAX_LOCK_H_
34 1.1 ragge #define _VAX_LOCK_H_
35 1.11 matt
36 1.11 matt #ifdef _KERNEL
37 1.11 matt #include <machine/cpu.h>
38 1.11 matt #endif
39 1.3 ragge
40 1.6 ragge typedef __volatile int __cpu_simple_lock_t;
41 1.4 thorpej
42 1.6 ragge #define __SIMPLELOCK_LOCKED 1
43 1.6 ragge #define __SIMPLELOCK_UNLOCKED 0
44 1.3 ragge
45 1.2 thorpej static __inline void
46 1.4 thorpej __cpu_simple_lock_init(__cpu_simple_lock_t *alp)
47 1.1 ragge {
48 1.9 matt #ifdef _KERNEL
49 1.10 thorpej __asm__ __volatile ("movl %0,%%r1;jsb Sunlock"
50 1.6 ragge : /* No output */
51 1.6 ragge : "g"(alp)
52 1.6 ragge : "r1","cc","memory");
53 1.9 matt #else
54 1.9 matt __asm__ __volatile ("bbcci $0,%0,1f;1:"
55 1.6 ragge : /* No output */
56 1.9 matt : "m"(*alp)
57 1.9 matt : "cc");
58 1.6 ragge #endif
59 1.1 ragge }
60 1.1 ragge
61 1.7 ragge static __inline int
62 1.7 ragge __cpu_simple_lock_try(__cpu_simple_lock_t *alp)
63 1.7 ragge {
64 1.7 ragge int ret;
65 1.7 ragge
66 1.9 matt #ifdef _KERNEL
67 1.10 thorpej __asm__ __volatile ("movl %1,%%r1;jsb Slocktry;movl %%r0,%0"
68 1.7 ragge : "=&r"(ret)
69 1.7 ragge : "g"(alp)
70 1.7 ragge : "r0","r1","cc","memory");
71 1.9 matt #else
72 1.9 matt __asm__ __volatile ("clrl %0;bbssi $0,%1,1f;incl %0;1:"
73 1.7 ragge : "=&r"(ret)
74 1.9 matt : "m"(*alp)
75 1.9 matt : "cc");
76 1.7 ragge #endif
77 1.7 ragge
78 1.7 ragge return ret;
79 1.7 ragge }
80 1.7 ragge
81 1.9 matt #ifdef _KERNEL
82 1.8 ragge #define VAX_LOCK_CHECKS ((1 << IPI_SEND_CNCHAR) | (1 << IPI_DDB))
83 1.7 ragge #define __cpu_simple_lock(alp) \
84 1.9 matt do { \
85 1.7 ragge struct cpu_info *__ci = curcpu(); \
86 1.7 ragge \
87 1.7 ragge while (__cpu_simple_lock_try(alp) == 0) { \
88 1.7 ragge int __s; \
89 1.7 ragge \
90 1.8 ragge if (__ci->ci_ipimsgs & VAX_LOCK_CHECKS) { \
91 1.7 ragge __s = splipi(); \
92 1.7 ragge cpu_handle_ipi(); \
93 1.7 ragge splx(__s); \
94 1.7 ragge } \
95 1.7 ragge } \
96 1.9 matt } while (0)
97 1.9 matt #else
98 1.9 matt static __inline void
99 1.9 matt __cpu_simple_lock(__cpu_simple_lock_t *alp)
100 1.9 matt {
101 1.9 matt __asm__ __volatile ("1:bbssi $0,%0,1b"
102 1.9 matt : /* No outputs */
103 1.9 matt : "m"(*alp)
104 1.9 matt : "cc");
105 1.7 ragge }
106 1.9 matt #endif /* _KERNEL */
107 1.7 ragge
108 1.7 ragge #if 0
109 1.2 thorpej static __inline void
110 1.4 thorpej __cpu_simple_lock(__cpu_simple_lock_t *alp)
111 1.1 ragge {
112 1.7 ragge struct cpu_info *ci = curcpu();
113 1.7 ragge
114 1.7 ragge while (__cpu_simple_lock_try(alp) == 0) {
115 1.7 ragge int s;
116 1.7 ragge
117 1.7 ragge if (ci->ci_ipimsgs & IPI_SEND_CNCHAR) {
118 1.7 ragge s = splipi();
119 1.7 ragge cpu_handle_ipi();
120 1.7 ragge splx(s);
121 1.7 ragge }
122 1.7 ragge }
123 1.7 ragge
124 1.7 ragge #if 0
125 1.10 thorpej __asm__ __volatile ("movl %0,%%r1;jsb Slock"
126 1.6 ragge : /* No output */
127 1.6 ragge : "g"(alp)
128 1.6 ragge : "r0","r1","cc","memory");
129 1.7 ragge #endif
130 1.6 ragge #if 0
131 1.5 matt __asm__ __volatile ("1:;bbssi $0, %0, 1b"
132 1.1 ragge : /* No output */
133 1.5 matt : "m"(*alp));
134 1.6 ragge #endif
135 1.1 ragge }
136 1.7 ragge #endif
137 1.1 ragge
138 1.2 thorpej static __inline void
139 1.4 thorpej __cpu_simple_unlock(__cpu_simple_lock_t *alp)
140 1.1 ragge {
141 1.9 matt #ifdef _KERNEL
142 1.10 thorpej __asm__ __volatile ("movl %0,%%r1;jsb Sunlock"
143 1.6 ragge : /* No output */
144 1.6 ragge : "g"(alp)
145 1.6 ragge : "r1","cc","memory");
146 1.9 matt #else
147 1.9 matt __asm__ __volatile ("bbcci $0,%0,1f;1:"
148 1.6 ragge : /* No output */
149 1.9 matt : "m"(*alp)
150 1.9 matt : "cc");
151 1.6 ragge #endif
152 1.1 ragge }
153 1.1 ragge
154 1.6 ragge #if defined(MULTIPROCESSOR)
155 1.6 ragge /*
156 1.6 ragge * On the Vax, interprocessor interrupts can come in at device priority
157 1.6 ragge * level or lower. This can cause some problems while waiting for r/w
158 1.6 ragge * spinlocks from a high'ish priority level: IPIs that come in will not
159 1.6 ragge * be processed. This can lead to deadlock.
160 1.6 ragge *
161 1.6 ragge * This hook allows IPIs to be processed while a spinlock's interlock
162 1.6 ragge * is released.
163 1.6 ragge */
164 1.6 ragge #define SPINLOCK_SPIN_HOOK \
165 1.6 ragge do { \
166 1.6 ragge struct cpu_info *__ci = curcpu(); \
167 1.7 ragge int __s; \
168 1.6 ragge \
169 1.6 ragge if (__ci->ci_ipimsgs != 0) { \
170 1.6 ragge /* printf("CPU %lu has IPIs pending\n", \
171 1.6 ragge __ci->ci_cpuid); */ \
172 1.7 ragge __s = splipi(); \
173 1.6 ragge cpu_handle_ipi(); \
174 1.7 ragge splx(__s); \
175 1.6 ragge } \
176 1.6 ragge } while (0)
177 1.6 ragge #endif /* MULTIPROCESSOR */
178 1.1 ragge #endif /* _VAX_LOCK_H_ */
179