Home | History | Annotate | Line # | Download | only in include
lock.h revision 1.24
      1  1.24  christos /*	$NetBSD: lock.h,v 1.24 2007/02/26 01:33:41 christos Exp $	*/
      2   1.1     ragge 
      3   1.1     ragge /*
      4   1.1     ragge  * Copyright (c) 2000 Ludd, University of Lule}, Sweden.
      5   1.1     ragge  * All rights reserved.
      6   1.1     ragge  *
      7   1.1     ragge  * Redistribution and use in source and binary forms, with or without
      8   1.1     ragge  * modification, are permitted provided that the following conditions
      9   1.1     ragge  * are met:
     10   1.1     ragge  * 1. Redistributions of source code must retain the above copyright
     11   1.1     ragge  *    notice, this list of conditions and the following disclaimer.
     12   1.1     ragge  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1     ragge  *    notice, this list of conditions and the following disclaimer in the
     14   1.1     ragge  *    documentation and/or other materials provided with the distribution.
     15   1.1     ragge  * 3. All advertising materials mentioning features or use of this software
     16   1.1     ragge  *    must display the following acknowledgement:
     17   1.1     ragge  *     This product includes software developed at Ludd, University of Lule}.
     18   1.1     ragge  * 4. The name of the author may not be used to endorse or promote products
     19   1.1     ragge  *    derived from this software without specific prior written permission
     20   1.1     ragge  *
     21   1.1     ragge  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22   1.1     ragge  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23   1.1     ragge  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24   1.1     ragge  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25   1.1     ragge  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26   1.1     ragge  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27   1.1     ragge  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28   1.1     ragge  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29   1.1     ragge  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30   1.1     ragge  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31   1.1     ragge  */
     32   1.1     ragge 
     33   1.1     ragge #ifndef _VAX_LOCK_H_
     34   1.1     ragge #define _VAX_LOCK_H_
     35  1.11      matt 
     36  1.11      matt #ifdef _KERNEL
     37  1.13        he #ifdef _KERNEL_OPT
     38  1.12    martin #include "opt_multiprocessor.h"
     39  1.16        he #include <machine/intr.h>
     40  1.13        he #endif
     41  1.11      matt #include <machine/cpu.h>
     42  1.11      matt #endif
     43   1.3     ragge 
     44  1.24  christos static __inline void __cpu_simple_lock_init(__cpu_simple_lock_t *);
     45  1.24  christos static __inline void
     46  1.24  christos __cpu_simple_lock_init(__cpu_simple_lock_t *__alp)
     47   1.1     ragge {
     48   1.9      matt #ifdef _KERNEL
     49  1.20     perry 	__asm volatile ("movl %0,%%r1;jsb Sunlock"
     50   1.6     ragge 		: /* No output */
     51  1.24  christos 		: "g"(__alp)
     52   1.6     ragge 		: "r1","cc","memory");
     53   1.9      matt #else
     54  1.20     perry 	__asm volatile ("bbcci $0,%0,1f;1:"
     55   1.6     ragge 		: /* No output */
     56  1.24  christos 		: "m"(*__alp)
     57   1.9      matt 		: "cc");
     58   1.6     ragge #endif
     59   1.1     ragge }
     60   1.1     ragge 
     61  1.24  christos static __inline int __cpu_simple_lock_try(__cpu_simple_lock_t *);
     62  1.24  christos static __inline int
     63  1.24  christos __cpu_simple_lock_try(__cpu_simple_lock_t *__alp)
     64   1.7     ragge {
     65   1.7     ragge 	int ret;
     66   1.7     ragge 
     67   1.9      matt #ifdef _KERNEL
     68  1.20     perry 	__asm volatile ("movl %1,%%r1;jsb Slocktry;movl %%r0,%0"
     69   1.7     ragge 		: "=&r"(ret)
     70  1.24  christos 		: "g"(__alp)
     71   1.7     ragge 		: "r0","r1","cc","memory");
     72   1.9      matt #else
     73  1.20     perry 	__asm volatile ("clrl %0;bbssi $0,%1,1f;incl %0;1:"
     74   1.7     ragge 		: "=&r"(ret)
     75  1.24  christos 		: "m"(*__alp)
     76   1.9      matt 		: "cc");
     77   1.7     ragge #endif
     78   1.7     ragge 
     79   1.7     ragge 	return ret;
     80   1.7     ragge }
     81   1.7     ragge 
     82   1.9      matt #ifdef _KERNEL
     83   1.8     ragge #define	VAX_LOCK_CHECKS ((1 << IPI_SEND_CNCHAR) | (1 << IPI_DDB))
     84  1.24  christos #define	__cpu_simple_lock(__alp)					\
     85   1.9      matt do {									\
     86   1.7     ragge 	struct cpu_info *__ci = curcpu();				\
     87   1.7     ragge 									\
     88  1.24  christos 	while (__cpu_simple_lock_try(__alp) == 0) {			\
     89  1.24  christos 		int __s;						\
     90   1.7     ragge 									\
     91   1.8     ragge 		if (__ci->ci_ipimsgs & VAX_LOCK_CHECKS) {		\
     92  1.24  christos 			__s = splipi();				\
     93   1.7     ragge 			cpu_handle_ipi();				\
     94  1.24  christos 			splx(__s);					\
     95   1.7     ragge 		}							\
     96   1.7     ragge 	}								\
     97  1.24  christos } while (/*CONSTCOND*/0)
     98   1.9      matt #else
     99  1.24  christos static __inline void __cpu_simple_lock(__cpu_simple_lock_t *);
    100  1.24  christos static __inline void
    101  1.24  christos __cpu_simple_lock(__cpu_simple_lock_t *__alp)
    102   1.9      matt {
    103  1.20     perry 	__asm volatile ("1:bbssi $0,%0,1b"
    104   1.9      matt 		: /* No outputs */
    105  1.24  christos 		: "m"(*__alp)
    106   1.9      matt 		: "cc");
    107   1.7     ragge }
    108   1.9      matt #endif /* _KERNEL */
    109   1.7     ragge 
    110   1.7     ragge #if 0
    111  1.24  christos static __inline void __cpu_simple_lock(__cpu_simple_lock_t *);
    112  1.24  christos static __inline void
    113  1.24  christos __cpu_simple_lock(__cpu_simple_lock_t *__alp)
    114   1.1     ragge {
    115   1.7     ragge 	struct cpu_info *ci = curcpu();
    116   1.7     ragge 
    117  1.24  christos 	while (__cpu_simple_lock_try(__alp) == 0) {
    118   1.7     ragge 		int s;
    119   1.7     ragge 
    120   1.7     ragge 		if (ci->ci_ipimsgs & IPI_SEND_CNCHAR) {
    121   1.7     ragge 			s = splipi();
    122   1.7     ragge 			cpu_handle_ipi();
    123   1.7     ragge 			splx(s);
    124   1.7     ragge 		}
    125   1.7     ragge 	}
    126   1.7     ragge 
    127   1.7     ragge #if 0
    128  1.20     perry 	__asm volatile ("movl %0,%%r1;jsb Slock"
    129   1.6     ragge 		: /* No output */
    130  1.24  christos 		: "g"(__alp)
    131   1.6     ragge 		: "r0","r1","cc","memory");
    132   1.7     ragge #endif
    133   1.6     ragge #if 0
    134  1.20     perry 	__asm volatile ("1:;bbssi $0, %0, 1b"
    135   1.1     ragge 		: /* No output */
    136  1.24  christos 		: "m"(*__alp));
    137   1.6     ragge #endif
    138   1.1     ragge }
    139   1.7     ragge #endif
    140   1.1     ragge 
    141  1.24  christos static __inline void __cpu_simple_unlock(__cpu_simple_lock_t *);
    142  1.24  christos static __inline void
    143  1.24  christos __cpu_simple_unlock(__cpu_simple_lock_t *__alp)
    144   1.1     ragge {
    145   1.9      matt #ifdef _KERNEL
    146  1.20     perry 	__asm volatile ("movl %0,%%r1;jsb Sunlock"
    147   1.6     ragge 		: /* No output */
    148  1.24  christos 		: "g"(__alp)
    149   1.6     ragge 		: "r1","cc","memory");
    150   1.9      matt #else
    151  1.20     perry 	__asm volatile ("bbcci $0,%0,1f;1:"
    152   1.6     ragge 		: /* No output */
    153  1.24  christos 		: "m"(*__alp)
    154   1.9      matt 		: "cc");
    155   1.6     ragge #endif
    156   1.1     ragge }
    157   1.1     ragge 
    158   1.6     ragge #if defined(MULTIPROCESSOR)
    159   1.6     ragge /*
    160   1.6     ragge  * On the Vax, interprocessor interrupts can come in at device priority
    161   1.6     ragge  * level or lower. This can cause some problems while waiting for r/w
    162   1.6     ragge  * spinlocks from a high'ish priority level: IPIs that come in will not
    163   1.6     ragge  * be processed. This can lead to deadlock.
    164   1.6     ragge  *
    165   1.6     ragge  * This hook allows IPIs to be processed while a spinlock's interlock
    166   1.6     ragge  * is released.
    167   1.6     ragge  */
    168   1.6     ragge #define SPINLOCK_SPIN_HOOK						\
    169   1.6     ragge do {									\
    170   1.6     ragge 	struct cpu_info *__ci = curcpu();				\
    171  1.24  christos 	int __s;							\
    172   1.6     ragge 									\
    173   1.6     ragge 	if (__ci->ci_ipimsgs != 0) {					\
    174   1.6     ragge 		/* printf("CPU %lu has IPIs pending\n",			\
    175   1.6     ragge 		    __ci->ci_cpuid); */					\
    176  1.24  christos 		__s = splipi();						\
    177   1.6     ragge 		cpu_handle_ipi();					\
    178  1.24  christos 		splx(__s);						\
    179   1.6     ragge 	}								\
    180  1.24  christos } while (/*CONSTCOND*/0)
    181   1.6     ragge #endif /* MULTIPROCESSOR */
    182  1.22      matt 
    183  1.24  christos static __inline void mb_read(void);
    184  1.24  christos static __inline void
    185  1.22      matt mb_read(void)
    186  1.22      matt {
    187  1.22      matt }
    188  1.22      matt 
    189  1.24  christos static __inline void mb_write(void);
    190  1.24  christos static __inline void
    191  1.22      matt mb_write(void)
    192  1.22      matt {
    193  1.22      matt }
    194   1.1     ragge #endif /* _VAX_LOCK_H_ */
    195