lock.h revision 1.6 1 1.6 ragge /* $NetBSD: lock.h,v 1.6 2001/06/03 15:10:11 ragge Exp $ */
2 1.1 ragge
3 1.1 ragge /*
4 1.1 ragge * Copyright (c) 2000 Ludd, University of Lule}, Sweden.
5 1.1 ragge * All rights reserved.
6 1.1 ragge *
7 1.1 ragge * Redistribution and use in source and binary forms, with or without
8 1.1 ragge * modification, are permitted provided that the following conditions
9 1.1 ragge * are met:
10 1.1 ragge * 1. Redistributions of source code must retain the above copyright
11 1.1 ragge * notice, this list of conditions and the following disclaimer.
12 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 ragge * notice, this list of conditions and the following disclaimer in the
14 1.1 ragge * documentation and/or other materials provided with the distribution.
15 1.1 ragge * 3. All advertising materials mentioning features or use of this software
16 1.1 ragge * must display the following acknowledgement:
17 1.1 ragge * This product includes software developed at Ludd, University of Lule}.
18 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
19 1.1 ragge * derived from this software without specific prior written permission
20 1.1 ragge *
21 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 ragge */
32 1.1 ragge
33 1.1 ragge #ifndef _VAX_LOCK_H_
34 1.1 ragge #define _VAX_LOCK_H_
35 1.3 ragge
36 1.6 ragge typedef __volatile int __cpu_simple_lock_t;
37 1.4 thorpej
38 1.6 ragge #define __SIMPLELOCK_LOCKED 1
39 1.6 ragge #define __SIMPLELOCK_UNLOCKED 0
40 1.3 ragge
41 1.2 thorpej static __inline void
42 1.4 thorpej __cpu_simple_lock_init(__cpu_simple_lock_t *alp)
43 1.1 ragge {
44 1.6 ragge __asm__ __volatile ("movl %0,r1;jsb Sunlock"
45 1.6 ragge : /* No output */
46 1.6 ragge : "g"(alp)
47 1.6 ragge : "r1","cc","memory");
48 1.6 ragge #if 0
49 1.6 ragge __asm__ __volatile ("bbcci $0, %0, 1f;1:"
50 1.6 ragge : /* No output */
51 1.6 ragge : "m"(*alp));
52 1.6 ragge #endif
53 1.1 ragge }
54 1.1 ragge
55 1.2 thorpej static __inline void
56 1.4 thorpej __cpu_simple_lock(__cpu_simple_lock_t *alp)
57 1.1 ragge {
58 1.6 ragge __asm__ __volatile ("movl %0,r1;jsb Slock"
59 1.6 ragge : /* No output */
60 1.6 ragge : "g"(alp)
61 1.6 ragge : "r0","r1","cc","memory");
62 1.6 ragge #if 0
63 1.5 matt __asm__ __volatile ("1:;bbssi $0, %0, 1b"
64 1.1 ragge : /* No output */
65 1.5 matt : "m"(*alp));
66 1.6 ragge #endif
67 1.1 ragge }
68 1.1 ragge
69 1.2 thorpej static __inline void
70 1.4 thorpej __cpu_simple_unlock(__cpu_simple_lock_t *alp)
71 1.1 ragge {
72 1.6 ragge __asm__ __volatile ("movl %0,r1;jsb Sunlock"
73 1.6 ragge : /* No output */
74 1.6 ragge : "g"(alp)
75 1.6 ragge : "r1","cc","memory");
76 1.6 ragge #if 0
77 1.6 ragge __asm__ __volatile ("bbcci $0, %0, 1f;1:"
78 1.6 ragge : /* No output */
79 1.6 ragge : "m"(*alp));
80 1.6 ragge #endif
81 1.1 ragge }
82 1.1 ragge
83 1.2 thorpej static __inline int
84 1.4 thorpej __cpu_simple_lock_try(__cpu_simple_lock_t *alp)
85 1.1 ragge {
86 1.5 matt int ret;
87 1.1 ragge
88 1.6 ragge __asm__ __volatile ("movl %1,r1;jsb Slocktry;movl r0,%0"
89 1.6 ragge : "=&r"(ret)
90 1.6 ragge : "g"(alp)
91 1.6 ragge : "r0","r1","cc","memory");
92 1.6 ragge #if 0
93 1.5 matt __asm__ __volatile ("movl $0,%0;bbssi $0,%1,1f;incl %0;1:"
94 1.5 matt : "=&r"(ret)
95 1.5 matt : "m"(*alp));
96 1.6 ragge #endif
97 1.1 ragge
98 1.1 ragge return ret;
99 1.1 ragge }
100 1.1 ragge
101 1.6 ragge #if defined(MULTIPROCESSOR)
102 1.6 ragge /*
103 1.6 ragge * On the Vax, interprocessor interrupts can come in at device priority
104 1.6 ragge * level or lower. This can cause some problems while waiting for r/w
105 1.6 ragge * spinlocks from a high'ish priority level: IPIs that come in will not
106 1.6 ragge * be processed. This can lead to deadlock.
107 1.6 ragge *
108 1.6 ragge * This hook allows IPIs to be processed while a spinlock's interlock
109 1.6 ragge * is released.
110 1.6 ragge */
111 1.6 ragge #define SPINLOCK_SPIN_HOOK \
112 1.6 ragge do { \
113 1.6 ragge struct cpu_info *__ci = curcpu(); \
114 1.6 ragge \
115 1.6 ragge if (__ci->ci_ipimsgs != 0) { \
116 1.6 ragge /* printf("CPU %lu has IPIs pending\n", \
117 1.6 ragge __ci->ci_cpuid); */ \
118 1.6 ragge cpu_handle_ipi(); \
119 1.6 ragge } \
120 1.6 ragge } while (0)
121 1.6 ragge #endif /* MULTIPROCESSOR */
122 1.1 ragge #endif /* _VAX_LOCK_H_ */
123