macros.h revision 1.26 1 1.26 matt /* $NetBSD: macros.h,v 1.26 2002/06/09 19:21:08 matt Exp $ */
2 1.2 cgd
3 1.1 ragge /*
4 1.18 ragge * Copyright (c) 1994, 1998, 2000 Ludd, University of Lule}, Sweden.
5 1.1 ragge * All rights reserved.
6 1.1 ragge *
7 1.1 ragge * Redistribution and use in source and binary forms, with or without
8 1.1 ragge * modification, are permitted provided that the following conditions
9 1.1 ragge * are met:
10 1.1 ragge * 1. Redistributions of source code must retain the above copyright
11 1.1 ragge * notice, this list of conditions and the following disclaimer.
12 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 ragge * notice, this list of conditions and the following disclaimer in the
14 1.1 ragge * documentation and/or other materials provided with the distribution.
15 1.1 ragge * 3. All advertising materials mentioning features or use of this software
16 1.1 ragge * must display the following acknowledgement:
17 1.1 ragge * This product includes software developed at Ludd, University of Lule}.
18 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
19 1.1 ragge * derived from this software without specific prior written permission
20 1.1 ragge *
21 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 ragge */
32 1.1 ragge
33 1.1 ragge /* All bugs are subject to removal without further notice */
34 1.3 ragge
35 1.17 ragge #if !defined(_VAX_MACROS_H_) && !defined(lint)
36 1.15 ragge #define _VAX_MACROS_H_
37 1.1 ragge
38 1.1 ragge /* Here general macros are supposed to be stored */
39 1.1 ragge
40 1.24 thorpej static __inline__ int __attribute__((__unused__))
41 1.16 ragge ffs(int reg)
42 1.16 ragge {
43 1.3 ragge register int val;
44 1.3 ragge
45 1.25 matt __asm__ __volatile ("ffs $0,$32,%1,%0;"
46 1.25 matt "bneq 1f;"
47 1.25 matt "mnegl $1,%0;"
48 1.25 matt "1:;"
49 1.25 matt "incl %0"
50 1.19 matt : "=&r" (val)
51 1.3 ragge : "r" (reg) );
52 1.3 ragge return val;
53 1.3 ragge }
54 1.3 ragge
55 1.24 thorpej static __inline__ void __attribute__((__unused__))
56 1.16 ragge _remque(void *p)
57 1.16 ragge {
58 1.13 thorpej __asm__ __volatile ("remque (%0),%0;clrl 4(%0)"
59 1.3 ragge :
60 1.3 ragge : "r" (p)
61 1.3 ragge : "memory" );
62 1.3 ragge }
63 1.3 ragge
64 1.24 thorpej static __inline__ void __attribute__((__unused__))
65 1.16 ragge _insque(void *p, void *q)
66 1.16 ragge {
67 1.22 matt __asm__ __volatile ("insque (%0),(%1)"
68 1.15 ragge :
69 1.15 ragge : "r" (p),"r" (q)
70 1.15 ragge : "memory" );
71 1.3 ragge }
72 1.3 ragge
73 1.24 thorpej static __inline__ void * __attribute__((__unused__))
74 1.22 matt memcpy(void *to, const void *from, size_t len)
75 1.16 ragge {
76 1.22 matt __asm__ __volatile ("movc3 %0,%1,%2"
77 1.16 ragge :
78 1.22 matt : "g" (len), "m" (*(char *)from), "m" (*(char *)to)
79 1.16 ragge :"r0","r1","r2","r3","r4","r5","memory","cc");
80 1.22 matt return to;
81 1.16 ragge }
82 1.24 thorpej static __inline__ void * __attribute__((__unused__))
83 1.22 matt memmove(void *to, const void *from, size_t len)
84 1.16 ragge {
85 1.22 matt __asm__ __volatile ("movc3 %0,%1,%2"
86 1.3 ragge :
87 1.22 matt : "g" (len), "m" (*(char *)from), "m" (*(char *)to)
88 1.16 ragge :"r0","r1","r2","r3","r4","r5","memory","cc");
89 1.22 matt return to;
90 1.16 ragge }
91 1.16 ragge
92 1.24 thorpej static __inline__ void __attribute__((__unused__))
93 1.22 matt bcopy(const void *from, void *to, size_t len)
94 1.16 ragge {
95 1.22 matt __asm__ __volatile ("movc3 %0,%1,%2"
96 1.16 ragge :
97 1.22 matt : "g" (len), "m" (*(char *)from), "m" (*(char *)to)
98 1.16 ragge :"r0","r1","r2","r3","r4","r5","memory","cc");
99 1.3 ragge }
100 1.3 ragge
101 1.24 thorpej void __blkset(void *, int, size_t);
102 1.15 ragge
103 1.24 thorpej static __inline__ void * __attribute__((__unused__))
104 1.16 ragge memset(void *block, int c, size_t len)
105 1.16 ragge {
106 1.16 ragge if (len > 65535)
107 1.24 thorpej __blkset(block, c, len);
108 1.16 ragge else {
109 1.25 matt __asm__ __volatile ("movc5 $0,(%%sp),%2,%1,%0"
110 1.16 ragge :
111 1.22 matt : "m" (*(char *)block), "g" (len), "g" (c)
112 1.16 ragge :"r0","r1","r2","r3","r4","r5","memory","cc");
113 1.16 ragge }
114 1.16 ragge return block;
115 1.16 ragge }
116 1.16 ragge
117 1.24 thorpej static __inline__ void __attribute__((__unused__))
118 1.20 matt bzero(void *block, size_t len)
119 1.16 ragge {
120 1.15 ragge if (len > 65535)
121 1.24 thorpej __blkset(block, 0, len);
122 1.15 ragge else {
123 1.25 matt __asm__ __volatile ("movc5 $0,(%%sp),$0,%1,%0"
124 1.3 ragge :
125 1.22 matt : "m" (*(char *)block), "g" (len)
126 1.16 ragge :"r0","r1","r2","r3","r4","r5","memory","cc");
127 1.15 ragge }
128 1.3 ragge }
129 1.3 ragge
130 1.16 ragge /* XXX - the return syntax of memcmp is wrong */
131 1.24 thorpej static __inline__ int __attribute__((__unused__))
132 1.16 ragge memcmp(const void *b1, const void *b2, size_t len)
133 1.16 ragge {
134 1.17 ragge register int ret;
135 1.16 ragge
136 1.25 matt __asm__ __volatile("cmpc3 %3,(%1),(%2);"
137 1.25 matt "movl %%r0,%0"
138 1.16 ragge : "=r" (ret)
139 1.16 ragge : "r" (b1), "r" (b2), "r" (len)
140 1.16 ragge : "r0","r1","r2","r3" );
141 1.16 ragge return ret;
142 1.16 ragge }
143 1.16 ragge
144 1.24 thorpej static __inline__ int __attribute__((__unused__))
145 1.16 ragge bcmp(const void *b1, const void *b2, size_t len)
146 1.16 ragge {
147 1.17 ragge register int ret;
148 1.3 ragge
149 1.25 matt __asm__ __volatile("cmpc3 %3,(%1),(%2);"
150 1.25 matt "movl %%r0,%0"
151 1.3 ragge : "=r" (ret)
152 1.3 ragge : "r" (b1), "r" (b2), "r" (len)
153 1.3 ragge : "r0","r1","r2","r3" );
154 1.3 ragge return ret;
155 1.3 ragge }
156 1.3 ragge
157 1.16 ragge /* Begin nya */
158 1.24 thorpej static __inline__ size_t __attribute__((__unused__))
159 1.16 ragge strlen(const char *cp)
160 1.16 ragge {
161 1.17 ragge register size_t ret;
162 1.16 ragge
163 1.25 matt __asm__ __volatile("locc $0,$65535,(%1);"
164 1.25 matt "subl3 %%r0,$65535,%0"
165 1.16 ragge : "=r" (ret)
166 1.16 ragge : "r" (cp)
167 1.16 ragge : "r0","r1","cc" );
168 1.16 ragge return ret;
169 1.16 ragge }
170 1.16 ragge
171 1.24 thorpej static __inline__ char * __attribute__((__unused__))
172 1.16 ragge strcat(char *cp, const char *c2)
173 1.16 ragge {
174 1.25 matt __asm__ __volatile("locc $0,$65535,(%1);"
175 1.25 matt "subl3 %%r0,$65535,%%r2;"
176 1.25 matt "incl %%r2;"
177 1.25 matt "locc $0,$65535,(%0);"
178 1.25 matt "movc3 %%r2,(%1),(%%r1)"
179 1.16 ragge :
180 1.16 ragge : "r" (cp), "r" (c2)
181 1.16 ragge : "r0","r1","r2","r3","r4","r5","memory","cc");
182 1.16 ragge return cp;
183 1.16 ragge }
184 1.16 ragge
185 1.24 thorpej static __inline__ char * __attribute__((__unused__))
186 1.16 ragge strncat(char *cp, const char *c2, size_t count)
187 1.16 ragge {
188 1.25 matt __asm__ __volatile("locc $0,%2,(%1);"
189 1.25 matt "subl3 %%r0,%2,%r2;"
190 1.25 matt "locc $0,$65535,(%0);"
191 1.25 matt "movc3 %%r2,(%1),(%%r1);"
192 1.25 matt "movb $0,(%%r3)"
193 1.16 ragge :
194 1.16 ragge : "r" (cp), "r" (c2), "g"(count)
195 1.16 ragge : "r0","r1","r2","r3","r4","r5","memory","cc");
196 1.16 ragge return cp;
197 1.16 ragge }
198 1.16 ragge
199 1.24 thorpej static __inline__ char * __attribute__((__unused__))
200 1.16 ragge strcpy(char *cp, const char *c2)
201 1.16 ragge {
202 1.25 matt __asm__ __volatile("locc $0,$65535,(%1);"
203 1.25 matt "subl3 %%r0,$65535,%%r2;"
204 1.25 matt "movc3 %%r2,(%1),(%0);"
205 1.25 matt "movb $0,(%%r3)"
206 1.16 ragge :
207 1.16 ragge : "r" (cp), "r" (c2)
208 1.16 ragge : "r0","r1","r2","r3","r4","r5","memory","cc");
209 1.16 ragge return cp;
210 1.16 ragge }
211 1.16 ragge
212 1.24 thorpej static __inline__ char * __attribute__((__unused__))
213 1.16 ragge strncpy(char *cp, const char *c2, size_t len)
214 1.16 ragge {
215 1.25 matt __asm__ __volatile("movl %2,%%r2;"
216 1.25 matt "locc $0,%%r2,(%1);"
217 1.25 matt "beql 1f;"
218 1.25 matt "subl3 %%r0,%2,%%r2;"
219 1.25 matt "clrb (%0)[%%r2];"
220 1.25 matt "1:;"
221 1.25 matt "movc3 %%r2,(%1),(%0)"
222 1.16 ragge :
223 1.16 ragge : "r" (cp), "r" (c2), "g"(len)
224 1.16 ragge : "r0","r1","r2","r3","r4","r5","memory","cc");
225 1.16 ragge return cp;
226 1.16 ragge }
227 1.16 ragge
228 1.24 thorpej static __inline__ void * __attribute__((__unused__))
229 1.16 ragge memchr(const void *cp, int c, size_t len)
230 1.16 ragge {
231 1.16 ragge void *ret;
232 1.25 matt __asm__ __volatile("locc %2,%3,(%1);"
233 1.25 matt "bneq 1f;"
234 1.25 matt "clrl %%r1;"
235 1.25 matt "1:;"
236 1.25 matt "movl %%r1,%0"
237 1.16 ragge : "=g"(ret)
238 1.16 ragge : "r" (cp), "r" (c), "g"(len)
239 1.16 ragge : "r0","r1","cc");
240 1.16 ragge return ret;
241 1.16 ragge }
242 1.16 ragge
243 1.24 thorpej static __inline__ int __attribute__((__unused__))
244 1.16 ragge strcmp(const char *cp, const char *c2)
245 1.16 ragge {
246 1.17 ragge register int ret;
247 1.25 matt __asm__ __volatile("locc $0,$65535,(%1);"
248 1.25 matt "subl3 %%r0,$65535,%%r0;"
249 1.25 matt "incl %%r0;"
250 1.25 matt "cmpc3 %%r0,(%1),(%2);"
251 1.25 matt "beql 1f;"
252 1.25 matt "movl $1,%%r2;"
253 1.25 matt "cmpb (%%r1),(%%r3);"
254 1.25 matt "bcc 1f;"
255 1.25 matt "mnegl $1,%%r2;"
256 1.25 matt "1:;"
257 1.25 matt "movl %%r2,%0"
258 1.16 ragge : "=g"(ret)
259 1.16 ragge : "r" (cp), "r" (c2)
260 1.16 ragge : "r0","r1","r2","r3","cc");
261 1.16 ragge return ret;
262 1.16 ragge }
263 1.16 ragge /* End nya */
264 1.16 ragge
265 1.9 cgd #if 0 /* unused, but no point in deleting it since it _is_ an instruction */
266 1.24 thorpej static __inline__ int __attribute__((__unused__))
267 1.24 thorpej locc(int mask, char *cp, size_t size){
268 1.3 ragge register ret;
269 1.3 ragge
270 1.25 matt __asm__ __volatile("locc %1,%2,(%3);"
271 1.25 matt "movl %%r0,%0"
272 1.3 ragge : "=r" (ret)
273 1.3 ragge : "r" (mask),"r"(size),"r"(cp)
274 1.3 ragge : "r0","r1" );
275 1.3 ragge return ret;
276 1.3 ragge }
277 1.9 cgd #endif
278 1.3 ragge
279 1.24 thorpej static __inline__ int __attribute__((__unused__))
280 1.16 ragge scanc(u_int size, const u_char *cp, const u_char *table, int mask)
281 1.16 ragge {
282 1.17 ragge register int ret;
283 1.3 ragge
284 1.25 matt __asm__ __volatile("scanc %1,(%2),(%3),%4;"
285 1.25 matt "movl %%r0,%0"
286 1.3 ragge : "=g"(ret)
287 1.3 ragge : "r"(size),"r"(cp),"r"(table),"r"(mask)
288 1.3 ragge : "r0","r1","r2","r3" );
289 1.3 ragge return ret;
290 1.3 ragge }
291 1.3 ragge
292 1.24 thorpej static __inline__ int __attribute__((__unused__))
293 1.16 ragge skpc(int mask, size_t size, u_char *cp)
294 1.16 ragge {
295 1.17 ragge register int ret;
296 1.3 ragge
297 1.25 matt __asm__ __volatile("skpc %1,%2,(%3);"
298 1.25 matt "movl %%r0,%0"
299 1.3 ragge : "=g"(ret)
300 1.3 ragge : "r"(mask),"r"(size),"r"(cp)
301 1.3 ragge : "r0","r1" );
302 1.3 ragge return ret;
303 1.23 ragge }
304 1.23 ragge
305 1.23 ragge /*
306 1.23 ragge * Set/clear a bit at a memory position; interlocked.
307 1.23 ragge * Return 0 if already set, 1 otherwise.
308 1.23 ragge */
309 1.24 thorpej static __inline__ int __attribute__((__unused__))
310 1.23 ragge bbssi(int bitnr, long *addr)
311 1.23 ragge {
312 1.23 ragge register int ret;
313 1.23 ragge
314 1.25 matt __asm__ __volatile("clrl %%r0;"
315 1.25 matt "bbssi %1,%2,1f;"
316 1.25 matt "incl %%r0;"
317 1.25 matt "1:;"
318 1.25 matt "movl %%r0,%0"
319 1.23 ragge : "=&r"(ret)
320 1.23 ragge : "g"(bitnr),"m"(*addr)
321 1.23 ragge : "r0","cc","memory");
322 1.23 ragge return ret;
323 1.23 ragge }
324 1.23 ragge
325 1.24 thorpej static __inline__ int __attribute__((__unused__))
326 1.23 ragge bbcci(int bitnr, long *addr)
327 1.23 ragge {
328 1.23 ragge register int ret;
329 1.23 ragge
330 1.25 matt __asm__ __volatile("clrl %%r0;"
331 1.25 matt "bbcci %1,%2,1f;"
332 1.25 matt "incl %%r0;"
333 1.25 matt "1:;"
334 1.25 matt "movl %%r0,%0"
335 1.23 ragge : "=&r"(ret)
336 1.23 ragge : "g"(bitnr),"m"(*addr)
337 1.23 ragge : "r0","cc","memory");
338 1.23 ragge return ret;
339 1.3 ragge }
340 1.3 ragge
341 1.15 ragge #define setrunqueue(p) \
342 1.25 matt __asm__ __volatile("movl %0,%%r0;jsb Setrq" :: "g"(p):"r0","r1","r2");
343 1.12 ragge
344 1.15 ragge #define remrunqueue(p) \
345 1.25 matt __asm__ __volatile("movl %0,%%r0;jsb Remrq" :: "g"(p):"r0","r1","r2");
346 1.12 ragge
347 1.15 ragge #define cpu_switch(p) \
348 1.25 matt __asm__ __volatile("movl %0,%%r6;movpsl -(%%sp);jsb Swtch" \
349 1.21 matt ::"g"(p):"r0","r1","r2","r3","r4","r5","r6");
350 1.18 ragge
351 1.18 ragge /*
352 1.18 ragge * Interlock instructions. Used both in multiprocessor environments to
353 1.18 ragge * lock between CPUs and in uniprocessor systems when locking is required
354 1.18 ragge * between I/O devices and the master CPU.
355 1.18 ragge */
356 1.18 ragge /*
357 1.18 ragge * Insqti() locks and inserts an element into the end of a queue.
358 1.18 ragge * Returns -1 if interlock failed, 1 if inserted OK and 0 if first in queue.
359 1.18 ragge */
360 1.24 thorpej static __inline__ int __attribute__((__unused__))
361 1.18 ragge insqti(void *entry, void *header) {
362 1.18 ragge register int ret;
363 1.18 ragge
364 1.26 matt __asm__ __volatile(
365 1.26 matt " mnegl $1,%0;"
366 1.26 matt " insqti (%1),(%2);"
367 1.26 matt " bcs 1f;" /* failed insert */
368 1.26 matt " beql 2f;" /* jump if first entry */
369 1.26 matt " movl $1,%0;"
370 1.26 matt " brb 1f;"
371 1.26 matt "2: clrl %0;"
372 1.26 matt " 1:;"
373 1.19 matt : "=&g"(ret)
374 1.18 ragge : "r"(entry), "r"(header)
375 1.18 ragge : "memory");
376 1.18 ragge
377 1.18 ragge return ret;
378 1.18 ragge }
379 1.18 ragge
380 1.18 ragge /*
381 1.18 ragge * Remqhi() removes an element from the head of the queue.
382 1.18 ragge * Returns -1 if interlock failed, 0 if queue empty, address of the
383 1.18 ragge * removed element otherwise.
384 1.18 ragge */
385 1.24 thorpej static __inline__ void * __attribute__((__unused__))
386 1.18 ragge remqhi(void *header) {
387 1.18 ragge register void *ret;
388 1.18 ragge
389 1.26 matt __asm__ __volatile(
390 1.26 matt " remqhi (%1),%0;"
391 1.26 matt " bcs 1f;" /* failed interlock */
392 1.26 matt " bvs 2f;" /* nothing was removed */
393 1.26 matt " brb 3f;"
394 1.26 matt "1: mnegl $1,%0;"
395 1.26 matt " brb 3f;"
396 1.26 matt "2: clrl %0;"
397 1.26 matt " 3:;"
398 1.19 matt : "=&g"(ret)
399 1.18 ragge : "r"(header)
400 1.18 ragge : "memory");
401 1.18 ragge
402 1.18 ragge return ret;
403 1.18 ragge }
404 1.18 ragge #define ILCK_FAILED -1 /* Interlock failed */
405 1.18 ragge #define Q_EMPTY 0 /* Queue is/was empty */
406 1.18 ragge #define Q_OK 1 /* Inserted OK */
407 1.18 ragge
408 1.3 ragge #endif /* _VAX_MACROS_H_ */
409