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macros.h revision 1.5
      1  1.5  ragge /*	$NetBSD: macros.h,v 1.5 1995/10/20 12:55:06 ragge Exp $	*/
      2  1.2    cgd 
      3  1.1  ragge /*
      4  1.1  ragge  * Copyright (c) 1994 Ludd, University of Lule}, Sweden.
      5  1.1  ragge  * All rights reserved.
      6  1.1  ragge  *
      7  1.1  ragge  * Redistribution and use in source and binary forms, with or without
      8  1.1  ragge  * modification, are permitted provided that the following conditions
      9  1.1  ragge  * are met:
     10  1.1  ragge  * 1. Redistributions of source code must retain the above copyright
     11  1.1  ragge  *    notice, this list of conditions and the following disclaimer.
     12  1.1  ragge  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1  ragge  *    notice, this list of conditions and the following disclaimer in the
     14  1.1  ragge  *    documentation and/or other materials provided with the distribution.
     15  1.1  ragge  * 3. All advertising materials mentioning features or use of this software
     16  1.1  ragge  *    must display the following acknowledgement:
     17  1.1  ragge  *     This product includes software developed at Ludd, University of Lule}.
     18  1.1  ragge  * 4. The name of the author may not be used to endorse or promote products
     19  1.1  ragge  *    derived from this software without specific prior written permission
     20  1.1  ragge  *
     21  1.1  ragge  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  1.1  ragge  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  1.1  ragge  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  1.1  ragge  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  1.1  ragge  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  1.1  ragge  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  1.1  ragge  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  1.1  ragge  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  1.1  ragge  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  1.1  ragge  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  1.1  ragge  */
     32  1.1  ragge 
     33  1.1  ragge  /* All bugs are subject to removal without further notice */
     34  1.3  ragge 
     35  1.5  ragge #if !defined(_VAX_MACROS_H_) && (defined(STANDALONE) || \
     36  1.5  ragge 	(!defined(ASSEMBLER) && defined(_VAX_INLINE_)))
     37  1.3  ragge #define	_VAX_MACROS_H_
     38  1.1  ragge 
     39  1.1  ragge /* Here general macros are supposed to be stored */
     40  1.1  ragge 
     41  1.3  ragge static __inline__ int ffs(int reg){
     42  1.3  ragge 	register int val;
     43  1.3  ragge 
     44  1.3  ragge 	asm __volatile ("ffs	$0,$32,%1,%0
     45  1.3  ragge 			bneq	1f
     46  1.3  ragge 			mnegl	$1,%0
     47  1.3  ragge 		1:	incl    %0"
     48  1.3  ragge 			: "&=r" (val)
     49  1.3  ragge 			: "r" (reg) );
     50  1.3  ragge 	return	val;
     51  1.3  ragge }
     52  1.3  ragge 
     53  1.3  ragge static __inline__ void _remque(void*p){
     54  1.3  ragge 	asm __volatile ("remque (%0),%0;clrl 4(%0)"
     55  1.3  ragge 			:
     56  1.3  ragge 			: "r" (p)
     57  1.3  ragge 			: "memory" );
     58  1.3  ragge }
     59  1.3  ragge 
     60  1.3  ragge static __inline__ void _insque(void*p, void*q) {
     61  1.3  ragge         asm __volatile ("insque (%0), (%1)"
     62  1.3  ragge                         :
     63  1.3  ragge                         : "r" (p),"r" (q)
     64  1.3  ragge                         : "memory" );
     65  1.3  ragge }
     66  1.3  ragge 
     67  1.3  ragge #define	bitset(bitnr,var)				\
     68  1.3  ragge ({	asm __volatile ("bbss %0,%1,1f;1:;"		\
     69  1.3  ragge 			:				\
     70  1.3  ragge 			: "g" (bitnr), "g" (var));	\
     71  1.3  ragge })
     72  1.3  ragge 
     73  1.3  ragge #define	bitclear(bitnr,var)				\
     74  1.3  ragge ({      asm __volatile ("bbsc %0,%1,1f;1:;"             \
     75  1.3  ragge                         :                               \
     76  1.3  ragge                         : "g" (bitnr), "g" (var));      \
     77  1.3  ragge })
     78  1.3  ragge 
     79  1.3  ragge #define	bitisset(bitnr,var)				\
     80  1.3  ragge ({							\
     81  1.3  ragge 	register int val;                               \
     82  1.3  ragge 	asm __volatile ("clrl %0;bbc %1,%2,1f;incl %0;1:;" \
     83  1.3  ragge 			: "=g" (val)			\
     84  1.3  ragge 			: "g" (bitnr), "g" (var));	\
     85  1.3  ragge 	val;						\
     86  1.3  ragge })
     87  1.3  ragge 
     88  1.3  ragge #define bitisclear(bitnr,var)                                \
     89  1.3  ragge ({                                                      \
     90  1.3  ragge         register int val;                               \
     91  1.3  ragge         asm __volatile ("clrl %0;bbs %1,%2,1f;incl %0;1:;" \
     92  1.3  ragge                         : "=g" (val)                    \
     93  1.3  ragge                         : "g" (bitnr), "g" (var));      \
     94  1.3  ragge 	val;						\
     95  1.3  ragge })
     96  1.3  ragge static __inline__ void bcopy(const void*from, void*toe, u_int len) {
     97  1.3  ragge 	asm __volatile ("movc3 %0,(%1),(%2)"
     98  1.3  ragge 			:
     99  1.3  ragge 			: "r" (len),"r" (from),"r"(toe)
    100  1.3  ragge 			:"r0","r1","r2","r3","r4","r5");
    101  1.3  ragge }
    102  1.3  ragge 
    103  1.3  ragge static __inline__ void bzero(void*block, u_int len){
    104  1.3  ragge 	asm __volatile ("movc5 $0,(%0),$0,%1,(%0)"
    105  1.3  ragge 			:
    106  1.3  ragge 			: "r" (block), "r" (len)
    107  1.3  ragge 			:"r0","r1","r2","r3","r4","r5");
    108  1.3  ragge }
    109  1.3  ragge 
    110  1.3  ragge static __inline__ int bcmp(const void *b1, const void *b2, size_t len){
    111  1.3  ragge 	register ret;
    112  1.3  ragge 
    113  1.3  ragge 	asm __volatile("cmpc3 %3,(%1),(%2);movl r0,%0"
    114  1.3  ragge 			: "=r" (ret)
    115  1.3  ragge 			: "r" (b1), "r" (b2), "r" (len)
    116  1.3  ragge 			: "r0","r1","r2","r3" );
    117  1.3  ragge 	return ret;
    118  1.3  ragge }
    119  1.3  ragge 
    120  1.3  ragge static __inline__ int locc(int mask, char *cp,u_int size){
    121  1.3  ragge 	register ret;
    122  1.3  ragge 
    123  1.3  ragge 	asm __volatile("locc %1,%2,(%3);movl r0,%0"
    124  1.3  ragge 			: "=r" (ret)
    125  1.3  ragge 			: "r" (mask),"r"(size),"r"(cp)
    126  1.3  ragge 			: "r0","r1" );
    127  1.3  ragge 	return	ret;
    128  1.3  ragge }
    129  1.3  ragge 
    130  1.3  ragge static __inline__ int scanc(u_int size, u_char *cp,u_char *table, int mask){
    131  1.3  ragge 	register ret;
    132  1.3  ragge 
    133  1.3  ragge 	asm __volatile("scanc	%1,(%2),(%3),%4;movl r0,%0"
    134  1.3  ragge 			: "=g"(ret)
    135  1.3  ragge 			: "r"(size),"r"(cp),"r"(table),"r"(mask)
    136  1.3  ragge 			: "r0","r1","r2","r3" );
    137  1.3  ragge 	return ret;
    138  1.3  ragge }
    139  1.3  ragge 
    140  1.3  ragge static __inline__ int skpc(int mask, int size, char *cp){
    141  1.3  ragge 	register ret;
    142  1.3  ragge 
    143  1.3  ragge 	asm __volatile("skpc %1,%2,(%3);movl r0,%0"
    144  1.3  ragge 			: "=g"(ret)
    145  1.3  ragge 			: "r"(mask),"r"(size),"r"(cp)
    146  1.3  ragge 			: "r0","r1" );
    147  1.3  ragge 	return	ret;
    148  1.3  ragge }
    149  1.3  ragge #if 0
    150  1.3  ragge static __inline__ int imin(int a, int b){
    151  1.3  ragge 	asm __volatile("cmpl %0,%2;bleq 1f;movl %2,%0;1:"
    152  1.3  ragge 			: "=r"(a)
    153  1.3  ragge 			: "r"(a),"r"(b) );
    154  1.3  ragge 	return a;
    155  1.3  ragge }
    156  1.3  ragge 
    157  1.3  ragge static __inline__ int imax(int a, int b){
    158  1.3  ragge         asm __volatile("cmpl %0,%2;bgeq 1f;movl %2,%0;1:"
    159  1.3  ragge                         : "=r"(a)
    160  1.3  ragge                         : "r"(a),"r"(b) );
    161  1.3  ragge         return a;
    162  1.3  ragge }
    163  1.3  ragge 
    164  1.3  ragge static __inline__ int min(int a, int b){
    165  1.3  ragge         asm __volatile("cmpl %0,%2;bleq 1f;movl %2,%0;1:"
    166  1.3  ragge                         : "=r"(a)
    167  1.3  ragge                         : "r"(a),"r"(b) );
    168  1.3  ragge         return a;
    169  1.3  ragge }
    170  1.3  ragge 
    171  1.3  ragge static __inline__ int max(int a, int b){
    172  1.3  ragge         asm __volatile("cmpl %0,%2;bgeq 1f;movl %2,%0;1:"
    173  1.3  ragge                         : "=r"(a)
    174  1.3  ragge                         : "r"(a),"r"(b) );
    175  1.3  ragge         return a;
    176  1.3  ragge }
    177  1.3  ragge #endif
    178  1.3  ragge 
    179  1.3  ragge #define	waitabit(tid)	\
    180  1.3  ragge ({	\
    181  1.3  ragge 	asm __volatile ("mfpr $27,r0;addl2 %0,r0;1:;mfpr $27,r1; \
    182  1.3  ragge 			cmpl r0,r1;bneq 1b;"	\
    183  1.3  ragge 			:		\
    184  1.3  ragge 			: "g"(tid)	\
    185  1.3  ragge 			: "r0","r1");	\
    186  1.3  ragge })
    187  1.3  ragge 
    188  1.3  ragge static __inline__ void blkcpy(const void*from, void*to, u_int len) {
    189  1.3  ragge 	asm __volatile("
    190  1.3  ragge 			movl    %0,r1
    191  1.3  ragge 			movl    %1,r3
    192  1.3  ragge 			movl	%2,r6
    193  1.3  ragge 			jbr 2f
    194  1.3  ragge 		1:	subl2   r0,r6
    195  1.3  ragge 			movc3   r0,(r1),(r3)
    196  1.3  ragge 		2:	movzwl  $65535,r0
    197  1.3  ragge 			cmpl    r6,r0
    198  1.3  ragge 			jgtr    1b
    199  1.3  ragge 			movc3   r6,(r1),(r3)"
    200  1.3  ragge 			:
    201  1.3  ragge 			: "g" (from), "g" (to), "g" (len)
    202  1.3  ragge 			: "r0","r1","r2","r3","r4","r5", "r6" );
    203  1.3  ragge }
    204  1.3  ragge 
    205  1.3  ragge static __inline__ void blkclr(void *blk, int len) {
    206  1.3  ragge 	asm __volatile("
    207  1.3  ragge 			movl	%0, r3
    208  1.3  ragge 			movl	%1, r6
    209  1.3  ragge 			jbr	2f
    210  1.3  ragge 		1:	subl2	r0, r6
    211  1.3  ragge 			movc5	$0,(r3),$0,r0,(r3)
    212  1.3  ragge 		2:	movzwl	$65535,r0
    213  1.3  ragge 			cmpl	r6, r0
    214  1.3  ragge 			jgtr	1b
    215  1.3  ragge 			movc5	$0,(r3),$0,r6,(r3)"
    216  1.3  ragge 			:
    217  1.3  ragge 			: "g" (blk), "g" (len)
    218  1.3  ragge 			: "r0","r1","r2","r3","r4","r5", "r6" );
    219  1.3  ragge }
    220  1.3  ragge 
    221  1.3  ragge #endif	/* _VAX_MACROS_H_ */
    222