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      1  1.27      matt /*	$NetBSD: nexus.h,v 1.27 2011/06/05 16:59:21 matt Exp $	*/
      2   1.2       cgd 
      3   1.1     ragge /*-
      4   1.1     ragge  * Copyright (c) 1982, 1986 The Regents of the University of California.
      5   1.1     ragge  * All rights reserved.
      6   1.1     ragge  *
      7   1.1     ragge  * Redistribution and use in source and binary forms, with or without
      8   1.1     ragge  * modification, are permitted provided that the following conditions
      9   1.1     ragge  * are met:
     10   1.1     ragge  * 1. Redistributions of source code must retain the above copyright
     11   1.1     ragge  *    notice, this list of conditions and the following disclaimer.
     12   1.1     ragge  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1     ragge  *    notice, this list of conditions and the following disclaimer in the
     14   1.1     ragge  *    documentation and/or other materials provided with the distribution.
     15  1.21       agc  * 3. Neither the name of the University nor the names of its contributors
     16   1.1     ragge  *    may be used to endorse or promote products derived from this software
     17   1.1     ragge  *    without specific prior written permission.
     18   1.1     ragge  *
     19   1.1     ragge  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     20   1.1     ragge  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     21   1.1     ragge  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     22   1.1     ragge  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     23   1.1     ragge  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     24   1.1     ragge  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     25   1.1     ragge  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26   1.1     ragge  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27   1.1     ragge  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28   1.1     ragge  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29   1.1     ragge  * SUCH DAMAGE.
     30   1.1     ragge  *
     31   1.2       cgd  *	@(#)nexus.h	7.3 (Berkeley) 5/9/91
     32   1.1     ragge  */
     33   1.1     ragge 
     34  1.26     ragge /*
     35  1.26     ragge  * ABus support added by Johnny Billquist 2010.
     36  1.26     ragge  */
     37  1.26     ragge 
     38   1.6     ragge #ifndef _VAX_NEXUS_H_
     39   1.6     ragge #define _VAX_NEXUS_H_
     40  1.16      matt 
     41  1.17     ragge #include <machine/bus.h>
     42  1.17     ragge 
     43  1.16      matt #ifdef _KERNEL
     44  1.18     ragge #include "opt_cputype.h"
     45  1.16      matt #endif
     46   1.1     ragge /*
     47  1.12     ragge  * Different definitions for nicer autoconf probing.
     48  1.12     ragge  */
     49  1.15     ragge enum bustypes {
     50  1.15     ragge 	VAX_SBIBUS,		/* SBI parent (780) */
     51  1.15     ragge 	VAX_CMIBUS,		/* CMI backplane (750) */
     52  1.15     ragge 	VAX_UNIBUS,		/* Direct backplane (730) */
     53  1.26     ragge 	VAX_ABUS,		/* ABus (8600) */
     54  1.15     ragge 	VAX_BIBUS,		/* BI bus (8200) */
     55  1.25      matt 	VAX_NMIBUS,		/* NMI backplane (8800) */
     56  1.15     ragge 	VAX_VSBUS,		/* Virtual vaxstation bus */
     57  1.15     ragge 	VAX_IBUS,		/* Internal Microvax bus */
     58  1.15     ragge 	VAX_XMIBUS,		/* XMI master bus (6000) */
     59  1.15     ragge };
     60  1.12     ragge /*
     61   1.1     ragge  * Information about nexus's.
     62   1.1     ragge  *
     63   1.1     ragge  * Each machine has an address of backplane slots (nexi).
     64   1.1     ragge  * Each nexus is some type of adapter, whose code is the low
     65   1.1     ragge  * byte of the first word of the adapter address space.
     66   1.1     ragge  * At boot time the system looks through the array of available
     67   1.1     ragge  * slots and finds the interconnects for the machine.
     68  1.26     ragge  *
     69  1.26     ragge  * VAX8600 nexus information is located in ioa.h
     70   1.1     ragge  */
     71   1.1     ragge #define IO_CMI750       2
     72   1.1     ragge #define MAXNMCR         1
     73   1.1     ragge 
     74   1.1     ragge #define	NNEXSBI		16
     75  1.19      matt #if VAX780 || VAXANY
     76   1.1     ragge #define	NNEX780	NNEXSBI
     77   1.1     ragge #define	NEX780	((struct nexus *)0x20000000)
     78   1.1     ragge #endif
     79  1.19      matt #if VAX730 || VAXANY
     80   1.1     ragge #define	NNEX730	NNEXSBI
     81   1.1     ragge #define	NEX730	((struct nexus *)0xf20000)
     82   1.4     ragge #endif
     83   1.1     ragge #define	NEXSIZE	0x2000
     84   1.1     ragge 
     85  1.14     ragge #ifdef _KERNEL
     86   1.1     ragge 
     87   1.1     ragge struct	nexus {
     88   1.1     ragge 	union nexcsr {
     89   1.1     ragge 		long	nex_csr;
     90   1.1     ragge 		u_char	nex_type;
     91   1.1     ragge 	} nexcsr;
     92   1.1     ragge 	long	nex_pad[NEXSIZE / sizeof (long) - 1];
     93   1.1     ragge };
     94   1.1     ragge 
     95  1.26     ragge struct abus_attach_args {
     96  1.26     ragge         const char *aa_name;
     97  1.26     ragge         int aa_type;
     98  1.26     ragge         bus_addr_t aa_base;
     99  1.26     ragge         int aa_num;
    100  1.26     ragge 	bus_space_tag_t aa_iot;
    101  1.26     ragge 	bus_space_handle_t aa_ioh;
    102  1.26     ragge 	bus_dma_tag_t aa_dmat;
    103  1.26     ragge };
    104  1.26     ragge 
    105   1.3     ragge struct sbi_attach_args {
    106  1.17     ragge 	int sa_nexnum; 		/* This nexus TR number */
    107  1.17     ragge 	int sa_type;		/* This nexus type */
    108  1.20     ragge 	int sa_sbinum;
    109  1.17     ragge 	bus_space_tag_t sa_iot;
    110  1.17     ragge 	bus_space_handle_t sa_ioh;
    111  1.25      matt 	bus_dma_tag_t sa_dmat;
    112  1.26     ragge         bus_addr_t sa_base;
    113   1.3     ragge };
    114   1.3     ragge 
    115  1.10     ragge /* Memory device struct. This should be somewhere else */
    116  1.10     ragge struct mem_softc {
    117  1.27      matt 	device_t sc_dev;
    118  1.24  christos 	void *	sc_memaddr;
    119  1.10     ragge 	int	sc_memtype;
    120  1.10     ragge 	int	sc_memnr;
    121  1.11     ragge };
    122  1.11     ragge 
    123  1.25      matt struct ibus_attach_args {
    124  1.25      matt 	const char *ia_type;
    125  1.25      matt 	int ia_num;
    126  1.25      matt 	int ia_partyp;
    127  1.25      matt 	paddr_t ia_addr;
    128   1.1     ragge };
    129   1.1     ragge #endif
    130   1.1     ragge 
    131   1.1     ragge /*
    132   1.1     ragge  * Bits in high word of nexus's.
    133   1.1     ragge  */
    134   1.1     ragge #define	SBI_PARFLT	(1<<31)		/* sbi parity fault */
    135   1.1     ragge #define	SBI_WSQFLT	(1<<30)		/* write sequence fault */
    136   1.1     ragge #define	SBI_URDFLT	(1<<29)		/* unexpected read data fault */
    137   1.1     ragge #define	SBI_ISQFLT	(1<<28)		/* interlock sequence fault */
    138   1.1     ragge #define	SBI_MXTFLT	(1<<27)		/* multiple transmitter fault */
    139   1.1     ragge #define	SBI_XMTFLT	(1<<26)		/* transmit fault */
    140   1.1     ragge 
    141   1.1     ragge #define	NEX_CFGFLT	(0xfc000000)
    142   1.1     ragge 
    143   1.7   mycroft #ifndef _LOCORE
    144  1.19      matt #if VAX780 || VAX8600 || VAXANY
    145   1.1     ragge #define	NEXFLT_BITS \
    146   1.1     ragge "\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT"
    147   1.1     ragge #endif
    148   1.1     ragge #endif
    149   1.1     ragge 
    150   1.1     ragge #define	NEX_APD		(1<<23)		/* adaptor power down */
    151   1.1     ragge #define	NEX_APU		(1<<22)		/* adaptor power up */
    152   1.1     ragge 
    153   1.1     ragge #define	MBA_OT		(1<<21)		/* overtemperature */
    154   1.1     ragge 
    155   1.1     ragge #define	UBA_UBINIT	(1<<18)		/* unibus init */
    156   1.1     ragge #define	UBA_UBPDN	(1<<17)		/* unibus power down */
    157   1.1     ragge #define	UBA_UBIC	(1<<16)		/* unibus initialization complete */
    158   1.1     ragge 
    159   1.1     ragge /*
    160   1.1     ragge  * Types for nex_type.
    161   1.1     ragge  */
    162   1.1     ragge #define	NEX_ANY		0		/* pseudo for handling 11/750 */
    163   1.1     ragge #define	NEX_MEM4	0x08		/* 4K chips, non-interleaved mem */
    164   1.1     ragge #define	NEX_MEM4I	0x09		/* 4K chips, interleaved mem */
    165   1.1     ragge #define	NEX_MEM16	0x10		/* 16K chips, non-interleaved mem */
    166   1.1     ragge #define	NEX_MEM16I	0x11		/* 16K chips, interleaved mem */
    167   1.1     ragge #define	NEX_MBA		0x20		/* Massbus adaptor */
    168   1.1     ragge #define	NEX_UBA0	0x28		/* Unibus adaptor */
    169   1.1     ragge #define	NEX_UBA1	0x29		/* 4 flavours for 4 addr spaces */
    170   1.1     ragge #define	NEX_UBA2	0x2a
    171   1.1     ragge #define	NEX_UBA3	0x2b
    172   1.1     ragge #define	NEX_DR32	0x30		/* DR32 user i'face to SBI */
    173   1.1     ragge #define	NEX_CI		0x38		/* CI adaptor */
    174   1.1     ragge #define	NEX_MPM0	0x40		/* Multi-port mem */
    175   1.1     ragge #define	NEX_MPM1	0x41		/* Who knows why 4 different ones ? */
    176   1.1     ragge #define	NEX_MPM2	0x42
    177   1.1     ragge #define	NEX_MPM3	0x43
    178   1.1     ragge #define	NEX_MEM64L	0x68		/* 64K chips, non-interleaved, lower */
    179   1.1     ragge #define	NEX_MEM64LI	0x69		/* 64K chips, ext-interleaved, lower */
    180   1.1     ragge #define	NEX_MEM64U	0x6a		/* 64K chips, non-interleaved, upper */
    181   1.1     ragge #define	NEX_MEM64UI	0x6b		/* 64K chips, ext-interleaved, upper */
    182   1.1     ragge #define	NEX_MEM64I	0x6c		/* 64K chips, interleaved */
    183   1.1     ragge #define	NEX_MEM256L	0x70		/* 256K chips, non-interleaved, lower */
    184   1.1     ragge #define	NEX_MEM256LI	0x71		/* 256K chips, ext-interleaved, lower */
    185   1.1     ragge #define	NEX_MEM256U	0x72		/* 256K chips, non-interleaved, upper */
    186   1.1     ragge #define	NEX_MEM256UI	0x73		/* 256K chips, ext-interleaved, upper */
    187   1.1     ragge #define	NEX_MEM256I	0x74		/* 256K chips, interleaved */
    188  1.10     ragge 
    189  1.10     ragge /* Memory classes */
    190  1.17     ragge #define	M_NONE		0
    191  1.17     ragge #define	M780C		1
    192  1.17     ragge #define	M780EL		2
    193  1.17     ragge #define	M780EU		3
    194  1.10     ragge 
    195  1.10     ragge /* Memory recover defines */
    196  1.10     ragge #define	MCHK_PANIC	-1
    197  1.10     ragge #define	MCHK_RECOVERED	0
    198   1.6     ragge 
    199   1.6     ragge #endif /* _VAX_NEXUS_H_ */
    200