1 1.12 matt /* $NetBSD: psl.h,v 1.12 2010/12/14 23:29:02 matt Exp $ */ 2 1.3 cgd 3 1.1 ragge /* 4 1.1 ragge * Rewritten for the VAX port. Based on Berkeley code. /IC 5 1.1 ragge * 6 1.1 ragge * Copyright (c) 1982, 1986 Regents of the University of California. 7 1.1 ragge * All rights reserved. 8 1.1 ragge * 9 1.1 ragge * Redistribution and use in source and binary forms, with or without 10 1.1 ragge * modification, are permitted provided that the following conditions 11 1.1 ragge * are met: 12 1.1 ragge * 1. Redistributions of source code must retain the above copyright 13 1.1 ragge * notice, this list of conditions and the following disclaimer. 14 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 ragge * notice, this list of conditions and the following disclaimer in the 16 1.1 ragge * documentation and/or other materials provided with the distribution. 17 1.9 agc * 3. Neither the name of the University nor the names of its contributors 18 1.1 ragge * may be used to endorse or promote products derived from this software 19 1.1 ragge * without specific prior written permission. 20 1.1 ragge * 21 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 1.1 ragge * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 1.1 ragge * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 1.1 ragge * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 1.1 ragge * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 1.1 ragge * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 1.1 ragge * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 1.1 ragge * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 1.1 ragge * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 1.1 ragge * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 1.1 ragge * SUCH DAMAGE. 32 1.1 ragge * 33 1.3 cgd * @(#)psl.h 7.2 (Berkeley) 5/4/91 34 1.1 ragge */ 35 1.1 ragge 36 1.1 ragge #ifndef PSL_C 37 1.1 ragge 38 1.1 ragge /* 39 1.1 ragge * VAX program status longword 40 1.1 ragge */ 41 1.1 ragge 42 1.1 ragge #define PSL_C 0x00000001 /* carry bit */ 43 1.1 ragge #define PSL_V 0x00000002 /* overflow bit */ 44 1.1 ragge #define PSL_Z 0x00000004 /* zero bit */ 45 1.1 ragge #define PSL_N 0x00000008 /* negative bit */ 46 1.1 ragge #define PSL_T 0x00000010 /* trace enable bit */ 47 1.11 matt #define PSL_IV 0x00000020 /* integer overflow */ 48 1.11 matt #define PSL_FU 0x00000040 /* floating underflow */ 49 1.11 matt #define PSL_DV 0x00000080 /* decimal overflow */ 50 1.1 ragge #define PSL_IPL00 0x00000000 /* interrupt priority level 0 */ 51 1.1 ragge #define PSL_IPL01 0x00010000 /* interrupt priority level 1 */ 52 1.1 ragge #define PSL_IPL02 0x00020000 /* interrupt priority level 2 */ 53 1.1 ragge #define PSL_IPL03 0x00030000 /* interrupt priority level 3 */ 54 1.1 ragge #define PSL_IPL04 0x00040000 /* interrupt priority level 4 */ 55 1.1 ragge #define PSL_IPL05 0x00050000 /* interrupt priority level 5 */ 56 1.1 ragge #define PSL_IPL06 0x00060000 /* interrupt priority level 6 */ 57 1.1 ragge #define PSL_IPL07 0x00070000 /* interrupt priority level 7 */ 58 1.1 ragge #define PSL_IPL08 0x00080000 /* interrupt priority level 8 */ 59 1.1 ragge #define PSL_IPL09 0x00090000 /* interrupt priority level 9 */ 60 1.1 ragge #define PSL_IPL0A 0x000a0000 /* interrupt priority level 10 */ 61 1.1 ragge #define PSL_IPL0B 0x000b0000 /* interrupt priority level 11 */ 62 1.1 ragge #define PSL_IPL0C 0x000c0000 /* interrupt priority level 12 */ 63 1.1 ragge #define PSL_IPL0D 0x000d0000 /* interrupt priority level 13 */ 64 1.1 ragge #define PSL_IPL0E 0x000e0000 /* interrupt priority level 14 */ 65 1.1 ragge #define PSL_IPL0F 0x000f0000 /* interrupt priority level 15 */ 66 1.1 ragge #define PSL_IPL10 0x00100000 /* interrupt priority level 16 */ 67 1.1 ragge #define PSL_IPL11 0x00110000 /* interrupt priority level 17 */ 68 1.1 ragge #define PSL_IPL12 0x00120000 /* interrupt priority level 18 */ 69 1.1 ragge #define PSL_IPL13 0x00130000 /* interrupt priority level 19 */ 70 1.1 ragge #define PSL_IPL14 0x00140000 /* interrupt priority level 20 */ 71 1.1 ragge #define PSL_IPL15 0x00150000 /* interrupt priority level 21 */ 72 1.1 ragge #define PSL_IPL16 0x00160000 /* interrupt priority level 22 */ 73 1.1 ragge #define PSL_IPL17 0x00170000 /* interrupt priority level 23 */ 74 1.1 ragge #define PSL_IPL18 0x00180000 /* interrupt priority level 24 */ 75 1.1 ragge #define PSL_IPL19 0x00190000 /* interrupt priority level 25 */ 76 1.1 ragge #define PSL_IPL1A 0x001a0000 /* interrupt priority level 26 */ 77 1.1 ragge #define PSL_IPL1B 0x001b0000 /* interrupt priority level 27 */ 78 1.1 ragge #define PSL_IPL1C 0x001c0000 /* interrupt priority level 28 */ 79 1.1 ragge #define PSL_IPL1D 0x001d0000 /* interrupt priority level 29 */ 80 1.1 ragge #define PSL_IPL1E 0x001e0000 /* interrupt priority level 30 */ 81 1.1 ragge #define PSL_IPL1F 0x001f0000 /* interrupt priority level 31 */ 82 1.4 ragge #define PSL_PREVU 0x00c00000 /* Previous user mode */ 83 1.4 ragge #define PSL_K 0x00000000 /* kernel mode */ 84 1.4 ragge #define PSL_E 0x01000000 /* executive mode */ 85 1.7 thorpej #define PSL_S 0x02000000 /* supervisor mode */ 86 1.4 ragge #define PSL_U 0x03000000 /* user mode */ 87 1.1 ragge #define PSL_IS 0x04000000 /* interrupt stack select */ 88 1.6 ragge #define PSL_FPD 0x08000000 /* first part done flag */ 89 1.1 ragge #define PSL_TP 0x40000000 /* trace pending */ 90 1.1 ragge #define PSL_CM 0x80000000 /* compatibility mode */ 91 1.1 ragge 92 1.1 ragge #define PSL_LOWIPL (PSL_K) 93 1.1 ragge #define PSL_HIGHIPL (PSL_K | PSL_IPL1F) 94 1.1 ragge #define PSL_IPL (PSL_IPL1F) 95 1.1 ragge #define PSL_USER (0) 96 1.1 ragge 97 1.1 ragge #define PSL_MBZ 0x3020ff00 /* must be zero bits */ 98 1.1 ragge 99 1.1 ragge #define PSL_USERSET (0) 100 1.1 ragge #define PSL_USERCLR (PSL_S | PSL_IPL1F | PSL_MBZ) 101 1.1 ragge 102 1.1 ragge /* 103 1.1 ragge * Macros to decode processor status word. 104 1.1 ragge */ 105 1.12 matt #define CLKF_USERMODE(framep) (((framep)->ps & PSL_U) == PSL_U) 106 1.1 ragge #define CLKF_PC(framep) ((framep)->pc) 107 1.12 matt #define CLKF_INTR(framep) (((framep)->ps & (PSL_IS|PSL_IPL1F)) \ 108 1.12 matt >= (PSL_IPL02|PSL_IS)) 109 1.1 ragge #define PSL2IPL(ps) ((ps) >> 16) 110 1.1 ragge 111 1.1 ragge #endif 112