1 1.24 ragge /* $NetBSD: pte.h,v 1.24 2017/05/22 17:12:11 ragge Exp $ */ 2 1.2 cgd 3 1.1 ragge /* 4 1.1 ragge * Copyright (c) 1994 Ludd, University of Lule}, Sweden. 5 1.1 ragge * All rights reserved. 6 1.1 ragge * 7 1.1 ragge * Redistribution and use in source and binary forms, with or without 8 1.1 ragge * modification, are permitted provided that the following conditions 9 1.1 ragge * are met: 10 1.1 ragge * 1. Redistributions of source code must retain the above copyright 11 1.1 ragge * notice, this list of conditions and the following disclaimer. 12 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 ragge * notice, this list of conditions and the following disclaimer in the 14 1.1 ragge * documentation and/or other materials provided with the distribution. 15 1.1 ragge * 16 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 1.1 ragge */ 27 1.1 ragge 28 1.13 ragge #ifndef _VAX_PTE_H_ 29 1.13 ragge #define _VAX_PTE_H_ 30 1.1 ragge 31 1.9 mycroft #ifndef _LOCORE 32 1.1 ragge /* 33 1.1 ragge * VAX page table entries 34 1.1 ragge */ 35 1.1 ragge struct pte { 36 1.6 ragge unsigned int pg_pfn:21; /* Page Frame Number or 0 */ 37 1.17 ragge unsigned int pg_illegal:2; /* Don't use this bits */ 38 1.6 ragge unsigned int pg_sref:1; /* Help for ref simulation */ 39 1.17 ragge unsigned int pg_w:1; /* Wired bit */ 40 1.6 ragge unsigned int pg_z:1; /* Zero DIGITAL = 0 */ 41 1.17 ragge unsigned int pg_m:1; /* Modify DIGITAL */ 42 1.17 ragge unsigned int pg_prot:4; /* reserved at zero */ 43 1.6 ragge unsigned int pg_v:1; /* valid bit */ 44 1.1 ragge }; 45 1.1 ragge 46 1.1 ragge 47 1.6 ragge typedef struct pte pt_entry_t; /* Mach page table entry */ 48 1.1 ragge 49 1.19 simonb #endif /* _LOCORE */ 50 1.1 ragge 51 1.17 ragge #define PG_V 0x80000000 52 1.17 ragge #define PG_NV 0x00000000 53 1.17 ragge #define PG_PROT 0x78000000 54 1.17 ragge #define PG_RW 0x20000000 55 1.17 ragge #define PG_KW 0x10000000 56 1.17 ragge #define PG_KR 0x18000000 57 1.17 ragge #define PG_URKW 0x70000000 58 1.17 ragge #define PG_RO 0x78000000 59 1.17 ragge #define PG_NONE 0x00000000 60 1.17 ragge #define PG_M 0x04000000 61 1.17 ragge #define PG_W 0x01000000 62 1.17 ragge #define PG_SREF 0x00800000 63 1.17 ragge #define PG_ILLEGAL 0x00600000 64 1.17 ragge #define PG_FRAME 0x001fffff 65 1.17 ragge #define PG_PFNUM(x) (((unsigned long)(x) & 0x3ffffe00) >> VAX_PGSHIFT) 66 1.1 ragge 67 1.9 mycroft #ifndef _LOCORE 68 1.4 ragge extern pt_entry_t *Sysmap; 69 1.1 ragge /* 70 1.1 ragge * Kernel virtual address to page table entry and to physical address. 71 1.1 ragge */ 72 1.1 ragge #endif 73 1.1 ragge 74 1.14 ragge #ifdef __GNUC__ 75 1.23 matt #define kvtopte(va) kvtopte0((vaddr_t) (va)) 76 1.23 matt static inline struct pte * 77 1.23 matt kvtopte0(vaddr_t va) 78 1.23 matt { 79 1.23 matt struct pte *pt; 80 1.23 matt #ifdef _RUMPKERNEL 81 1.23 matt __asm( 82 1.23 matt "extzv $9,$21,%1,%0\n\t" 83 1.23 matt "moval %2[%0],%0\n\t" 84 1.23 matt : "=r"(pt) 85 1.23 matt : "g"(va), "o"(*Sysmap)); 86 1.23 matt #else 87 1.23 matt __asm( 88 1.23 matt "extzv $9,$21,%1,%0\n\t" 89 1.23 matt "moval *Sysmap[%0],%0\n\t" 90 1.23 matt : "=r"(pt) 91 1.23 matt : "g"(va)); 92 1.23 matt #endif 93 1.23 matt return pt; 94 1.23 matt } 95 1.23 matt 96 1.23 matt #define kvtophys(va) kvtophys0((vaddr_t) (va)) 97 1.23 matt static inline paddr_t 98 1.23 matt kvtophys0(vaddr_t va) 99 1.23 matt { 100 1.23 matt paddr_t pa; 101 1.23 matt #ifdef _RUMPKERNEL 102 1.23 matt __asm( 103 1.23 matt "extzv $9,$21,%1,%0\n\t" 104 1.23 matt "ashl $9,%2[%0],%0\n\t" 105 1.23 matt "insv %1,$0,$9,%0\n\t" 106 1.23 matt : "=&r"(pa) 107 1.23 matt : "g"(va), "o"(*Sysmap) : "cc"); 108 1.23 matt #else 109 1.23 matt __asm( 110 1.23 matt "extzv $9,$21,%1,%0\n\t" 111 1.23 matt "ashl $9,*Sysmap[%0],%0\n\t" 112 1.23 matt "insv %1,$0,$9,%0\n\t" 113 1.23 matt : "=&r"(pa) 114 1.23 matt : "g"(va) : "cc"); 115 1.23 matt #endif 116 1.23 matt return pa; 117 1.23 matt } 118 1.14 ragge #else /* __GNUC__ */ 119 1.17 ragge #define kvtophys(va) \ 120 1.18 chs (((kvtopte(va))->pg_pfn << VAX_PGSHIFT) | ((paddr_t)(va) & VAX_PGOFSET)) 121 1.17 ragge #define kvtopte(va) (&Sysmap[PG_PFNUM(va)]) 122 1.14 ragge #endif /* __GNUC__ */ 123 1.17 ragge #define uvtopte(va, pcb) \ 124 1.18 chs (((vaddr_t)va < 0x40000000) ? \ 125 1.18 chs &(((pcb)->P0BR)[PG_PFNUM(va)]) : \ 126 1.18 chs &(((pcb)->P1BR)[PG_PFNUM(va)])) 127 1.13 ragge 128 1.13 ragge #endif 129