sid.h revision 1.5 1 1.5 ragge /* $NetBSD: sid.h,v 1.5 1995/02/23 17:51:44 ragge Exp $ */
2 1.3 cgd
3 1.1 ragge /*
4 1.1 ragge * Copyright (c) 1994 Ludd, University of Lule}, Sweden.
5 1.1 ragge * All rights reserved.
6 1.1 ragge *
7 1.1 ragge * Redistribution and use in source and binary forms, with or without
8 1.1 ragge * modification, are permitted provided that the following conditions
9 1.1 ragge * are met:
10 1.1 ragge * 1. Redistributions of source code must retain the above copyright
11 1.1 ragge * notice, this list of conditions and the following disclaimer.
12 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 ragge * notice, this list of conditions and the following disclaimer in the
14 1.1 ragge * documentation and/or other materials provided with the distribution.
15 1.1 ragge * 3. All advertising materials mentioning features or use of this software
16 1.1 ragge * must display the following acknowledgement:
17 1.1 ragge * This product includes software developed at Ludd, University of Lule}.
18 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
19 1.1 ragge * derived from this software without specific prior written permission
20 1.1 ragge *
21 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 ragge */
32 1.1 ragge
33 1.1 ragge /* All bugs are subject to removal without further notice */
34 1.1 ragge
35 1.1 ragge
36 1.1 ragge
37 1.1 ragge #define VAX_780 1
38 1.1 ragge #define VAX_750 2
39 1.1 ragge #define VAX_730 3
40 1.1 ragge #define VAX_8600 4
41 1.1 ragge #define VAX_8200 5
42 1.1 ragge #define VAX_8800 6
43 1.1 ragge #define VAX_610 7
44 1.5 ragge #define VAX_78032 8
45 1.1 ragge #define VAX_650 10
46 1.2 ragge #define VAX_MAX 10
47 1.1 ragge
48 1.1 ragge #define MACHID(x) ((x>>24)&255)
49 1.1 ragge
50 1.1 ragge #define V750UCODE(x) ((x>>8)&255)
51 1.1 ragge #define V750HARDW(x) (cpu_type&255)
52 1.5 ragge
53 1.5 ragge /*
54 1.5 ragge * The MicroVAXII CPU chip (78032) is used on more than one type of system
55 1.5 ragge * that are differentiated by the low order 8 bits of cpu_type. (Filled in
56 1.5 ragge * from the System Identification Extension Register.) To test for the cpu
57 1.5 ragge * chip, compare cpunumber == VAX_78032, but to test for a Qbus MicroVAXII
58 1.5 ragge * compare cpu_type == VAX_630.
59 1.5 ragge */
60 1.5 ragge #define VAX_630 0x8000001
61 1.5 ragge #define VAX_410 0x8000002
62 1.1 ragge
63 1.4 ragge extern int cpu_type, cpunumber;
64