uba_sbi.c revision 1.27.4.2 1 1.27.4.2 rmind /* $NetBSD: uba_sbi.c,v 1.27.4.2 2011/03/05 20:52:17 rmind Exp $ */
2 1.21 agc /*
3 1.21 agc * Copyright (c) 1982, 1986 The Regents of the University of California.
4 1.21 agc * All rights reserved.
5 1.21 agc *
6 1.21 agc * Redistribution and use in source and binary forms, with or without
7 1.21 agc * modification, are permitted provided that the following conditions
8 1.21 agc * are met:
9 1.21 agc * 1. Redistributions of source code must retain the above copyright
10 1.21 agc * notice, this list of conditions and the following disclaimer.
11 1.21 agc * 2. Redistributions in binary form must reproduce the above copyright
12 1.21 agc * notice, this list of conditions and the following disclaimer in the
13 1.21 agc * documentation and/or other materials provided with the distribution.
14 1.21 agc * 3. Neither the name of the University nor the names of its contributors
15 1.21 agc * may be used to endorse or promote products derived from this software
16 1.21 agc * without specific prior written permission.
17 1.21 agc *
18 1.21 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
19 1.21 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 1.21 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 1.21 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22 1.21 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 1.21 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 1.21 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 1.21 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 1.21 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 1.21 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 1.21 agc * SUCH DAMAGE.
29 1.21 agc *
30 1.21 agc * @(#)uba.c 7.10 (Berkeley) 12/16/90
31 1.21 agc * @(#)autoconf.c 7.20 (Berkeley) 5/9/91
32 1.21 agc */
33 1.21 agc
34 1.1 ragge /*
35 1.1 ragge * Copyright (c) 1996 Jonathan Stone.
36 1.1 ragge * Copyright (c) 1994, 1996 Ludd, University of Lule}, Sweden.
37 1.1 ragge *
38 1.1 ragge * Redistribution and use in source and binary forms, with or without
39 1.1 ragge * modification, are permitted provided that the following conditions
40 1.1 ragge * are met:
41 1.1 ragge * 1. Redistributions of source code must retain the above copyright
42 1.1 ragge * notice, this list of conditions and the following disclaimer.
43 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
44 1.1 ragge * notice, this list of conditions and the following disclaimer in the
45 1.1 ragge * documentation and/or other materials provided with the distribution.
46 1.1 ragge * 3. All advertising materials mentioning features or use of this software
47 1.1 ragge * must display the following acknowledgement:
48 1.1 ragge * This product includes software developed by the University of
49 1.1 ragge * California, Berkeley and its contributors.
50 1.1 ragge * 4. Neither the name of the University nor the names of its contributors
51 1.1 ragge * may be used to endorse or promote products derived from this software
52 1.1 ragge * without specific prior written permission.
53 1.1 ragge *
54 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
55 1.1 ragge * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
56 1.1 ragge * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
57 1.1 ragge * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
58 1.1 ragge * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
59 1.1 ragge * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
60 1.1 ragge * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
61 1.1 ragge * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
62 1.1 ragge * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
63 1.1 ragge * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64 1.1 ragge * SUCH DAMAGE.
65 1.1 ragge *
66 1.1 ragge * @(#)uba.c 7.10 (Berkeley) 12/16/90
67 1.1 ragge * @(#)autoconf.c 7.20 (Berkeley) 5/9/91
68 1.1 ragge */
69 1.20 lukem
70 1.27.4.1 rmind /*
71 1.27.4.1 rmind * Abus support added by Johnny Billquist 2010
72 1.27.4.1 rmind * Changed UBA code to need to know less of the innards of the
73 1.27.4.1 rmind * actual machine at the same time. Information passed down from
74 1.27.4.1 rmind * the SBI bus instead.
75 1.27.4.1 rmind */
76 1.27.4.1 rmind
77 1.20 lukem #include <sys/cdefs.h>
78 1.27.4.2 rmind __KERNEL_RCSID(0, "$NetBSD: uba_sbi.c,v 1.27.4.2 2011/03/05 20:52:17 rmind Exp $");
79 1.27.4.2 rmind
80 1.27.4.2 rmind #define _VAX_BUS_DMA_PRIVATE
81 1.1 ragge
82 1.1 ragge #include <sys/param.h>
83 1.1 ragge #include <sys/systm.h>
84 1.27.4.2 rmind #include <sys/bus.h>
85 1.27.4.2 rmind #include <sys/cpu.h>
86 1.27.4.2 rmind #include <sys/device.h>
87 1.1 ragge #include <sys/kernel.h>
88 1.1 ragge
89 1.1 ragge #include <machine/nexus.h>
90 1.1 ragge #include <machine/sgmap.h>
91 1.1 ragge #include <machine/scb.h>
92 1.1 ragge
93 1.1 ragge #include <dev/qbus/ubavar.h>
94 1.1 ragge
95 1.5 matt #include <vax/uba/uba_common.h>
96 1.1 ragge
97 1.6 ragge #include "locators.h"
98 1.1 ragge #include "ioconf.h"
99 1.1 ragge
100 1.1 ragge /* Some SBI-specific defines */
101 1.1 ragge #define UBASIZE (UBAPAGES * VAX_NBPG)
102 1.27.4.1 rmind #define UMEM(sa,i) ((sa->sa_base)+0x100000+(i)*0x40000)
103 1.1 ragge
104 1.1 ragge /*
105 1.1 ragge * Some status registers.
106 1.1 ragge */
107 1.1 ragge #define UBACNFGR_UBIC 0x00010000 /* unibus init complete */
108 1.1 ragge #define UBACNFGR_BITS \
109 1.1 ragge "\40\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT\30ADPDN\27ADPUP\23UBINIT\22UBPDN\21UBIC"
110 1.1 ragge
111 1.1 ragge #define UBACR_IFS 0x00000040 /* interrupt field switch */
112 1.1 ragge #define UBACR_BRIE 0x00000020 /* BR interrupt enable */
113 1.1 ragge #define UBACR_USEFIE 0x00000010 /* UNIBUS to SBI error field IE */
114 1.1 ragge #define UBACR_SUEFIE 0x00000008 /* SBI to UNIBUS error field IE */
115 1.1 ragge #define UBACR_ADINIT 0x00000001 /* adapter init */
116 1.1 ragge
117 1.1 ragge #define UBADPR_BNE 0x80000000 /* buffer not empty - purge */
118 1.1 ragge
119 1.1 ragge #define UBABRRVR_DIV 0x0000ffff /* device interrupt vector field */
120 1.1 ragge
121 1.1 ragge #define UBASR_BITS \
122 1.1 ragge "\20\13RDTO\12RDS\11CRD\10CXTER\7CXTMO\6DPPE\5IVMR\4MRPF\3LEB\2UBSTO\1UBSSYNTO"
123 1.1 ragge
124 1.24 matt const char ubasr_bits[] = UBASR_BITS;
125 1.1 ragge
126 1.1 ragge /*
127 1.1 ragge * The DW780 are directly connected to the SBI on 11/780 and 8600.
128 1.1 ragge */
129 1.24 matt static int dw780_match(device_t, cfdata_t, void *);
130 1.24 matt static void dw780_attach(device_t, device_t, void *);
131 1.6 ragge static void dw780_init(struct uba_softc*);
132 1.6 ragge static void dw780_beforescan(struct uba_softc *);
133 1.6 ragge static void dw780_afterscan(struct uba_softc *);
134 1.6 ragge static int dw780_errchk(struct uba_softc *);
135 1.25 hans static inline void uba_dw780int_common(void *, int);
136 1.25 hans static void uba_dw780int_0x14(void *);
137 1.25 hans static void uba_dw780int_0x15(void *);
138 1.25 hans static void uba_dw780int_0x16(void *);
139 1.25 hans static void uba_dw780int_0x17(void *);
140 1.6 ragge static void ubaerror(struct uba_softc *, int *, int *);
141 1.1 ragge #ifdef notyet
142 1.6 ragge static void dw780_purge(struct uba_softc *, int);
143 1.1 ragge #endif
144 1.1 ragge
145 1.24 matt CFATTACH_DECL_NEW(uba_sbi, sizeof(struct uba_vsoftc),
146 1.19 thorpej dw780_match, dw780_attach, NULL, NULL);
147 1.1 ragge
148 1.15 ragge static struct evcnt strayint = EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "uba","stray intr");
149 1.15 ragge static int strayinit = 0;
150 1.15 ragge
151 1.1 ragge extern struct vax_bus_space vax_mem_bus_space;
152 1.1 ragge
153 1.1 ragge int
154 1.24 matt dw780_match(device_t parent, cfdata_t cf, void *aux)
155 1.1 ragge {
156 1.24 matt struct sbi_attach_args * const sa = aux;
157 1.1 ragge
158 1.6 ragge if (cf->cf_loc[SBICF_TR] != sa->sa_nexnum &&
159 1.6 ragge cf->cf_loc[SBICF_TR] != SBICF_TR_DEFAULT)
160 1.1 ragge return 0;
161 1.1 ragge /*
162 1.1 ragge * The uba type is actually only telling where the uba
163 1.1 ragge * space is in nexus space.
164 1.1 ragge */
165 1.6 ragge if ((sa->sa_type & ~3) != NEX_UBA0)
166 1.1 ragge return 0;
167 1.1 ragge
168 1.1 ragge return 1;
169 1.1 ragge }
170 1.1 ragge
171 1.1 ragge void
172 1.24 matt dw780_attach(device_t parent, device_t self, void *aux)
173 1.1 ragge {
174 1.24 matt struct uba_vsoftc * const sc = device_private(self);
175 1.24 matt struct sbi_attach_args * const sa = aux;
176 1.6 ragge int ubaddr = sa->sa_type & 3;
177 1.1 ragge
178 1.27.4.1 rmind aprint_naive(": DW780\n");
179 1.24 matt aprint_normal(": DW780\n");
180 1.24 matt
181 1.1 ragge /*
182 1.1 ragge * Fill in bus specific data.
183 1.1 ragge */
184 1.24 matt sc->uv_sc.uh_dev = self;
185 1.1 ragge sc->uv_sc.uh_ubainit = dw780_init;
186 1.1 ragge #ifdef notyet
187 1.1 ragge sc->uv_sc.uh_ubapurge = dw780_purge;
188 1.1 ragge #endif
189 1.1 ragge sc->uv_sc.uh_beforescan = dw780_beforescan;
190 1.1 ragge sc->uv_sc.uh_afterscan = dw780_afterscan;
191 1.1 ragge sc->uv_sc.uh_errchk = dw780_errchk;
192 1.24 matt sc->uv_sc.uh_iot = sa->sa_iot;
193 1.1 ragge sc->uv_sc.uh_dmat = &sc->uv_dmat;
194 1.16 ragge sc->uv_sc.uh_nr = ubaddr;
195 1.6 ragge sc->uv_uba = (void *)sa->sa_ioh;
196 1.1 ragge sc->uh_ibase = VAX_NBPG + ubaddr * VAX_NBPG;
197 1.12 ragge sc->uv_sc.uh_type = UBA_UBA;
198 1.1 ragge
199 1.15 ragge if (strayinit++ == 0) evcnt_attach_static(&strayint); /* Setup stray
200 1.15 ragge interrupt
201 1.15 ragge counter. */
202 1.15 ragge
203 1.1 ragge /*
204 1.1 ragge * Set up dispatch vectors for DW780.
205 1.1 ragge */
206 1.25 hans #define SCB_VECALLOC_DW780(br) \
207 1.25 hans scb_vecalloc(vecnum(0, br, sa->sa_nexnum), uba_dw780int_ ## br, \
208 1.25 hans sc, SCB_ISTACK, &sc->uv_sc.uh_intrcnt) \
209 1.25 hans
210 1.25 hans SCB_VECALLOC_DW780(0x14);
211 1.25 hans SCB_VECALLOC_DW780(0x15);
212 1.25 hans SCB_VECALLOC_DW780(0x16);
213 1.25 hans SCB_VECALLOC_DW780(0x17);
214 1.25 hans
215 1.7 matt evcnt_attach_dynamic(&sc->uv_sc.uh_intrcnt, EVCNT_TYPE_INTR, NULL,
216 1.24 matt device_xname(sc->uv_sc.uh_dev), "intr");
217 1.5 matt
218 1.1 ragge /*
219 1.1 ragge * Fill in variables used by the sgmap system.
220 1.1 ragge */
221 1.4 ragge sc->uv_size = UBASIZE; /* Size in bytes of Unibus space */
222 1.1 ragge
223 1.1 ragge uba_dma_init(sc);
224 1.27.4.1 rmind uba_attach(&sc->uv_sc, UMEM(sa,ubaddr) + (UBAPAGES * VAX_NBPG));
225 1.1 ragge }
226 1.1 ragge
227 1.1 ragge void
228 1.13 ragge dw780_beforescan(struct uba_softc *sc)
229 1.1 ragge {
230 1.24 matt struct uba_vsoftc * const vc = (void *)sc;
231 1.1 ragge volatile int *hej = &vc->uv_uba->uba_sr;
232 1.1 ragge
233 1.1 ragge *hej = *hej;
234 1.1 ragge vc->uv_uba->uba_cr = UBACR_IFS|UBACR_BRIE;
235 1.1 ragge }
236 1.1 ragge
237 1.1 ragge void
238 1.13 ragge dw780_afterscan(struct uba_softc *sc)
239 1.1 ragge {
240 1.24 matt struct uba_vsoftc * const vc = (void *)sc;
241 1.1 ragge
242 1.1 ragge vc->uv_uba->uba_cr = UBACR_IFS | UBACR_BRIE |
243 1.1 ragge UBACR_USEFIE | UBACR_SUEFIE |
244 1.1 ragge (vc->uv_uba->uba_cr & 0x7c000000);
245 1.1 ragge }
246 1.1 ragge
247 1.1 ragge
248 1.1 ragge int
249 1.13 ragge dw780_errchk(struct uba_softc *sc)
250 1.1 ragge {
251 1.24 matt struct uba_vsoftc * const vc = (void *)sc;
252 1.1 ragge volatile int *hej = &vc->uv_uba->uba_sr;
253 1.1 ragge
254 1.1 ragge if (*hej) {
255 1.1 ragge *hej = *hej;
256 1.1 ragge return 1;
257 1.1 ragge }
258 1.1 ragge return 0;
259 1.1 ragge }
260 1.1 ragge
261 1.25 hans static inline void
262 1.25 hans uba_dw780int_common(void *arg, int br)
263 1.1 ragge {
264 1.13 ragge extern void scb_stray(void *);
265 1.2 matt struct uba_vsoftc *vc = arg;
266 1.1 ragge struct uba_regs *ur = vc->uv_uba;
267 1.13 ragge struct ivec_dsp *ivec;
268 1.15 ragge struct evcnt *uvec;
269 1.25 hans int vec;
270 1.1 ragge
271 1.15 ragge uvec = &vc->uv_sc.uh_intrcnt;
272 1.1 ragge vec = ur->uba_brrvr[br - 0x14];
273 1.14 ragge if (vec <= 0) {
274 1.14 ragge ubaerror(&vc->uv_sc, &br, &vec);
275 1.14 ragge if (vec == 0)
276 1.14 ragge return;
277 1.14 ragge }
278 1.13 ragge
279 1.15 ragge uvec->ev_count--; /* This interrupt should not be counted against
280 1.15 ragge the uba. */
281 1.15 ragge ivec = &scb_vec[(vc->uh_ibase + vec)/4];
282 1.15 ragge if (cold && *ivec->hoppaddr == scb_stray) {
283 1.1 ragge scb_fake(vec + vc->uh_ibase, br);
284 1.13 ragge } else {
285 1.15 ragge if (*ivec->hoppaddr == scb_stray)
286 1.15 ragge strayint.ev_count++; /* Count against stray int */
287 1.15 ragge else
288 1.15 ragge ivec->ev->ev_count++; /* Count against device */
289 1.13 ragge (*ivec->hoppaddr)(ivec->pushlarg);
290 1.1 ragge }
291 1.1 ragge }
292 1.1 ragge
293 1.25 hans #define UBA_DW780INT(br) \
294 1.25 hans void \
295 1.25 hans uba_dw780int_ ## br(void *arg) \
296 1.25 hans { \
297 1.25 hans uba_dw780int_common(arg, br); \
298 1.25 hans } \
299 1.25 hans
300 1.25 hans UBA_DW780INT(0x14);
301 1.25 hans UBA_DW780INT(0x15);
302 1.25 hans UBA_DW780INT(0x16);
303 1.25 hans UBA_DW780INT(0x17);
304 1.25 hans
305 1.1 ragge void
306 1.13 ragge dw780_init(struct uba_softc *sc)
307 1.1 ragge {
308 1.1 ragge struct uba_vsoftc *vc = (void *)sc;
309 1.1 ragge
310 1.1 ragge vc->uv_uba->uba_cr = UBACR_ADINIT;
311 1.1 ragge vc->uv_uba->uba_cr = UBACR_IFS|UBACR_BRIE|UBACR_USEFIE|UBACR_SUEFIE;
312 1.1 ragge while ((vc->uv_uba->uba_cnfgr & UBACNFGR_UBIC) == 0)
313 1.1 ragge ;
314 1.1 ragge }
315 1.1 ragge
316 1.1 ragge #ifdef notyet
317 1.1 ragge void
318 1.27 dsl dw780_purge(struct uba_softc *sc, int bdp)
319 1.1 ragge {
320 1.1 ragge struct uba_vsoftc *vc = (void *)sc;
321 1.1 ragge
322 1.1 ragge vc->uv_uba->uba_dpr[bdp] |= UBADPR_BNE;
323 1.1 ragge }
324 1.1 ragge #endif
325 1.1 ragge
326 1.1 ragge int ubawedgecnt = 10;
327 1.1 ragge int ubacrazy = 500;
328 1.1 ragge int zvcnt_max = 5000; /* in 8 sec */
329 1.1 ragge int ubaerrcnt;
330 1.1 ragge /*
331 1.1 ragge * This routine is called by the locore code to process a UBA
332 1.1 ragge * error on an 11/780 or 8600. The arguments are passed
333 1.1 ragge * on the stack, and value-result (through some trickery).
334 1.1 ragge * In particular, the uvec argument is used for further
335 1.1 ragge * uba processing so the result aspect of it is very important.
336 1.1 ragge */
337 1.1 ragge /*ARGSUSED*/
338 1.1 ragge void
339 1.13 ragge ubaerror(struct uba_softc *uh, int *ipl, int *uvec)
340 1.1 ragge {
341 1.1 ragge struct uba_vsoftc *vc = (void *)uh;
342 1.1 ragge struct uba_regs *uba = vc->uv_uba;
343 1.14 ragge int sr, s;
344 1.10 ragge char sbuf[256], sbuf2[256];
345 1.1 ragge
346 1.1 ragge if (*uvec == 0) {
347 1.1 ragge /*
348 1.1 ragge * Declare dt as unsigned so that negative values
349 1.1 ragge * are handled as >8 below, in case time was set back.
350 1.1 ragge */
351 1.23 joerg u_long dt = time_second - vc->uh_zvtime;
352 1.1 ragge
353 1.1 ragge vc->uh_zvtotal++;
354 1.1 ragge if (dt > 8) {
355 1.23 joerg vc->uh_zvtime = time_second;
356 1.1 ragge vc->uh_zvcnt = 0;
357 1.1 ragge }
358 1.1 ragge if (++vc->uh_zvcnt > zvcnt_max) {
359 1.24 matt aprint_error_dev(vc->uv_sc.uh_dev,
360 1.24 matt "too many zero vectors (%d in <%d sec)\n",
361 1.24 matt vc->uh_zvcnt, (int)dt + 1);
362 1.9 tv
363 1.26 christos snprintb(sbuf, sizeof(sbuf), UBACNFGR_BITS,
364 1.26 christos uba->uba_cnfgr & ~0xff);
365 1.24 matt aprint_error(
366 1.24 matt "\tIPL 0x%x\n"
367 1.24 matt "\tcnfgr: %s\tAdapter Code: 0x%x\n",
368 1.24 matt *ipl, sbuf, uba->uba_cnfgr&0xff);
369 1.24 matt
370 1.26 christos snprintb(sbuf, sizeof(sbuf), ubasr_bits, uba->uba_sr);
371 1.24 matt aprint_error(
372 1.24 matt "\tsr: %s\n"
373 1.24 matt "\tdcr: %x (MIC %sOK)\n",
374 1.24 matt sbuf, uba->uba_dcr,
375 1.24 matt (uba->uba_dcr&0x8000000)?"":"NOT ");
376 1.9 tv
377 1.3 ragge ubareset(&vc->uv_sc);
378 1.1 ragge }
379 1.1 ragge return;
380 1.1 ragge }
381 1.1 ragge if (uba->uba_cnfgr & NEX_CFGFLT) {
382 1.26 christos snprintb(sbuf, sizeof(sbuf), ubasr_bits, uba->uba_sr);
383 1.26 christos snprintb(sbuf2, sizeof(sbuf2), NEXFLT_BITS, uba->uba_cnfgr);
384 1.24 matt aprint_error_dev(vc->uv_sc.uh_dev,
385 1.24 matt "sbi fault sr=%s cnfgr=%s\n", sbuf, sbuf2);
386 1.3 ragge ubareset(&vc->uv_sc);
387 1.1 ragge *uvec = 0;
388 1.1 ragge return;
389 1.1 ragge }
390 1.1 ragge sr = uba->uba_sr;
391 1.11 thorpej s = spluba();
392 1.26 christos snprintb(sbuf, sizeof(sbuf), ubasr_bits, uba->uba_sr);
393 1.24 matt aprint_error_dev(vc->uv_sc.uh_dev,
394 1.24 matt "uba error sr=%s fmer=%x fubar=%o\n",
395 1.9 tv sbuf, uba->uba_fmer, 4*uba->uba_fubar);
396 1.1 ragge splx(s);
397 1.1 ragge uba->uba_sr = sr;
398 1.1 ragge *uvec &= UBABRRVR_DIV;
399 1.1 ragge if (++ubaerrcnt % ubawedgecnt == 0) {
400 1.1 ragge if (ubaerrcnt > ubacrazy)
401 1.1 ragge panic("uba crazy");
402 1.1 ragge printf("ERROR LIMIT ");
403 1.3 ragge ubareset(&vc->uv_sc);
404 1.1 ragge *uvec = 0;
405 1.1 ragge }
406 1.1 ragge }
407