asc_vsbus.c revision 1.14
1 /* $NetBSD: asc_vsbus.c,v 1.14 2000/05/23 23:47:29 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_vax46.h" 40 41 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 42 43 __KERNEL_RCSID(0, "$NetBSD: asc_vsbus.c,v 1.14 2000/05/23 23:47:29 matt Exp $"); 44 45 #include <sys/types.h> 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/errno.h> 50 #include <sys/ioctl.h> 51 #include <sys/device.h> 52 #include <sys/buf.h> 53 #include <sys/proc.h> 54 #include <sys/user.h> 55 #include <sys/reboot.h> 56 #include <sys/queue.h> 57 58 #include <dev/scsipi/scsi_all.h> 59 #include <dev/scsipi/scsipi_all.h> 60 #include <dev/scsipi/scsiconf.h> 61 #include <dev/scsipi/scsi_message.h> 62 63 #include <machine/bus.h> 64 #include <machine/vmparam.h> 65 66 #include <dev/ic/ncr53c9xreg.h> 67 #include <dev/ic/ncr53c9xvar.h> 68 69 #include <machine/cpu.h> 70 #include <machine/sid.h> 71 #include <machine/scb.h> 72 #include <machine/vsbus.h> 73 #include <machine/clock.h> /* for SCSI ctlr ID# XXX */ 74 75 struct asc_vsbus_softc { 76 struct ncr53c9x_softc sc_ncr53c9x; /* Must be first */ 77 bus_space_tag_t sc_bst; /* bus space tag */ 78 bus_space_handle_t sc_bsh; /* bus space handle */ 79 bus_space_handle_t sc_dirh; /* scsi direction handle */ 80 bus_space_handle_t sc_adrh; /* scsi address handle */ 81 bus_space_handle_t sc_ncrh; /* ncr bus space handle */ 82 bus_dma_tag_t sc_dmat; /* bus dma tag */ 83 bus_dmamap_t sc_dmamap; 84 caddr_t *sc_dmaaddr; 85 size_t *sc_dmalen; 86 size_t sc_dmasize; 87 unsigned int sc_flags; 88 #define ASC_FROMMEMORY 0x0001 /* Must be 1 */ 89 #define ASC_DMAACTIVE 0x0002 90 #define ASC_MAPLOADED 0x0004 91 unsigned long sc_xfers; 92 }; 93 94 #define ASC_REG_KA46_ADR 0x0000 95 #define ASC_REG_KA46_DIR 0x000C 96 #define ASC_REG_KA49_ADR 0x0000 97 #define ASC_REG_KA49_DIR 0x0004 98 #define ASC_REG_NCR 0x0080 99 #define ASC_REG_END 0x00B0 100 101 #define ASC_MAXXFERSIZE 65536 102 #define ASC_FREQUENCY 25000000 103 104 static int asc_vsbus_match __P((struct device *, struct cfdata *, void *)); 105 static void asc_vsbus_attach __P((struct device *, struct device *, void *)); 106 107 struct cfattach asc_vsbus_ca = { 108 sizeof(struct asc_vsbus_softc), asc_vsbus_match, asc_vsbus_attach 109 }; 110 111 static struct scsipi_device asc_vsbus_dev = { 112 NULL, /* Use the default error handler */ 113 NULL, /* have a queue, served by this */ 114 NULL, /* have no async handler */ 115 NULL, /* use the default done handler */ 116 }; 117 118 /* 119 * Functions and the switch for the MI code 120 */ 121 static u_char asc_vsbus_read_reg __P((struct ncr53c9x_softc *, int)); 122 static void asc_vsbus_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 123 static int asc_vsbus_dma_isintr __P((struct ncr53c9x_softc *)); 124 static void asc_vsbus_dma_reset __P((struct ncr53c9x_softc *)); 125 static int asc_vsbus_dma_intr __P((struct ncr53c9x_softc *)); 126 static int asc_vsbus_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 127 size_t *, int, size_t *)); 128 static void asc_vsbus_dma_go __P((struct ncr53c9x_softc *)); 129 static void asc_vsbus_dma_stop __P((struct ncr53c9x_softc *)); 130 static int asc_vsbus_dma_isactive __P((struct ncr53c9x_softc *)); 131 132 static struct ncr53c9x_glue asc_vsbus_glue = { 133 asc_vsbus_read_reg, 134 asc_vsbus_write_reg, 135 asc_vsbus_dma_isintr, 136 asc_vsbus_dma_reset, 137 asc_vsbus_dma_intr, 138 asc_vsbus_dma_setup, 139 asc_vsbus_dma_go, 140 asc_vsbus_dma_stop, 141 asc_vsbus_dma_isactive, 142 NULL, 143 }; 144 145 static u_int8_t asc_attached; /* can't have more than one asc */ 146 147 static int 148 asc_vsbus_match( struct device *parent, struct cfdata *cf, void *aux) 149 { 150 struct vsbus_attach_args *va = aux; 151 volatile u_int8_t *ncr_regs; 152 int dummy; 153 154 if (asc_attached) 155 return 0; 156 157 if (vax_boardtype == VAX_BTYP_46 || vax_boardtype == VAX_BTYP_48) { 158 if (cf->cf_loc[0] != 0x200c0080) 159 return 0; 160 #if 0 161 } else if (vax_boardtype == VAX_BTYP_49) { 162 if (cf->cf_loc[0] != 0x26000080) 163 return 0; 164 #endif 165 } else { 166 return 0; 167 } 168 169 ncr_regs = (volatile u_int8_t *) va->va_addr; 170 171 /* *** need to generate an interrupt here 172 * From trial and error, I've determined that an INT is generated 173 * only when the following sequence of events occurs: 174 * 1) The interrupt status register (0x05) must be read. 175 * 2) SCSI bus reset interrupt must be enabled 176 * 3) SCSI bus reset command must be sent 177 * 4) NOP command must be sent 178 */ 179 180 dummy = ncr_regs[NCR_INTR << 2] & 0xFF; 181 ncr_regs[NCR_CFG1 << 2] = 0x06; /* we're ID 6, turn on INT for SCSI reset */ 182 ncr_regs[NCR_CMD << 2] = NCRCMD_RSTSCSI; /* send the reset */ 183 ncr_regs[NCR_CMD << 2] = NCRCMD_NOP; /* send a NOP */ 184 DELAY(10000); 185 186 dummy = ncr_regs[NCR_INTR << 2] & 0xFF; 187 return (dummy & NCRINTR_SBR) != 0; 188 } 189 190 191 /* 192 * Attach this instance, and then all the sub-devices 193 */ 194 static void 195 asc_vsbus_attach(struct device *parent, struct device *self, void *aux) 196 { 197 struct vsbus_attach_args *va = aux; 198 struct asc_vsbus_softc *asc = (void *)self; 199 struct ncr53c9x_softc *sc = &asc->sc_ncr53c9x; 200 int error; 201 202 asc_attached = 1; 203 /* 204 * Set up glue for MI code early; we use some of it here. 205 */ 206 sc->sc_glue = &asc_vsbus_glue; 207 208 asc->sc_bst = va->va_iot; 209 asc->sc_dmat = va->va_dmat; 210 211 error = bus_space_map(asc->sc_bst, va->va_paddr - ASC_REG_NCR, 212 ASC_REG_END, 0, &asc->sc_bsh); 213 if (error) { 214 printf(": failed to map registers: error=%d\n", error); 215 return; 216 } 217 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, ASC_REG_NCR, 218 ASC_REG_END - ASC_REG_NCR, &asc->sc_ncrh); 219 if (error) { 220 printf(": failed to map ncr registers: error=%d\n", error); 221 return; 222 } 223 if (vax_boardtype == VAX_BTYP_46 || vax_boardtype == VAX_BTYP_48) { 224 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, 225 ASC_REG_KA46_ADR, sizeof(u_int32_t), &asc->sc_adrh); 226 if (error) { 227 printf(": failed to map adr register: error=%d\n", 228 error); 229 return; 230 } 231 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, 232 ASC_REG_KA46_DIR, sizeof(u_int32_t), &asc->sc_dirh); 233 if (error) { 234 printf(": failed to map dir register: error=%d\n", 235 error); 236 return; 237 } 238 } else { 239 /* This is a gross and disgusting kludge but it'll 240 * save a bunch of ugly code. Unlike the VS4000/60, 241 * the SCSI Address and direction registers are not 242 * near the SCSI NCR registers and are inside the 243 * block of general VAXstation registers. So we grab 244 * them from there and knowing the internals of the 245 * bus_space implementation, we cast to bus_space_handles. 246 */ 247 struct vsbus_softc *vsc = (struct vsbus_softc *) parent; 248 asc->sc_adrh = (bus_space_handle_t) (vsc->sc_vsregs + ASC_REG_KA49_ADR); 249 asc->sc_dirh = (bus_space_handle_t) (vsc->sc_vsregs + ASC_REG_KA49_DIR); 250 #if 0 251 printf("\n%s: adrh=0x%08lx dirh=0x%08lx", self->dv_xname, 252 asc->sc_adrh, asc->sc_dirh); 253 ncr53c9x_debug = NCR_SHOWDMA|NCR_SHOWINTS|NCR_SHOWCMDS|NCR_SHOWPHASE|NCR_SHOWSTART|NCR_SHOWMSGS; 254 #endif 255 } 256 error = bus_dmamap_create(asc->sc_dmat, ASC_MAXXFERSIZE, 1, 257 ASC_MAXXFERSIZE, 0, BUS_DMA_NOWAIT, &asc->sc_dmamap); 258 259 switch (vax_boardtype) { 260 #if defined(VAX46) 261 case VAX_BTYP_46: 262 sc->sc_id = (clk_page[0xbc/2] >> clk_tweak) & 7; 263 break; 264 #endif 265 default: 266 sc->sc_id = 6; /* XXX need to get this from VMB */ 267 break; 268 } 269 270 sc->sc_freq = ASC_FREQUENCY; 271 272 /* gimme Mhz */ 273 sc->sc_freq /= 1000000; 274 275 scb_vecalloc(va->va_cvec, (void (*)(void *)) ncr53c9x_intr, 276 &asc->sc_ncr53c9x, SCB_ISTACK); 277 278 /* 279 * XXX More of this should be in ncr53c9x_attach(), but 280 * XXX should we really poke around the chip that much in 281 * XXX the MI code? Think about this more... 282 */ 283 284 /* 285 * Set up static configuration info. 286 */ 287 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 288 sc->sc_cfg2 = NCRCFG2_SCSI2; 289 sc->sc_cfg3 = 0; 290 sc->sc_rev = NCR_VARIANT_NCR53C94; 291 292 /* 293 * XXX minsync and maxxfer _should_ be set up in MI code, 294 * XXX but it appears to have some dependency on what sort 295 * XXX of DMA we're hooked up to, etc. 296 */ 297 298 /* 299 * This is the value used to start sync negotiations 300 * Note that the NCR register "SYNCTP" is programmed 301 * in "clocks per byte", and has a minimum value of 4. 302 * The SCSI period used in negotiation is one-fourth 303 * of the time (in nanoseconds) needed to transfer one byte. 304 * Since the chip's clock is given in MHz, we have the following 305 * formula: 4 * period = (1000 / freq) * 4 306 */ 307 sc->sc_minsync = (1000 / sc->sc_freq); 308 sc->sc_maxxfer = 63 * 1024; 309 310 printf("\n%s", self->dv_xname); /* Pretty print */ 311 312 /* Do the common parts of attachment. */ 313 sc->sc_adapter.scsipi_cmd = ncr53c9x_scsi_cmd; 314 sc->sc_adapter.scsipi_minphys = minphys; 315 ncr53c9x_attach(sc, &asc_vsbus_dev); 316 } 317 318 /* 319 * Glue functions. 320 */ 321 322 static u_char 323 asc_vsbus_read_reg(struct ncr53c9x_softc *sc, int reg) 324 { 325 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 326 327 return bus_space_read_1(asc->sc_bst, asc->sc_ncrh, 328 reg * sizeof(u_int32_t)); 329 } 330 331 static void 332 asc_vsbus_write_reg(sc, reg, val) 333 struct ncr53c9x_softc *sc; 334 int reg; 335 u_char val; 336 { 337 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 338 339 bus_space_write_1(asc->sc_bst, asc->sc_ncrh, 340 reg * sizeof(u_int32_t), val); 341 } 342 343 static int 344 asc_vsbus_dma_isintr(sc) 345 struct ncr53c9x_softc *sc; 346 { 347 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 348 return bus_space_read_1(asc->sc_bst, asc->sc_ncrh, 349 NCR_STAT * sizeof(u_int32_t)) & NCRSTAT_INT; 350 } 351 352 static void 353 asc_vsbus_dma_reset(sc) 354 struct ncr53c9x_softc *sc; 355 { 356 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 357 358 if (asc->sc_flags & ASC_MAPLOADED) 359 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 360 asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED); 361 } 362 363 static int 364 asc_vsbus_dma_intr(sc) 365 struct ncr53c9x_softc *sc; 366 { 367 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 368 u_int tcl, tcm; 369 int trans, resid; 370 371 if ((asc->sc_flags & ASC_DMAACTIVE) == 0) 372 panic("asc_vsbus_dma_intr: DMA wasn't active"); 373 374 asc->sc_flags &= ~ASC_DMAACTIVE; 375 376 if (asc->sc_dmasize == 0) { 377 /* A "Transfer Pad" operation completed */ 378 tcl = NCR_READ_REG(sc, NCR_TCL); 379 tcm = NCR_READ_REG(sc, NCR_TCM); 380 NCR_DMA(("asc_vsbus_intr: discarded %d bytes (tcl=%d, tcm=%d)\n", 381 tcl | (tcm << 8), tcl, tcm)); 382 return 0; 383 } 384 385 resid = 0; 386 if ((resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) { 387 NCR_DMA(("asc_vsbus_intr: empty FIFO of %d ", resid)); 388 DELAY(1); 389 } 390 if (asc->sc_flags & ASC_MAPLOADED) { 391 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 392 0, asc->sc_dmasize, 393 asc->sc_flags & ASC_FROMMEMORY 394 ? BUS_DMASYNC_POSTWRITE 395 : BUS_DMASYNC_POSTREAD); 396 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 397 } 398 asc->sc_flags &= ~ASC_MAPLOADED; 399 400 resid += (tcl = NCR_READ_REG(sc, NCR_TCL)); 401 resid += (tcm = NCR_READ_REG(sc, NCR_TCM)) << 8; 402 403 trans = asc->sc_dmasize - resid; 404 if (trans < 0) { /* transferred < 0 ? */ 405 printf("asc_vsbus_intr: xfer (%d) > req (%d)\n", 406 trans, asc->sc_dmasize); 407 trans = asc->sc_dmasize; 408 } 409 NCR_DMA(("asc_vsbus_intr: tcl=%d, tcm=%d; trans=%d, resid=%d\n", 410 tcl, tcm, trans, resid)); 411 412 *asc->sc_dmalen -= trans; 413 *asc->sc_dmaaddr += trans; 414 415 asc->sc_xfers++; 416 return 0; 417 } 418 419 static int 420 asc_vsbus_dma_setup(struct ncr53c9x_softc *sc, caddr_t *addr, size_t *len, 421 int datain, size_t *dmasize) 422 { 423 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 424 425 asc->sc_dmaaddr = addr; 426 asc->sc_dmalen = len; 427 if (datain) { 428 asc->sc_flags &= ~ASC_FROMMEMORY; 429 } else { 430 asc->sc_flags |= ASC_FROMMEMORY; 431 } 432 if ((vaddr_t) *asc->sc_dmaaddr < VM_MIN_KERNEL_ADDRESS) 433 panic("asc_vsbus_dma_setup: dma address (%p) outside of kernel", 434 *asc->sc_dmaaddr); 435 436 NCR_DMA(("%s: start %d@%p,%d\n", sc->sc_dev.dv_xname, 437 (int)*asc->sc_dmalen, *asc->sc_dmaaddr, (asc->sc_flags & ASC_FROMMEMORY))); 438 *dmasize = asc->sc_dmasize = min(*dmasize, ASC_MAXXFERSIZE); 439 440 if (asc->sc_dmasize) { 441 if (bus_dmamap_load(asc->sc_dmat, asc->sc_dmamap, 442 *asc->sc_dmaaddr, asc->sc_dmasize, 443 NULL /* kernel address */, 444 BUS_DMA_NOWAIT|VAX_BUS_DMA_SPILLPAGE)) 445 panic("%s: cannot load dma map", sc->sc_dev.dv_xname); 446 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 447 0, asc->sc_dmasize, 448 asc->sc_flags & ASC_FROMMEMORY 449 ? BUS_DMASYNC_PREWRITE 450 : BUS_DMASYNC_PREREAD); 451 bus_space_write_4(asc->sc_bst, asc->sc_adrh, 0, 452 asc->sc_dmamap->dm_segs[0].ds_addr); 453 bus_space_write_4(asc->sc_bst, asc->sc_dirh, 0, 454 asc->sc_flags & ASC_FROMMEMORY); 455 NCR_DMA(("%s: dma-load %lu@0x%08lx\n", sc->sc_dev.dv_xname, 456 asc->sc_dmamap->dm_segs[0].ds_len, 457 asc->sc_dmamap->dm_segs[0].ds_addr)); 458 asc->sc_flags |= ASC_MAPLOADED; 459 } 460 461 return 0; 462 } 463 464 static void 465 asc_vsbus_dma_go(struct ncr53c9x_softc *sc) 466 { 467 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 468 469 asc->sc_flags |= ASC_DMAACTIVE; 470 } 471 472 static void 473 asc_vsbus_dma_stop(struct ncr53c9x_softc *sc) 474 { 475 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 476 477 if (asc->sc_flags & ASC_MAPLOADED) { 478 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 479 0, asc->sc_dmasize, 480 asc->sc_flags & ASC_FROMMEMORY 481 ? BUS_DMASYNC_POSTWRITE 482 : BUS_DMASYNC_POSTREAD); 483 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 484 } 485 486 asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED); 487 } 488 489 static int 490 asc_vsbus_dma_isactive(struct ncr53c9x_softc *sc) 491 { 492 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 493 494 return (asc->sc_flags & ASC_DMAACTIVE) != 0; 495 } 496
Indexes created Tue Sep 30 11:09:46 GMT 2025