asc_vsbus.c revision 1.36.6.2
1 /* $NetBSD: asc_vsbus.c,v 1.36.6.2 2008/06/02 13:22:48 mjf Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 33 34 __KERNEL_RCSID(0, "$NetBSD: asc_vsbus.c,v 1.36.6.2 2008/06/02 13:22:48 mjf Exp $"); 35 36 #include "locators.h" 37 #include "opt_cputype.h" 38 39 #include <sys/types.h> 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/errno.h> 44 #include <sys/ioctl.h> 45 #include <sys/device.h> 46 #include <sys/buf.h> 47 #include <sys/proc.h> 48 #include <sys/user.h> 49 #include <sys/reboot.h> 50 #include <sys/queue.h> 51 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsipi_all.h> 54 #include <dev/scsipi/scsiconf.h> 55 #include <dev/scsipi/scsi_message.h> 56 57 #include <machine/bus.h> 58 #include <machine/vmparam.h> 59 60 #include <dev/ic/ncr53c9xreg.h> 61 #include <dev/ic/ncr53c9xvar.h> 62 63 #include <machine/cpu.h> 64 #include <machine/sid.h> 65 #include <machine/scb.h> 66 #include <machine/vsbus.h> 67 #include <machine/clock.h> /* for SCSI ctlr ID# XXX */ 68 69 struct asc_vsbus_softc { 70 struct ncr53c9x_softc sc_ncr53c9x; /* Must be first */ 71 struct evcnt sc_intrcnt; /* count interrupts */ 72 bus_space_tag_t sc_bst; /* bus space tag */ 73 bus_space_handle_t sc_bsh; /* bus space handle */ 74 bus_space_handle_t sc_dirh; /* scsi direction handle */ 75 bus_space_handle_t sc_adrh; /* scsi address handle */ 76 bus_space_handle_t sc_ncrh; /* ncr bus space handle */ 77 bus_dma_tag_t sc_dmat; /* bus DMA tag */ 78 bus_dmamap_t sc_dmamap; 79 uint8_t **sc_dmaaddr; 80 size_t *sc_dmalen; 81 size_t sc_dmasize; 82 unsigned int sc_flags; 83 #define ASC_FROMMEMORY 0x0001 /* Must be 1 */ 84 #define ASC_DMAACTIVE 0x0002 85 #define ASC_MAPLOADED 0x0004 86 unsigned long sc_xfers; 87 }; 88 89 #define ASC_REG_KA46_ADR 0x0000 90 #define ASC_REG_KA46_DIR 0x000C 91 #define ASC_REG_KA49_ADR 0x0000 92 #define ASC_REG_KA49_DIR 0x0004 93 #define ASC_REG_NCR 0x0080 94 #define ASC_REG_END 0x00B0 95 96 #define ASC_MAXXFERSIZE 65536 97 #define ASC_FREQUENCY 25000000 98 99 static int asc_vsbus_match(device_t, cfdata_t, void *); 100 static void asc_vsbus_attach(device_t, device_t, void *); 101 102 CFATTACH_DECL_NEW(asc_vsbus, sizeof(struct asc_vsbus_softc), 103 asc_vsbus_match, asc_vsbus_attach, NULL, NULL); 104 105 /* 106 * Functions and the switch for the MI code 107 */ 108 static uint8_t asc_vsbus_read_reg(struct ncr53c9x_softc *, int); 109 static void asc_vsbus_write_reg(struct ncr53c9x_softc *, int, uint8_t); 110 static int asc_vsbus_dma_isintr(struct ncr53c9x_softc *); 111 static void asc_vsbus_dma_reset(struct ncr53c9x_softc *); 112 static int asc_vsbus_dma_intr(struct ncr53c9x_softc *); 113 static int asc_vsbus_dma_setup(struct ncr53c9x_softc *, uint8_t **, 114 size_t *, int, size_t *); 115 static void asc_vsbus_dma_go(struct ncr53c9x_softc *); 116 static void asc_vsbus_dma_stop(struct ncr53c9x_softc *); 117 static int asc_vsbus_dma_isactive(struct ncr53c9x_softc *); 118 119 static const struct ncr53c9x_glue asc_vsbus_glue = { 120 .gl_read_reg = asc_vsbus_read_reg, 121 .gl_write_reg = asc_vsbus_write_reg, 122 .gl_dma_isintr = asc_vsbus_dma_isintr, 123 .gl_dma_reset = asc_vsbus_dma_reset, 124 .gl_dma_intr = asc_vsbus_dma_intr, 125 .gl_dma_setup = asc_vsbus_dma_setup, 126 .gl_dma_go = asc_vsbus_dma_go, 127 .gl_dma_stop = asc_vsbus_dma_stop, 128 .gl_dma_isactive = asc_vsbus_dma_isactive, 129 }; 130 131 static uint8_t asc_attached; /* can't have more than one asc */ 132 133 static int 134 asc_vsbus_match(device_t parent, cfdata_t cf, void *aux) 135 { 136 struct vsbus_attach_args * const va = aux; 137 volatile uint8_t *ncr_regs; 138 int dummy; 139 140 if (asc_attached) 141 return 0; 142 143 if (vax_boardtype == VAX_BTYP_46 || vax_boardtype == VAX_BTYP_48) { 144 if (cf->cf_loc[VSBUSCF_CSR] != 0x200c0080) 145 return 0; 146 } else if (vax_boardtype == VAX_BTYP_49 || 147 vax_boardtype == VAX_BTYP_53) { 148 if (cf->cf_loc[VSBUSCF_CSR] != 0x26000080) 149 return 0; 150 } else { 151 return 0; 152 } 153 154 ncr_regs = (volatile uint8_t *) va->va_addr; 155 156 /* *** need to generate an interrupt here 157 * From trial and error, I've determined that an INT is generated 158 * only when the following sequence of events occurs: 159 * 1) The interrupt status register (0x05) must be read. 160 * 2) SCSI bus reset interrupt must be enabled 161 * 3) SCSI bus reset command must be sent 162 * 4) NOP command must be sent 163 */ 164 165 dummy = ncr_regs[NCR_INTR << 2] & 0xFF; 166 ncr_regs[NCR_CFG1 << 2] = 0x06; /* we're ID 6, turn on INT for SCSI reset */ 167 ncr_regs[NCR_CMD << 2] = NCRCMD_RSTSCSI; /* send the reset */ 168 ncr_regs[NCR_CMD << 2] = NCRCMD_NOP; /* send a NOP */ 169 DELAY(10000); 170 171 dummy = ncr_regs[NCR_INTR << 2] & 0xFF; 172 return (dummy & NCRINTR_SBR) != 0; 173 } 174 175 176 /* 177 * Attach this instance, and then all the sub-devices 178 */ 179 static void 180 asc_vsbus_attach(device_t parent, device_t self, void *aux) 181 { 182 struct vsbus_attach_args * const va = aux; 183 struct asc_vsbus_softc * const asc = device_private(self); 184 struct ncr53c9x_softc * const sc = &asc->sc_ncr53c9x; 185 int error; 186 187 asc_attached = 1; 188 /* 189 * Set up glue for MI code early; we use some of it here. 190 */ 191 sc->sc_dev = self; 192 sc->sc_glue = &asc_vsbus_glue; 193 194 asc->sc_bst = va->va_memt; 195 asc->sc_dmat = va->va_dmat; 196 197 error = bus_space_map(asc->sc_bst, va->va_paddr - ASC_REG_NCR, 198 ASC_REG_END, 0, &asc->sc_bsh); 199 if (error) { 200 aprint_error(": failed to map registers: error=%d\n", error); 201 return; 202 } 203 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, ASC_REG_NCR, 204 ASC_REG_END - ASC_REG_NCR, &asc->sc_ncrh); 205 if (error) { 206 aprint_error(": failed to map ncr registers: error=%d\n", 207 error); 208 return; 209 } 210 if (vax_boardtype == VAX_BTYP_46 || vax_boardtype == VAX_BTYP_48) { 211 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, 212 ASC_REG_KA46_ADR, sizeof(uint32_t), &asc->sc_adrh); 213 if (error) { 214 aprint_error(": failed to map adr register: error=%d\n", 215 error); 216 return; 217 } 218 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, 219 ASC_REG_KA46_DIR, sizeof(uint32_t), &asc->sc_dirh); 220 if (error) { 221 aprint_error(": failed to map dir register: error=%d\n", 222 error); 223 return; 224 } 225 } else { 226 /* This is a gross and disgusting kludge but it'll 227 * save a bunch of ugly code. Unlike the VS4000/60, 228 * the SCSI Address and direction registers are not 229 * near the SCSI NCR registers and are inside the 230 * block of general VAXstation registers. So we grab 231 * them from there and knowing the internals of the 232 * bus_space implementation, we cast to bus_space_handles. 233 */ 234 struct vsbus_softc *vsc = device_private(parent); 235 asc->sc_adrh = 236 (bus_space_handle_t)(vsc->sc_vsregs + ASC_REG_KA49_ADR); 237 asc->sc_dirh = 238 (bus_space_handle_t)(vsc->sc_vsregs + ASC_REG_KA49_DIR); 239 #if 0 240 printf("\n%s: adrh=0x%08lx dirh=0x%08lx", device_xname(self), 241 asc->sc_adrh, asc->sc_dirh); 242 ncr53c9x_debug = NCR_SHOWDMA | NCR_SHOWINTS | NCR_SHOWCMDS | 243 NCR_SHOWPHASE | NCR_SHOWSTART | NCR_SHOWMSGS; 244 #endif 245 } 246 error = bus_dmamap_create(asc->sc_dmat, ASC_MAXXFERSIZE, 1, 247 ASC_MAXXFERSIZE, 0, BUS_DMA_NOWAIT, &asc->sc_dmamap); 248 249 #if defined(VAX46) || defined(VAX48) || defined(VAX49) || defined(VAXANY) 250 if(vax_boardtype != VAX_BTYP_53) 251 /* SCSI ID is store in the clock NVRAM at magic address 0xbc */ 252 sc->sc_id = (clk_page[0xbc / 2] >> clk_tweak) & 7; 253 else 254 #endif 255 sc->sc_id = 6; /* XXX need to get this from VMB */ 256 sc->sc_freq = ASC_FREQUENCY; 257 258 /* gimme MHz */ 259 sc->sc_freq /= 1000000; 260 261 scb_vecalloc(va->va_cvec, (void (*)(void *))ncr53c9x_intr, 262 &asc->sc_ncr53c9x, SCB_ISTACK, &asc->sc_intrcnt); 263 evcnt_attach_dynamic(&asc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 264 device_xname(self), "intr"); 265 266 /* 267 * XXX More of this should be in ncr53c9x_attach(), but 268 * XXX should we really poke around the chip that much in 269 * XXX the MI code? Think about this more... 270 */ 271 272 /* 273 * Set up static configuration info. 274 */ 275 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 276 sc->sc_cfg2 = NCRCFG2_SCSI2; 277 sc->sc_cfg3 = 0; 278 sc->sc_rev = NCR_VARIANT_NCR53C94; 279 280 /* 281 * XXX minsync and maxxfer _should_ be set up in MI code, 282 * XXX but it appears to have some dependency on what sort 283 * XXX of DMA we're hooked up to, etc. 284 */ 285 286 /* 287 * This is the value used to start sync negotiations 288 * Note that the NCR register "SYNCTP" is programmed 289 * in "clocks per byte", and has a minimum value of 4. 290 * The SCSI period used in negotiation is one-fourth 291 * of the time (in nanoseconds) needed to transfer one byte. 292 * Since the chip's clock is given in MHz, we have the following 293 * formula: 4 * period = (1000 / freq) * 4 294 */ 295 sc->sc_minsync = (1000 / sc->sc_freq); 296 sc->sc_maxxfer = 64 * 1024; 297 298 aprint_normal("\n%s", device_xname(self)); /* Pretty print */ 299 300 /* Do the common parts of attachment. */ 301 sc->sc_adapter.adapt_minphys = minphys; 302 sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request; 303 ncr53c9x_attach(sc); 304 } 305 306 /* 307 * Glue functions. 308 */ 309 310 static uint8_t 311 asc_vsbus_read_reg(struct ncr53c9x_softc *sc, int reg) 312 { 313 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 314 315 return bus_space_read_1(asc->sc_bst, asc->sc_ncrh, 316 reg * sizeof(uint32_t)); 317 } 318 319 static void 320 asc_vsbus_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val) 321 { 322 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 323 324 bus_space_write_1(asc->sc_bst, asc->sc_ncrh, 325 reg * sizeof(uint32_t), val); 326 } 327 328 static int 329 asc_vsbus_dma_isintr(struct ncr53c9x_softc *sc) 330 { 331 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 332 333 return bus_space_read_1(asc->sc_bst, asc->sc_ncrh, 334 NCR_STAT * sizeof(uint32_t)) & NCRSTAT_INT; 335 } 336 337 static void 338 asc_vsbus_dma_reset(struct ncr53c9x_softc *sc) 339 { 340 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 341 342 if (asc->sc_flags & ASC_MAPLOADED) 343 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 344 asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED); 345 } 346 347 static int 348 asc_vsbus_dma_intr(struct ncr53c9x_softc *sc) 349 { 350 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 351 u_int tcl, tcm; 352 int trans, resid; 353 354 if ((asc->sc_flags & ASC_DMAACTIVE) == 0) 355 panic("%s: DMA wasn't active", __func__); 356 357 asc->sc_flags &= ~ASC_DMAACTIVE; 358 359 if (asc->sc_dmasize == 0) { 360 /* A "Transfer Pad" operation completed */ 361 tcl = NCR_READ_REG(sc, NCR_TCL); 362 tcm = NCR_READ_REG(sc, NCR_TCM); 363 NCR_DMA(("asc_vsbus_intr: discarded %d bytes (tcl=%d, tcm=%d)\n", 364 tcl | (tcm << 8), tcl, tcm)); 365 return 0; 366 } 367 368 resid = 0; 369 if ((resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) { 370 NCR_DMA(("asc_vsbus_intr: empty FIFO of %d ", resid)); 371 DELAY(1); 372 } 373 if (asc->sc_flags & ASC_MAPLOADED) { 374 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 375 0, asc->sc_dmasize, 376 asc->sc_flags & ASC_FROMMEMORY 377 ? BUS_DMASYNC_POSTWRITE 378 : BUS_DMASYNC_POSTREAD); 379 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 380 } 381 asc->sc_flags &= ~ASC_MAPLOADED; 382 383 resid += (tcl = NCR_READ_REG(sc, NCR_TCL)); 384 resid += (tcm = NCR_READ_REG(sc, NCR_TCM)) << 8; 385 386 trans = asc->sc_dmasize - resid; 387 if (trans < 0) { /* transferred < 0 ? */ 388 printf("asc_vsbus_intr: xfer (%d) > req (%lu)\n", 389 trans, (u_long) asc->sc_dmasize); 390 trans = asc->sc_dmasize; 391 } 392 NCR_DMA(("asc_vsbus_intr: tcl=%d, tcm=%d; trans=%d, resid=%d\n", 393 tcl, tcm, trans, resid)); 394 395 *asc->sc_dmalen -= trans; 396 *asc->sc_dmaaddr += trans; 397 398 asc->sc_xfers++; 399 return 0; 400 } 401 402 static int 403 asc_vsbus_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len, 404 int datain, size_t *dmasize) 405 { 406 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 407 408 asc->sc_dmaaddr = addr; 409 asc->sc_dmalen = len; 410 if (datain) { 411 asc->sc_flags &= ~ASC_FROMMEMORY; 412 } else { 413 asc->sc_flags |= ASC_FROMMEMORY; 414 } 415 if ((vaddr_t)*asc->sc_dmaaddr < VM_MIN_KERNEL_ADDRESS) 416 panic("%s: DMA address (%p) outside of kernel", 417 __func__, *asc->sc_dmaaddr); 418 419 NCR_DMA(("%s: start %d@%p,%d\n", device_xname(&sc->sc_dev), 420 (int)*asc->sc_dmalen, *asc->sc_dmaaddr, 421 (asc->sc_flags & ASC_FROMMEMORY))); 422 *dmasize = asc->sc_dmasize = min(*dmasize, ASC_MAXXFERSIZE); 423 424 if (asc->sc_dmasize) { 425 if (bus_dmamap_load(asc->sc_dmat, asc->sc_dmamap, 426 *asc->sc_dmaaddr, asc->sc_dmasize, 427 NULL /* kernel address */, 428 BUS_DMA_NOWAIT|VAX_BUS_DMA_SPILLPAGE)) 429 panic("%s: cannot load DMA map", 430 device_xname(sc->sc_dev)); 431 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 432 0, asc->sc_dmasize, 433 asc->sc_flags & ASC_FROMMEMORY 434 ? BUS_DMASYNC_PREWRITE 435 : BUS_DMASYNC_PREREAD); 436 bus_space_write_4(asc->sc_bst, asc->sc_adrh, 0, 437 asc->sc_dmamap->dm_segs[0].ds_addr); 438 bus_space_write_4(asc->sc_bst, asc->sc_dirh, 0, 439 asc->sc_flags & ASC_FROMMEMORY); 440 NCR_DMA(("%s: dma-load %lu@0x%08lx\n", 441 device_xname(sc->sc_dev), 442 asc->sc_dmamap->dm_segs[0].ds_len, 443 asc->sc_dmamap->dm_segs[0].ds_addr)); 444 asc->sc_flags |= ASC_MAPLOADED; 445 } 446 447 return 0; 448 } 449 450 static void 451 asc_vsbus_dma_go(struct ncr53c9x_softc *sc) 452 { 453 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 454 455 asc->sc_flags |= ASC_DMAACTIVE; 456 } 457 458 static void 459 asc_vsbus_dma_stop(struct ncr53c9x_softc *sc) 460 { 461 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 462 463 if (asc->sc_flags & ASC_MAPLOADED) { 464 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 465 0, asc->sc_dmasize, 466 asc->sc_flags & ASC_FROMMEMORY 467 ? BUS_DMASYNC_POSTWRITE 468 : BUS_DMASYNC_POSTREAD); 469 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 470 } 471 472 asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED); 473 } 474 475 static int 476 asc_vsbus_dma_isactive(struct ncr53c9x_softc *sc) 477 { 478 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 479 480 return (asc->sc_flags & ASC_DMAACTIVE) != 0; 481 } 482
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