asc_vsbus.c revision 1.39
1 /* $NetBSD: asc_vsbus.c,v 1.39 2008/04/13 04:55:53 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 40 41 __KERNEL_RCSID(0, "$NetBSD: asc_vsbus.c,v 1.39 2008/04/13 04:55:53 tsutsui Exp $"); 42 43 #include "locators.h" 44 #include "opt_cputype.h" 45 46 #include <sys/types.h> 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/kernel.h> 50 #include <sys/errno.h> 51 #include <sys/ioctl.h> 52 #include <sys/device.h> 53 #include <sys/buf.h> 54 #include <sys/proc.h> 55 #include <sys/user.h> 56 #include <sys/reboot.h> 57 #include <sys/queue.h> 58 59 #include <dev/scsipi/scsi_all.h> 60 #include <dev/scsipi/scsipi_all.h> 61 #include <dev/scsipi/scsiconf.h> 62 #include <dev/scsipi/scsi_message.h> 63 64 #include <machine/bus.h> 65 #include <machine/vmparam.h> 66 67 #include <dev/ic/ncr53c9xreg.h> 68 #include <dev/ic/ncr53c9xvar.h> 69 70 #include <machine/cpu.h> 71 #include <machine/sid.h> 72 #include <machine/scb.h> 73 #include <machine/vsbus.h> 74 #include <machine/clock.h> /* for SCSI ctlr ID# XXX */ 75 76 struct asc_vsbus_softc { 77 struct ncr53c9x_softc sc_ncr53c9x; /* Must be first */ 78 struct evcnt sc_intrcnt; /* count interrupts */ 79 bus_space_tag_t sc_bst; /* bus space tag */ 80 bus_space_handle_t sc_bsh; /* bus space handle */ 81 bus_space_handle_t sc_dirh; /* scsi direction handle */ 82 bus_space_handle_t sc_adrh; /* scsi address handle */ 83 bus_space_handle_t sc_ncrh; /* ncr bus space handle */ 84 bus_dma_tag_t sc_dmat; /* bus DMA tag */ 85 bus_dmamap_t sc_dmamap; 86 uint8_t **sc_dmaaddr; 87 size_t *sc_dmalen; 88 size_t sc_dmasize; 89 unsigned int sc_flags; 90 #define ASC_FROMMEMORY 0x0001 /* Must be 1 */ 91 #define ASC_DMAACTIVE 0x0002 92 #define ASC_MAPLOADED 0x0004 93 unsigned long sc_xfers; 94 }; 95 96 #define ASC_REG_KA46_ADR 0x0000 97 #define ASC_REG_KA46_DIR 0x000C 98 #define ASC_REG_KA49_ADR 0x0000 99 #define ASC_REG_KA49_DIR 0x0004 100 #define ASC_REG_NCR 0x0080 101 #define ASC_REG_END 0x00B0 102 103 #define ASC_MAXXFERSIZE 65536 104 #define ASC_FREQUENCY 25000000 105 106 static int asc_vsbus_match(device_t, cfdata_t, void *); 107 static void asc_vsbus_attach(device_t, device_t, void *); 108 109 CFATTACH_DECL_NEW(asc_vsbus, sizeof(struct asc_vsbus_softc), 110 asc_vsbus_match, asc_vsbus_attach, NULL, NULL); 111 112 /* 113 * Functions and the switch for the MI code 114 */ 115 static uint8_t asc_vsbus_read_reg(struct ncr53c9x_softc *, int); 116 static void asc_vsbus_write_reg(struct ncr53c9x_softc *, int, uint8_t); 117 static int asc_vsbus_dma_isintr(struct ncr53c9x_softc *); 118 static void asc_vsbus_dma_reset(struct ncr53c9x_softc *); 119 static int asc_vsbus_dma_intr(struct ncr53c9x_softc *); 120 static int asc_vsbus_dma_setup(struct ncr53c9x_softc *, uint8_t **, 121 size_t *, int, size_t *); 122 static void asc_vsbus_dma_go(struct ncr53c9x_softc *); 123 static void asc_vsbus_dma_stop(struct ncr53c9x_softc *); 124 static int asc_vsbus_dma_isactive(struct ncr53c9x_softc *); 125 126 static const struct ncr53c9x_glue asc_vsbus_glue = { 127 .gl_read_reg = asc_vsbus_read_reg, 128 .gl_write_reg = asc_vsbus_write_reg, 129 .gl_dma_isintr = asc_vsbus_dma_isintr, 130 .gl_dma_reset = asc_vsbus_dma_reset, 131 .gl_dma_intr = asc_vsbus_dma_intr, 132 .gl_dma_setup = asc_vsbus_dma_setup, 133 .gl_dma_go = asc_vsbus_dma_go, 134 .gl_dma_stop = asc_vsbus_dma_stop, 135 .gl_dma_isactive = asc_vsbus_dma_isactive, 136 }; 137 138 static uint8_t asc_attached; /* can't have more than one asc */ 139 140 static int 141 asc_vsbus_match(device_t parent, cfdata_t cf, void *aux) 142 { 143 struct vsbus_attach_args * const va = aux; 144 volatile uint8_t *ncr_regs; 145 int dummy; 146 147 if (asc_attached) 148 return 0; 149 150 if (vax_boardtype == VAX_BTYP_46 || vax_boardtype == VAX_BTYP_48) { 151 if (cf->cf_loc[VSBUSCF_CSR] != 0x200c0080) 152 return 0; 153 } else if (vax_boardtype == VAX_BTYP_49 || 154 vax_boardtype == VAX_BTYP_53) { 155 if (cf->cf_loc[VSBUSCF_CSR] != 0x26000080) 156 return 0; 157 } else { 158 return 0; 159 } 160 161 ncr_regs = (volatile uint8_t *) va->va_addr; 162 163 /* *** need to generate an interrupt here 164 * From trial and error, I've determined that an INT is generated 165 * only when the following sequence of events occurs: 166 * 1) The interrupt status register (0x05) must be read. 167 * 2) SCSI bus reset interrupt must be enabled 168 * 3) SCSI bus reset command must be sent 169 * 4) NOP command must be sent 170 */ 171 172 dummy = ncr_regs[NCR_INTR << 2] & 0xFF; 173 ncr_regs[NCR_CFG1 << 2] = 0x06; /* we're ID 6, turn on INT for SCSI reset */ 174 ncr_regs[NCR_CMD << 2] = NCRCMD_RSTSCSI; /* send the reset */ 175 ncr_regs[NCR_CMD << 2] = NCRCMD_NOP; /* send a NOP */ 176 DELAY(10000); 177 178 dummy = ncr_regs[NCR_INTR << 2] & 0xFF; 179 return (dummy & NCRINTR_SBR) != 0; 180 } 181 182 183 /* 184 * Attach this instance, and then all the sub-devices 185 */ 186 static void 187 asc_vsbus_attach(device_t parent, device_t self, void *aux) 188 { 189 struct vsbus_attach_args * const va = aux; 190 struct asc_vsbus_softc * const asc = device_private(self); 191 struct ncr53c9x_softc * const sc = &asc->sc_ncr53c9x; 192 int error; 193 194 asc_attached = 1; 195 /* 196 * Set up glue for MI code early; we use some of it here. 197 */ 198 sc->sc_dev = self; 199 sc->sc_glue = &asc_vsbus_glue; 200 201 asc->sc_bst = va->va_memt; 202 asc->sc_dmat = va->va_dmat; 203 204 error = bus_space_map(asc->sc_bst, va->va_paddr - ASC_REG_NCR, 205 ASC_REG_END, 0, &asc->sc_bsh); 206 if (error) { 207 aprint_error(": failed to map registers: error=%d\n", error); 208 return; 209 } 210 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, ASC_REG_NCR, 211 ASC_REG_END - ASC_REG_NCR, &asc->sc_ncrh); 212 if (error) { 213 aprint_error(": failed to map ncr registers: error=%d\n", 214 error); 215 return; 216 } 217 if (vax_boardtype == VAX_BTYP_46 || vax_boardtype == VAX_BTYP_48) { 218 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, 219 ASC_REG_KA46_ADR, sizeof(uint32_t), &asc->sc_adrh); 220 if (error) { 221 aprint_error(": failed to map adr register: error=%d\n", 222 error); 223 return; 224 } 225 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, 226 ASC_REG_KA46_DIR, sizeof(uint32_t), &asc->sc_dirh); 227 if (error) { 228 aprint_error(": failed to map dir register: error=%d\n", 229 error); 230 return; 231 } 232 } else { 233 /* This is a gross and disgusting kludge but it'll 234 * save a bunch of ugly code. Unlike the VS4000/60, 235 * the SCSI Address and direction registers are not 236 * near the SCSI NCR registers and are inside the 237 * block of general VAXstation registers. So we grab 238 * them from there and knowing the internals of the 239 * bus_space implementation, we cast to bus_space_handles. 240 */ 241 struct vsbus_softc *vsc = device_private(parent); 242 asc->sc_adrh = 243 (bus_space_handle_t)(vsc->sc_vsregs + ASC_REG_KA49_ADR); 244 asc->sc_dirh = 245 (bus_space_handle_t)(vsc->sc_vsregs + ASC_REG_KA49_DIR); 246 #if 0 247 printf("\n%s: adrh=0x%08lx dirh=0x%08lx", device_xname(self), 248 asc->sc_adrh, asc->sc_dirh); 249 ncr53c9x_debug = NCR_SHOWDMA | NCR_SHOWINTS | NCR_SHOWCMDS | 250 NCR_SHOWPHASE | NCR_SHOWSTART | NCR_SHOWMSGS; 251 #endif 252 } 253 error = bus_dmamap_create(asc->sc_dmat, ASC_MAXXFERSIZE, 1, 254 ASC_MAXXFERSIZE, 0, BUS_DMA_NOWAIT, &asc->sc_dmamap); 255 256 #if defined(VAX46) || defined(VAX48) || defined(VAX49) || defined(VAXANY) 257 if(vax_boardtype != VAX_BTYP_53) 258 /* SCSI ID is store in the clock NVRAM at magic address 0xbc */ 259 sc->sc_id = (clk_page[0xbc / 2] >> clk_tweak) & 7; 260 else 261 #endif 262 sc->sc_id = 6; /* XXX need to get this from VMB */ 263 sc->sc_freq = ASC_FREQUENCY; 264 265 /* gimme MHz */ 266 sc->sc_freq /= 1000000; 267 268 scb_vecalloc(va->va_cvec, (void (*)(void *))ncr53c9x_intr, 269 &asc->sc_ncr53c9x, SCB_ISTACK, &asc->sc_intrcnt); 270 evcnt_attach_dynamic(&asc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 271 device_xname(self), "intr"); 272 273 /* 274 * XXX More of this should be in ncr53c9x_attach(), but 275 * XXX should we really poke around the chip that much in 276 * XXX the MI code? Think about this more... 277 */ 278 279 /* 280 * Set up static configuration info. 281 */ 282 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 283 sc->sc_cfg2 = NCRCFG2_SCSI2; 284 sc->sc_cfg3 = 0; 285 sc->sc_rev = NCR_VARIANT_NCR53C94; 286 287 /* 288 * XXX minsync and maxxfer _should_ be set up in MI code, 289 * XXX but it appears to have some dependency on what sort 290 * XXX of DMA we're hooked up to, etc. 291 */ 292 293 /* 294 * This is the value used to start sync negotiations 295 * Note that the NCR register "SYNCTP" is programmed 296 * in "clocks per byte", and has a minimum value of 4. 297 * The SCSI period used in negotiation is one-fourth 298 * of the time (in nanoseconds) needed to transfer one byte. 299 * Since the chip's clock is given in MHz, we have the following 300 * formula: 4 * period = (1000 / freq) * 4 301 */ 302 sc->sc_minsync = (1000 / sc->sc_freq); 303 sc->sc_maxxfer = 64 * 1024; 304 305 aprint_normal("\n%s", device_xname(self)); /* Pretty print */ 306 307 /* Do the common parts of attachment. */ 308 sc->sc_adapter.adapt_minphys = minphys; 309 sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request; 310 ncr53c9x_attach(sc); 311 } 312 313 /* 314 * Glue functions. 315 */ 316 317 static uint8_t 318 asc_vsbus_read_reg(struct ncr53c9x_softc *sc, int reg) 319 { 320 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 321 322 return bus_space_read_1(asc->sc_bst, asc->sc_ncrh, 323 reg * sizeof(uint32_t)); 324 } 325 326 static void 327 asc_vsbus_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t val) 328 { 329 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 330 331 bus_space_write_1(asc->sc_bst, asc->sc_ncrh, 332 reg * sizeof(uint32_t), val); 333 } 334 335 static int 336 asc_vsbus_dma_isintr(struct ncr53c9x_softc *sc) 337 { 338 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 339 340 return bus_space_read_1(asc->sc_bst, asc->sc_ncrh, 341 NCR_STAT * sizeof(uint32_t)) & NCRSTAT_INT; 342 } 343 344 static void 345 asc_vsbus_dma_reset(struct ncr53c9x_softc *sc) 346 { 347 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 348 349 if (asc->sc_flags & ASC_MAPLOADED) 350 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 351 asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED); 352 } 353 354 static int 355 asc_vsbus_dma_intr(struct ncr53c9x_softc *sc) 356 { 357 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 358 u_int tcl, tcm; 359 int trans, resid; 360 361 if ((asc->sc_flags & ASC_DMAACTIVE) == 0) 362 panic("%s: DMA wasn't active", __func__); 363 364 asc->sc_flags &= ~ASC_DMAACTIVE; 365 366 if (asc->sc_dmasize == 0) { 367 /* A "Transfer Pad" operation completed */ 368 tcl = NCR_READ_REG(sc, NCR_TCL); 369 tcm = NCR_READ_REG(sc, NCR_TCM); 370 NCR_DMA(("asc_vsbus_intr: discarded %d bytes (tcl=%d, tcm=%d)\n", 371 tcl | (tcm << 8), tcl, tcm)); 372 return 0; 373 } 374 375 resid = 0; 376 if ((resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) { 377 NCR_DMA(("asc_vsbus_intr: empty FIFO of %d ", resid)); 378 DELAY(1); 379 } 380 if (asc->sc_flags & ASC_MAPLOADED) { 381 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 382 0, asc->sc_dmasize, 383 asc->sc_flags & ASC_FROMMEMORY 384 ? BUS_DMASYNC_POSTWRITE 385 : BUS_DMASYNC_POSTREAD); 386 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 387 } 388 asc->sc_flags &= ~ASC_MAPLOADED; 389 390 resid += (tcl = NCR_READ_REG(sc, NCR_TCL)); 391 resid += (tcm = NCR_READ_REG(sc, NCR_TCM)) << 8; 392 393 trans = asc->sc_dmasize - resid; 394 if (trans < 0) { /* transferred < 0 ? */ 395 printf("asc_vsbus_intr: xfer (%d) > req (%lu)\n", 396 trans, (u_long) asc->sc_dmasize); 397 trans = asc->sc_dmasize; 398 } 399 NCR_DMA(("asc_vsbus_intr: tcl=%d, tcm=%d; trans=%d, resid=%d\n", 400 tcl, tcm, trans, resid)); 401 402 *asc->sc_dmalen -= trans; 403 *asc->sc_dmaaddr += trans; 404 405 asc->sc_xfers++; 406 return 0; 407 } 408 409 static int 410 asc_vsbus_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len, 411 int datain, size_t *dmasize) 412 { 413 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 414 415 asc->sc_dmaaddr = addr; 416 asc->sc_dmalen = len; 417 if (datain) { 418 asc->sc_flags &= ~ASC_FROMMEMORY; 419 } else { 420 asc->sc_flags |= ASC_FROMMEMORY; 421 } 422 if ((vaddr_t)*asc->sc_dmaaddr < VM_MIN_KERNEL_ADDRESS) 423 panic("%s: DMA address (%p) outside of kernel", 424 __func__, *asc->sc_dmaaddr); 425 426 NCR_DMA(("%s: start %d@%p,%d\n", device_xname(&sc->sc_dev), 427 (int)*asc->sc_dmalen, *asc->sc_dmaaddr, 428 (asc->sc_flags & ASC_FROMMEMORY))); 429 *dmasize = asc->sc_dmasize = min(*dmasize, ASC_MAXXFERSIZE); 430 431 if (asc->sc_dmasize) { 432 if (bus_dmamap_load(asc->sc_dmat, asc->sc_dmamap, 433 *asc->sc_dmaaddr, asc->sc_dmasize, 434 NULL /* kernel address */, 435 BUS_DMA_NOWAIT|VAX_BUS_DMA_SPILLPAGE)) 436 panic("%s: cannot load DMA map", 437 device_xname(sc->sc_dev)); 438 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 439 0, asc->sc_dmasize, 440 asc->sc_flags & ASC_FROMMEMORY 441 ? BUS_DMASYNC_PREWRITE 442 : BUS_DMASYNC_PREREAD); 443 bus_space_write_4(asc->sc_bst, asc->sc_adrh, 0, 444 asc->sc_dmamap->dm_segs[0].ds_addr); 445 bus_space_write_4(asc->sc_bst, asc->sc_dirh, 0, 446 asc->sc_flags & ASC_FROMMEMORY); 447 NCR_DMA(("%s: dma-load %lu@0x%08lx\n", 448 device_xname(sc->sc_dev), 449 asc->sc_dmamap->dm_segs[0].ds_len, 450 asc->sc_dmamap->dm_segs[0].ds_addr)); 451 asc->sc_flags |= ASC_MAPLOADED; 452 } 453 454 return 0; 455 } 456 457 static void 458 asc_vsbus_dma_go(struct ncr53c9x_softc *sc) 459 { 460 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 461 462 asc->sc_flags |= ASC_DMAACTIVE; 463 } 464 465 static void 466 asc_vsbus_dma_stop(struct ncr53c9x_softc *sc) 467 { 468 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 469 470 if (asc->sc_flags & ASC_MAPLOADED) { 471 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 472 0, asc->sc_dmasize, 473 asc->sc_flags & ASC_FROMMEMORY 474 ? BUS_DMASYNC_POSTWRITE 475 : BUS_DMASYNC_POSTREAD); 476 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 477 } 478 479 asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED); 480 } 481 482 static int 483 asc_vsbus_dma_isactive(struct ncr53c9x_softc *sc) 484 { 485 struct asc_vsbus_softc * const asc = (struct asc_vsbus_softc *)sc; 486 487 return (asc->sc_flags & ASC_DMAACTIVE) != 0; 488 } 489
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