asc_vsbus.c revision 1.4
1 /* $NetBSD: asc_vsbus.c,v 1.4 2000/03/05 23:20:25 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 40 41 __KERNEL_RCSID(0, "$NetBSD: asc_vsbus.c,v 1.4 2000/03/05 23:20:25 matt Exp $"); 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/errno.h> 48 #include <sys/ioctl.h> 49 #include <sys/device.h> 50 #include <sys/buf.h> 51 #include <sys/proc.h> 52 #include <sys/user.h> 53 #include <sys/reboot.h> 54 #include <sys/queue.h> 55 56 #include <dev/scsipi/scsi_all.h> 57 #include <dev/scsipi/scsipi_all.h> 58 #include <dev/scsipi/scsiconf.h> 59 #include <dev/scsipi/scsi_message.h> 60 61 #include <machine/bus.h> 62 63 #include <dev/ic/ncr53c9xreg.h> 64 #include <dev/ic/ncr53c9xvar.h> 65 66 #include <machine/cpu.h> 67 #include <machine/sid.h> 68 #include <machine/rpb.h> 69 #include <machine/scb.h> 70 #include <machine/vsbus.h> 71 72 struct asc_vsbus_softc { 73 struct ncr53c9x_softc sc_ncr53c9x; /* Must be first */ 74 bus_space_tag_t sc_bst; /* bus space tag */ 75 bus_space_handle_t sc_bsh; /* bus space handle */ 76 bus_space_handle_t sc_ncrh; /* ncr bus space handle */ 77 bus_dma_tag_t sc_dmat; /* bus dma tag */ 78 bus_dmamap_t sc_dmamap; 79 caddr_t *sc_dmaaddr; 80 size_t *sc_dmalen; 81 size_t sc_dmasize; 82 unsigned int sc_flags; 83 #define ASC_DMAACTIVE 0x0001 84 #define ASC_ISWRITE 0x0002 85 #define ASC_MAPLOADED 0x0004 86 }; 87 88 #define ASC_REG_ADR 0x0000 89 #define ASC_REG_DIR 0x000C 90 #define ASC_REG_NCR 0x0080 91 #define ASC_REG_END 0x00B0 92 93 #define ASC_TOMEMORY 0x0000 94 #define ASC_FROMMEMORY 0x0001 95 96 #define ASC_MAXXFERSIZE 65536 97 #define ASC_FREQUENCY 20000000 98 99 static int asc_vsbus_match __P((struct device *, struct cfdata *, void *)); 100 static void asc_vsbus_attach __P((struct device *, struct device *, void *)); 101 102 struct cfattach asc_vsbus_ca = { 103 sizeof(struct asc_vsbus_softc), asc_vsbus_match, asc_vsbus_attach 104 }; 105 106 static struct scsipi_device asc_vsbus_dev = { 107 NULL, /* Use the default error handler */ 108 NULL, /* have a queue, served by this */ 109 NULL, /* have no async handler */ 110 NULL, /* use the default done handler */ 111 }; 112 113 /* 114 * Functions and the switch for the MI code 115 */ 116 static u_char asc_vsbus_read_reg __P((struct ncr53c9x_softc *, int)); 117 static void asc_vsbus_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 118 static int asc_vsbus_dma_isintr __P((struct ncr53c9x_softc *)); 119 static void asc_vsbus_dma_reset __P((struct ncr53c9x_softc *)); 120 static int asc_vsbus_dma_intr __P((struct ncr53c9x_softc *)); 121 static int asc_vsbus_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 122 size_t *, int, size_t *)); 123 static void asc_vsbus_dma_go __P((struct ncr53c9x_softc *)); 124 static void asc_vsbus_dma_stop __P((struct ncr53c9x_softc *)); 125 static int asc_vsbus_dma_isactive __P((struct ncr53c9x_softc *)); 126 127 static struct ncr53c9x_glue asc_vsbus_glue = { 128 asc_vsbus_read_reg, 129 asc_vsbus_write_reg, 130 asc_vsbus_dma_isintr, 131 asc_vsbus_dma_reset, 132 asc_vsbus_dma_intr, 133 asc_vsbus_dma_setup, 134 asc_vsbus_dma_go, 135 asc_vsbus_dma_stop, 136 asc_vsbus_dma_isactive, 137 NULL, 138 }; 139 140 static int 141 asc_vsbus_match( struct device *parent, struct cfdata *cf, void *aux) 142 { 143 struct vsbus_attach_args *va = aux; 144 int dummy; 145 volatile u_int8_t *ncr_regs; 146 147 if (vax_boardtype != VAX_BTYP_46 148 && vax_boardtype != VAX_BTYP_48 149 && vax_boardtype != VAX_BTYP_49) 150 return 0; 151 152 ncr_regs = (volatile u_int8_t *) va->va_addr; 153 154 /* *** need to generate an interrupt here 155 * From trial and error, I've determined that an INT is generated 156 * only when the following sequence of events occurs: 157 * 1) The interrupt status register (0x05) must be read. 158 * 2) SCSI bus reset interrupt must be enabled 159 * 3) SCSI bus reset command must be sent 160 * 4) NOP command must be sent 161 */ 162 163 dummy = ncr_regs[NCR_INTR << 2] & 0xFF; 164 ncr_regs[NCR_CFG1 << 2] = 0x07; /* we're ID 7, turn on INT for SCSI reset */ 165 ncr_regs[NCR_CMD << 2] = NCRCMD_RSTSCSI; /* send the reset */ 166 ncr_regs[NCR_CMD << 2] = NCRCMD_NOP; /* send a NOP */ 167 DELAY(10000); 168 169 dummy = ncr_regs[NCR_INTR << 2] & 0xFF; 170 return (dummy & NCRINTR_SBR) != 0; 171 } 172 173 174 /* 175 * Attach this instance, and then all the sub-devices 176 */ 177 static void 178 asc_vsbus_attach(struct device *parent, struct device *self, void *aux) 179 { 180 struct vsbus_attach_args *va = aux; 181 struct asc_vsbus_softc *asc = (void *)self; 182 struct ncr53c9x_softc *sc = &asc->sc_ncr53c9x; 183 int error; 184 185 /* 186 * Set up glue for MI code early; we use some of it here. 187 */ 188 sc->sc_glue = &asc_vsbus_glue; 189 190 asc->sc_bst = va->va_iot; 191 asc->sc_dmat = va->va_dmat; 192 193 error = bus_space_map(asc->sc_bst, va->va_paddr - ASC_REG_NCR, 194 ASC_REG_END, 0, &asc->sc_bsh); 195 if (error) { 196 printf(": failed to map registers: error=%d\n", error); 197 return; 198 } 199 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, ASC_REG_NCR, 200 ASC_REG_END - ASC_REG_NCR, &asc->sc_ncrh); 201 if (error) { 202 printf(": failed to map ncr registers: error=%d\n", error); 203 return; 204 } 205 error = bus_dmamap_create(asc->sc_dmat, ASC_MAXXFERSIZE, 1, 206 ASC_MAXXFERSIZE, 0, BUS_DMA_NOWAIT, &asc->sc_dmamap); 207 208 sc->sc_id = 7; /* XXX need to get this from VMB */ 209 sc->sc_freq = ASC_FREQUENCY; 210 211 /* gimme Mhz */ 212 sc->sc_freq /= 1000000; 213 214 scb_vecalloc(va->va_cvec, (void (*)(void *)) ncr53c9x_intr, 215 &asc->sc_ncr53c9x, SCB_ISTACK); 216 217 /* 218 * XXX More of this should be in ncr53c9x_attach(), but 219 * XXX should we really poke around the chip that much in 220 * XXX the MI code? Think about this more... 221 */ 222 223 /* 224 * Set up static configuration info. 225 */ 226 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 227 sc->sc_cfg2 = NCRCFG2_SCSI2; 228 sc->sc_cfg3 = 0; 229 sc->sc_rev = NCR_VARIANT_NCR53C94; 230 231 /* 232 * XXX minsync and maxxfer _should_ be set up in MI code, 233 * XXX but it appears to have some dependency on what sort 234 * XXX of DMA we're hooked up to, etc. 235 */ 236 237 /* 238 * This is the value used to start sync negotiations 239 * Note that the NCR register "SYNCTP" is programmed 240 * in "clocks per byte", and has a minimum value of 4. 241 * The SCSI period used in negotiation is one-fourth 242 * of the time (in nanoseconds) needed to transfer one byte. 243 * Since the chip's clock is given in MHz, we have the following 244 * formula: 4 * period = (1000 / freq) * 4 245 */ 246 sc->sc_minsync = (1000 / sc->sc_freq); 247 sc->sc_maxxfer = 64 * 1024; 248 249 printf("\n%s", self->dv_xname); /* Pretty print */ 250 251 /* Do the common parts of attachment. */ 252 sc->sc_adapter.scsipi_cmd = ncr53c9x_scsi_cmd; 253 sc->sc_adapter.scsipi_minphys = minphys; 254 ncr53c9x_attach(sc, &asc_vsbus_dev); 255 256 /* 257 * Register this device as boot device if we booted from it. 258 * This will fail if there are more than one le in a machine, 259 * fortunately there may be only one. 260 */ 261 if (B_TYPE(bootdev) == BDEV_SD) 262 booted_from = self; 263 } 264 265 /* 266 * Glue functions. 267 */ 268 269 static u_char 270 asc_vsbus_read_reg(struct ncr53c9x_softc *sc, int reg) 271 { 272 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 273 274 return bus_space_read_1(asc->sc_bst, asc->sc_ncrh, 275 reg * sizeof(u_int32_t)); 276 } 277 278 static void 279 asc_vsbus_write_reg(sc, reg, val) 280 struct ncr53c9x_softc *sc; 281 int reg; 282 u_char val; 283 { 284 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 285 286 bus_space_write_1(asc->sc_bst, asc->sc_ncrh, 287 reg * sizeof(u_int32_t), val); 288 } 289 290 static int 291 asc_vsbus_dma_isintr(sc) 292 struct ncr53c9x_softc *sc; 293 { 294 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 295 return bus_space_read_1(asc->sc_bst, asc->sc_ncrh, 296 NCR_STAT * sizeof(u_int32_t)) & NCRSTAT_INT; 297 } 298 299 static void 300 asc_vsbus_dma_reset(sc) 301 struct ncr53c9x_softc *sc; 302 { 303 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 304 305 if (asc->sc_flags & ASC_MAPLOADED) 306 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 307 asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED); 308 } 309 310 static int 311 asc_vsbus_dma_intr(sc) 312 struct ncr53c9x_softc *sc; 313 { 314 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 315 u_int tcl, tcm; 316 int trans, resid; 317 318 if ((asc->sc_flags & ASC_DMAACTIVE) == 0) 319 panic("asc_vsbus_dma_intr: DMA wasn't active"); 320 321 asc->sc_flags &= ~ASC_DMAACTIVE; 322 323 if (asc->sc_dmasize == 0) { 324 /* A "Transfer Pad" operation completed */ 325 tcl = NCR_READ_REG(sc, NCR_TCL); 326 tcm = NCR_READ_REG(sc, NCR_TCM); 327 NCR_DMA(("asc_vsbus_intr: discarded %d bytes (tcl=%d, tcm=%d)\n", 328 tcl | (tcm << 8), tcl, tcm)); 329 return 0; 330 } 331 332 resid = 0; 333 if ((resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) { 334 NCR_DMA(("asc_vsbus_intr: empty FIFO of %d ", resid)); 335 DELAY(1); 336 } 337 if (asc->sc_flags & ASC_MAPLOADED) 338 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 339 asc->sc_flags &= ~ASC_MAPLOADED; 340 341 resid += (tcl = NCR_READ_REG(sc, NCR_TCL)); 342 resid += (tcm = NCR_READ_REG(sc, NCR_TCM)) << 8; 343 344 trans = asc->sc_dmasize - resid; 345 if (trans < 0) { /* transferred < 0 ? */ 346 printf("ioasic_intr: xfer (%d) > req (%d)\n", 347 trans, asc->sc_dmasize); 348 trans = asc->sc_dmasize; 349 } 350 NCR_DMA(("asc_vsbus_intr: tcl=%d, tcm=%d; trans=%d, resid=%d\n", 351 tcl, tcm, trans, resid)); 352 353 *asc->sc_dmalen -= trans; 354 *asc->sc_dmaaddr += trans; 355 356 return 0; 357 } 358 359 static int 360 asc_vsbus_dma_setup(struct ncr53c9x_softc *sc, caddr_t *addr, size_t *len, 361 int datain, size_t *dmasize) 362 { 363 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 364 365 asc->sc_dmaaddr = addr; 366 asc->sc_dmalen = len; 367 if (datain) { 368 asc->sc_flags |= ASC_ISWRITE; 369 } else { 370 asc->sc_flags &= ~ASC_ISWRITE; 371 } 372 373 NCR_DMA(("%s: start %d@%p,%d\n", sc->sc_dev.dv_xname, 374 (int)*asc->sc_dmalen, *asc->sc_dmaaddr, (asc->sc_flags & ASC_ISWRITE))); 375 *dmasize = asc->sc_dmasize = min(*dmasize, ASC_MAXXFERSIZE); 376 377 if (asc->sc_dmasize) { 378 if (bus_dmamap_load(asc->sc_dmat, asc->sc_dmamap, 379 *asc->sc_dmaaddr, asc->sc_dmasize, 380 NULL /* kernel address */, 381 BUS_DMA_NOWAIT)) 382 panic("%s: cannot load dma map", sc->sc_dev.dv_xname); 383 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 384 0, asc->sc_dmasize, datain 385 ? BUS_DMASYNC_PREREAD 386 : BUS_DMASYNC_PREWRITE); 387 bus_space_write_4(asc->sc_bst, asc->sc_bsh, ASC_REG_ADR, 388 asc->sc_dmamap->dm_segs[0].ds_addr); 389 bus_space_write_4(asc->sc_bst, asc->sc_bsh, ASC_REG_DIR, 390 datain ? ASC_TOMEMORY : ASC_FROMMEMORY); 391 asc->sc_flags |= ASC_MAPLOADED; 392 } 393 394 return 0; 395 } 396 397 static void 398 asc_vsbus_dma_go(struct ncr53c9x_softc *sc) 399 { 400 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 401 402 asc->sc_flags |= ASC_DMAACTIVE; 403 } 404 405 static void 406 asc_vsbus_dma_stop(struct ncr53c9x_softc *sc) 407 { 408 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 409 410 if (asc->sc_flags & ASC_MAPLOADED) 411 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 412 413 asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED); 414 } 415 416 static int 417 asc_vsbus_dma_isactive(struct ncr53c9x_softc *sc) 418 { 419 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 420 421 return (asc->sc_flags & ASC_DMAACTIVE) != 0; 422 } 423
Indexes created Tue Sep 30 11:09:46 GMT 2025