asc_vsbus.c revision 1.5
1 /* $NetBSD: asc_vsbus.c,v 1.5 2000/03/07 00:08:42 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 40 41 __KERNEL_RCSID(0, "$NetBSD: asc_vsbus.c,v 1.5 2000/03/07 00:08:42 matt Exp $"); 42 43 #include <sys/types.h> 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/errno.h> 48 #include <sys/ioctl.h> 49 #include <sys/device.h> 50 #include <sys/buf.h> 51 #include <sys/proc.h> 52 #include <sys/user.h> 53 #include <sys/reboot.h> 54 #include <sys/queue.h> 55 56 #include <dev/scsipi/scsi_all.h> 57 #include <dev/scsipi/scsipi_all.h> 58 #include <dev/scsipi/scsiconf.h> 59 #include <dev/scsipi/scsi_message.h> 60 61 #include <machine/bus.h> 62 #include <machine/vmparam.h> 63 64 #include <dev/ic/ncr53c9xreg.h> 65 #include <dev/ic/ncr53c9xvar.h> 66 67 #include <machine/cpu.h> 68 #include <machine/sid.h> 69 #include <machine/rpb.h> 70 #include <machine/scb.h> 71 #include <machine/vsbus.h> 72 73 struct asc_vsbus_softc { 74 struct ncr53c9x_softc sc_ncr53c9x; /* Must be first */ 75 bus_space_tag_t sc_bst; /* bus space tag */ 76 bus_space_handle_t sc_bsh; /* bus space handle */ 77 bus_space_handle_t sc_ncrh; /* ncr bus space handle */ 78 bus_dma_tag_t sc_dmat; /* bus dma tag */ 79 bus_dmamap_t sc_dmamap; 80 caddr_t *sc_dmaaddr; 81 size_t *sc_dmalen; 82 size_t sc_dmasize; 83 unsigned int sc_flags; 84 #define ASC_DMAACTIVE 0x0001 85 #define ASC_ISWRITE 0x0002 86 #define ASC_MAPLOADED 0x0004 87 }; 88 89 #define ASC_REG_ADR 0x0000 90 #define ASC_REG_DIR 0x000C 91 #define ASC_REG_NCR 0x0080 92 #define ASC_REG_END 0x00B0 93 94 #define ASC_TOMEMORY 0x0000 95 #define ASC_FROMMEMORY 0x0001 96 97 #define ASC_MAXXFERSIZE 65536 98 #define ASC_FREQUENCY 25000000 99 100 static int asc_vsbus_match __P((struct device *, struct cfdata *, void *)); 101 static void asc_vsbus_attach __P((struct device *, struct device *, void *)); 102 103 struct cfattach asc_vsbus_ca = { 104 sizeof(struct asc_vsbus_softc), asc_vsbus_match, asc_vsbus_attach 105 }; 106 107 static struct scsipi_device asc_vsbus_dev = { 108 NULL, /* Use the default error handler */ 109 NULL, /* have a queue, served by this */ 110 NULL, /* have no async handler */ 111 NULL, /* use the default done handler */ 112 }; 113 114 /* 115 * Functions and the switch for the MI code 116 */ 117 static u_char asc_vsbus_read_reg __P((struct ncr53c9x_softc *, int)); 118 static void asc_vsbus_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 119 static int asc_vsbus_dma_isintr __P((struct ncr53c9x_softc *)); 120 static void asc_vsbus_dma_reset __P((struct ncr53c9x_softc *)); 121 static int asc_vsbus_dma_intr __P((struct ncr53c9x_softc *)); 122 static int asc_vsbus_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 123 size_t *, int, size_t *)); 124 static void asc_vsbus_dma_go __P((struct ncr53c9x_softc *)); 125 static void asc_vsbus_dma_stop __P((struct ncr53c9x_softc *)); 126 static int asc_vsbus_dma_isactive __P((struct ncr53c9x_softc *)); 127 128 static struct ncr53c9x_glue asc_vsbus_glue = { 129 asc_vsbus_read_reg, 130 asc_vsbus_write_reg, 131 asc_vsbus_dma_isintr, 132 asc_vsbus_dma_reset, 133 asc_vsbus_dma_intr, 134 asc_vsbus_dma_setup, 135 asc_vsbus_dma_go, 136 asc_vsbus_dma_stop, 137 asc_vsbus_dma_isactive, 138 NULL, 139 }; 140 141 static int 142 asc_vsbus_match( struct device *parent, struct cfdata *cf, void *aux) 143 { 144 struct vsbus_attach_args *va = aux; 145 int dummy; 146 volatile u_int8_t *ncr_regs; 147 148 if (vax_boardtype != VAX_BTYP_46 149 && vax_boardtype != VAX_BTYP_48 150 && vax_boardtype != VAX_BTYP_49) 151 return 0; 152 153 ncr_regs = (volatile u_int8_t *) va->va_addr; 154 155 /* *** need to generate an interrupt here 156 * From trial and error, I've determined that an INT is generated 157 * only when the following sequence of events occurs: 158 * 1) The interrupt status register (0x05) must be read. 159 * 2) SCSI bus reset interrupt must be enabled 160 * 3) SCSI bus reset command must be sent 161 * 4) NOP command must be sent 162 */ 163 164 dummy = ncr_regs[NCR_INTR << 2] & 0xFF; 165 ncr_regs[NCR_CFG1 << 2] = 0x07; /* we're ID 7, turn on INT for SCSI reset */ 166 ncr_regs[NCR_CMD << 2] = NCRCMD_RSTSCSI; /* send the reset */ 167 ncr_regs[NCR_CMD << 2] = NCRCMD_NOP; /* send a NOP */ 168 DELAY(10000); 169 170 dummy = ncr_regs[NCR_INTR << 2] & 0xFF; 171 return (dummy & NCRINTR_SBR) != 0; 172 } 173 174 175 /* 176 * Attach this instance, and then all the sub-devices 177 */ 178 static void 179 asc_vsbus_attach(struct device *parent, struct device *self, void *aux) 180 { 181 struct vsbus_attach_args *va = aux; 182 struct asc_vsbus_softc *asc = (void *)self; 183 struct ncr53c9x_softc *sc = &asc->sc_ncr53c9x; 184 int error; 185 186 /* 187 * Set up glue for MI code early; we use some of it here. 188 */ 189 sc->sc_glue = &asc_vsbus_glue; 190 191 asc->sc_bst = va->va_iot; 192 asc->sc_dmat = va->va_dmat; 193 194 error = bus_space_map(asc->sc_bst, va->va_paddr - ASC_REG_NCR, 195 ASC_REG_END, 0, &asc->sc_bsh); 196 if (error) { 197 printf(": failed to map registers: error=%d\n", error); 198 return; 199 } 200 error = bus_space_subregion(asc->sc_bst, asc->sc_bsh, ASC_REG_NCR, 201 ASC_REG_END - ASC_REG_NCR, &asc->sc_ncrh); 202 if (error) { 203 printf(": failed to map ncr registers: error=%d\n", error); 204 return; 205 } 206 error = bus_dmamap_create(asc->sc_dmat, ASC_MAXXFERSIZE, 1, 207 ASC_MAXXFERSIZE, 0, BUS_DMA_NOWAIT, &asc->sc_dmamap); 208 209 sc->sc_id = 7; /* XXX need to get this from VMB */ 210 sc->sc_freq = ASC_FREQUENCY; 211 212 /* gimme Mhz */ 213 sc->sc_freq /= 1000000; 214 215 scb_vecalloc(va->va_cvec, (void (*)(void *)) ncr53c9x_intr, 216 &asc->sc_ncr53c9x, SCB_ISTACK); 217 218 /* 219 * XXX More of this should be in ncr53c9x_attach(), but 220 * XXX should we really poke around the chip that much in 221 * XXX the MI code? Think about this more... 222 */ 223 224 /* 225 * Set up static configuration info. 226 */ 227 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB; 228 sc->sc_cfg2 = NCRCFG2_SCSI2; 229 sc->sc_cfg3 = 0; 230 sc->sc_rev = NCR_VARIANT_NCR53C94; 231 232 /* 233 * XXX minsync and maxxfer _should_ be set up in MI code, 234 * XXX but it appears to have some dependency on what sort 235 * XXX of DMA we're hooked up to, etc. 236 */ 237 238 /* 239 * This is the value used to start sync negotiations 240 * Note that the NCR register "SYNCTP" is programmed 241 * in "clocks per byte", and has a minimum value of 4. 242 * The SCSI period used in negotiation is one-fourth 243 * of the time (in nanoseconds) needed to transfer one byte. 244 * Since the chip's clock is given in MHz, we have the following 245 * formula: 4 * period = (1000 / freq) * 4 246 */ 247 sc->sc_minsync = (1000 / sc->sc_freq); 248 sc->sc_maxxfer = 63 * 1024; 249 250 printf("\n%s", self->dv_xname); /* Pretty print */ 251 252 /* Do the common parts of attachment. */ 253 sc->sc_adapter.scsipi_cmd = ncr53c9x_scsi_cmd; 254 sc->sc_adapter.scsipi_minphys = minphys; 255 ncr53c9x_attach(sc, &asc_vsbus_dev); 256 257 /* 258 * Register this device as boot device if we booted from it. 259 * This will fail if there are more than one le in a machine, 260 * fortunately there may be only one. 261 */ 262 if (B_TYPE(bootdev) == BDEV_SD) 263 booted_from = self; 264 } 265 266 /* 267 * Glue functions. 268 */ 269 270 static u_char 271 asc_vsbus_read_reg(struct ncr53c9x_softc *sc, int reg) 272 { 273 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 274 275 return bus_space_read_1(asc->sc_bst, asc->sc_ncrh, 276 reg * sizeof(u_int32_t)); 277 } 278 279 static void 280 asc_vsbus_write_reg(sc, reg, val) 281 struct ncr53c9x_softc *sc; 282 int reg; 283 u_char val; 284 { 285 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 286 287 bus_space_write_1(asc->sc_bst, asc->sc_ncrh, 288 reg * sizeof(u_int32_t), val); 289 } 290 291 static int 292 asc_vsbus_dma_isintr(sc) 293 struct ncr53c9x_softc *sc; 294 { 295 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 296 return bus_space_read_1(asc->sc_bst, asc->sc_ncrh, 297 NCR_STAT * sizeof(u_int32_t)) & NCRSTAT_INT; 298 } 299 300 static void 301 asc_vsbus_dma_reset(sc) 302 struct ncr53c9x_softc *sc; 303 { 304 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 305 306 if (asc->sc_flags & ASC_MAPLOADED) 307 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 308 asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED); 309 } 310 311 static int 312 asc_vsbus_dma_intr(sc) 313 struct ncr53c9x_softc *sc; 314 { 315 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 316 u_int tcl, tcm; 317 int trans, resid; 318 319 if ((asc->sc_flags & ASC_DMAACTIVE) == 0) 320 panic("asc_vsbus_dma_intr: DMA wasn't active"); 321 322 asc->sc_flags &= ~ASC_DMAACTIVE; 323 324 if (asc->sc_dmasize == 0) { 325 /* A "Transfer Pad" operation completed */ 326 tcl = NCR_READ_REG(sc, NCR_TCL); 327 tcm = NCR_READ_REG(sc, NCR_TCM); 328 NCR_DMA(("asc_vsbus_intr: discarded %d bytes (tcl=%d, tcm=%d)\n", 329 tcl | (tcm << 8), tcl, tcm)); 330 return 0; 331 } 332 333 resid = 0; 334 if ((resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) { 335 NCR_DMA(("asc_vsbus_intr: empty FIFO of %d ", resid)); 336 DELAY(1); 337 } 338 if (asc->sc_flags & ASC_MAPLOADED) 339 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 340 asc->sc_flags &= ~ASC_MAPLOADED; 341 342 resid += (tcl = NCR_READ_REG(sc, NCR_TCL)); 343 resid += (tcm = NCR_READ_REG(sc, NCR_TCM)) << 8; 344 345 trans = asc->sc_dmasize - resid; 346 if (trans < 0) { /* transferred < 0 ? */ 347 printf("asc_vsbus_intr: xfer (%d) > req (%d)\n", 348 trans, asc->sc_dmasize); 349 trans = asc->sc_dmasize; 350 } 351 NCR_DMA(("asc_vsbus_intr: tcl=%d, tcm=%d; trans=%d, resid=%d\n", 352 tcl, tcm, trans, resid)); 353 354 *asc->sc_dmalen -= trans; 355 *asc->sc_dmaaddr += trans; 356 357 return 0; 358 } 359 360 static int 361 asc_vsbus_dma_setup(struct ncr53c9x_softc *sc, caddr_t *addr, size_t *len, 362 int datain, size_t *dmasize) 363 { 364 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 365 366 asc->sc_dmaaddr = addr; 367 asc->sc_dmalen = len; 368 if (datain) { 369 asc->sc_flags |= ASC_ISWRITE; 370 } else { 371 asc->sc_flags &= ~ASC_ISWRITE; 372 } 373 if ((vaddr_t) *asc->sc_dmaaddr < VM_MIN_KERNEL_ADDRESS) 374 panic("asc_vsbus_dma_setup: dma address (%p) outside of kernel", 375 *asc->sc_dmaaddr); 376 377 NCR_DMA(("%s: start %d@%p,%d\n", sc->sc_dev.dv_xname, 378 (int)*asc->sc_dmalen, *asc->sc_dmaaddr, (asc->sc_flags & ASC_ISWRITE))); 379 *dmasize = asc->sc_dmasize = min(*dmasize, ASC_MAXXFERSIZE); 380 381 if (asc->sc_dmasize) { 382 if (bus_dmamap_load(asc->sc_dmat, asc->sc_dmamap, 383 *asc->sc_dmaaddr, asc->sc_dmasize, 384 NULL /* kernel address */, 385 BUS_DMA_NOWAIT)) 386 panic("%s: cannot load dma map", sc->sc_dev.dv_xname); 387 bus_dmamap_sync(asc->sc_dmat, asc->sc_dmamap, 388 0, asc->sc_dmasize, datain 389 ? BUS_DMASYNC_PREREAD 390 : BUS_DMASYNC_PREWRITE); 391 bus_space_write_4(asc->sc_bst, asc->sc_bsh, ASC_REG_ADR, 392 asc->sc_dmamap->dm_segs[0].ds_addr); 393 bus_space_write_4(asc->sc_bst, asc->sc_bsh, ASC_REG_DIR, 394 datain ? ASC_TOMEMORY : ASC_FROMMEMORY); 395 asc->sc_flags |= ASC_MAPLOADED; 396 } 397 398 return 0; 399 } 400 401 static void 402 asc_vsbus_dma_go(struct ncr53c9x_softc *sc) 403 { 404 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 405 406 asc->sc_flags |= ASC_DMAACTIVE; 407 } 408 409 static void 410 asc_vsbus_dma_stop(struct ncr53c9x_softc *sc) 411 { 412 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 413 414 if (asc->sc_flags & ASC_MAPLOADED) 415 bus_dmamap_unload(asc->sc_dmat, asc->sc_dmamap); 416 417 asc->sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED); 418 } 419 420 static int 421 asc_vsbus_dma_isactive(struct ncr53c9x_softc *sc) 422 { 423 struct asc_vsbus_softc *asc = (struct asc_vsbus_softc *)sc; 424 425 return (asc->sc_flags & ASC_DMAACTIVE) != 0; 426 } 427
Indexes created Tue Sep 30 11:09:46 GMT 2025