dz_vsbus.c revision 1.7 1 1.7 ragge /* $NetBSD: dz_vsbus.c,v 1.7 1999/02/02 18:37:21 ragge Exp $ */
2 1.1 ragge /*
3 1.1 ragge * Copyright (c) 1998 Ludd, University of Lule}, Sweden.
4 1.1 ragge * All rights reserved.
5 1.1 ragge *
6 1.1 ragge * Redistribution and use in source and binary forms, with or without
7 1.1 ragge * modification, are permitted provided that the following conditions
8 1.1 ragge * are met:
9 1.1 ragge * 1. Redistributions of source code must retain the above copyright
10 1.1 ragge * notice, this list of conditions and the following disclaimer.
11 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 ragge * notice, this list of conditions and the following disclaimer in the
13 1.1 ragge * documentation and/or other materials provided with the distribution.
14 1.1 ragge * 3. All advertising materials mentioning features or use of this software
15 1.1 ragge * must display the following acknowledgement:
16 1.1 ragge * This product includes software developed at Ludd, University of
17 1.1 ragge * Lule}, Sweden and its contributors.
18 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
19 1.1 ragge * derived from this software without specific prior written permission
20 1.1 ragge *
21 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 ragge */
32 1.1 ragge
33 1.1 ragge
34 1.1 ragge
35 1.1 ragge #include <sys/param.h>
36 1.1 ragge #include <sys/proc.h>
37 1.1 ragge #include <sys/systm.h>
38 1.1 ragge #include <sys/ioctl.h>
39 1.1 ragge #include <sys/tty.h>
40 1.1 ragge #include <sys/file.h>
41 1.1 ragge #include <sys/conf.h>
42 1.1 ragge #include <sys/device.h>
43 1.1 ragge #include <sys/reboot.h>
44 1.1 ragge
45 1.1 ragge #include <dev/cons.h>
46 1.1 ragge
47 1.1 ragge #include <machine/mtpr.h>
48 1.1 ragge #include <machine/sid.h>
49 1.1 ragge #include <machine/uvax.h>
50 1.1 ragge #include <machine/vsbus.h>
51 1.7 ragge #include <machine/cpu.h>
52 1.7 ragge
53 1.1 ragge #include <machine/../vax/gencons.h>
54 1.1 ragge
55 1.1 ragge #include <vax/uba/dzreg.h>
56 1.1 ragge #include <vax/uba/dzvar.h>
57 1.1 ragge
58 1.1 ragge #include "ioconf.h"
59 1.4 ragge #include "lkc.h"
60 1.1 ragge
61 1.1 ragge static int dz_vsbus_match __P((struct device *, struct cfdata *, void *));
62 1.1 ragge static void dz_vsbus_attach __P((struct device *, struct device *, void *));
63 1.4 ragge static int dz_print __P((void *, const char *));
64 1.1 ragge static void txon __P((void));
65 1.1 ragge static void rxon __P((void));
66 1.1 ragge
67 1.7 ragge static vaddr_t dz_regs; /* Used for console */
68 1.7 ragge
69 1.1 ragge struct cfattach dz_vsbus_ca = {
70 1.1 ragge sizeof(struct dz_softc), dz_vsbus_match, dz_vsbus_attach
71 1.1 ragge };
72 1.1 ragge
73 1.1 ragge static void
74 1.1 ragge rxon()
75 1.1 ragge {
76 1.6 ragge vsbus_intr_enable(inr_sr);
77 1.1 ragge }
78 1.1 ragge
79 1.1 ragge static void
80 1.1 ragge txon()
81 1.1 ragge {
82 1.6 ragge vsbus_intr_enable(inr_st);
83 1.1 ragge }
84 1.1 ragge
85 1.4 ragge int
86 1.4 ragge dz_print(aux, name)
87 1.4 ragge void *aux;
88 1.4 ragge const char *name;
89 1.4 ragge {
90 1.4 ragge if (name)
91 1.4 ragge printf ("lkc at %s", name);
92 1.4 ragge return (UNCONF);
93 1.4 ragge }
94 1.4 ragge
95 1.1 ragge static int
96 1.1 ragge dz_vsbus_match(parent, cf, aux)
97 1.1 ragge struct device *parent;
98 1.1 ragge struct cfdata *cf;
99 1.1 ragge void *aux;
100 1.1 ragge {
101 1.1 ragge struct vsbus_attach_args *va = aux;
102 1.6 ragge if (va->va_type == inr_sr)
103 1.1 ragge return 1;
104 1.1 ragge return 0;
105 1.1 ragge }
106 1.1 ragge
107 1.1 ragge static void
108 1.1 ragge dz_vsbus_attach(parent, self, aux)
109 1.1 ragge struct device *parent, *self;
110 1.1 ragge void *aux;
111 1.1 ragge {
112 1.1 ragge struct dz_softc *sc = (void *)self;
113 1.1 ragge
114 1.1 ragge sc->sc_dr.dr_csr = (void *)(dz_regs + 0);
115 1.1 ragge sc->sc_dr.dr_rbuf = (void *)(dz_regs + 4);
116 1.1 ragge sc->sc_dr.dr_dtr = (void *)(dz_regs + 9);
117 1.1 ragge sc->sc_dr.dr_break = (void *)(dz_regs + 13);
118 1.1 ragge sc->sc_dr.dr_tbuf = (void *)(dz_regs + 12);
119 1.1 ragge sc->sc_dr.dr_tcr = (void *)(dz_regs + 8);
120 1.1 ragge sc->sc_dr.dr_dcd = (void *)(dz_regs + 13);
121 1.1 ragge sc->sc_dr.dr_ring = (void *)(dz_regs + 13);
122 1.1 ragge
123 1.1 ragge sc->sc_type = DZ_DZV;
124 1.1 ragge
125 1.1 ragge sc->sc_txon = txon;
126 1.1 ragge sc->sc_rxon = rxon;
127 1.2 ragge sc->sc_dsr = 0x0f; /* XXX check if VS has modem ctrl bits */
128 1.6 ragge vsbus_intr_attach(inr_sr, dzrint, 0);
129 1.6 ragge vsbus_intr_attach(inr_st, dzxint, 0);
130 1.1 ragge printf(": DC367");
131 1.1 ragge
132 1.1 ragge dzattach(sc);
133 1.4 ragge
134 1.4 ragge if ((vax_confdata & 0x80) == 0) /* workstation, have lkc */
135 1.4 ragge config_found(self, 0, dz_print);
136 1.1 ragge }
137 1.1 ragge
138 1.1 ragge /*----------------------------------------------------------------------*/
139 1.1 ragge
140 1.1 ragge #define REG(name) short name; short X##name##X;
141 1.1 ragge static volatile struct {/* base address of DZ-controller: 0x200A0000 */
142 1.1 ragge REG(csr); /* 00 Csr: control/status register */
143 1.1 ragge REG(rbuf); /* 04 Rbuf/Lpr: receive buffer/line param reg. */
144 1.1 ragge REG(tcr); /* 08 Tcr: transmit console register */
145 1.1 ragge REG(tdr); /* 0C Msr/Tdr: modem status reg/transmit data reg */
146 1.1 ragge REG(lpr0); /* 10 Lpr0: */
147 1.1 ragge REG(lpr1); /* 14 Lpr0: */
148 1.1 ragge REG(lpr2); /* 18 Lpr0: */
149 1.1 ragge REG(lpr3); /* 1C Lpr0: */
150 1.1 ragge } *dz = (void*)0x200A0000;
151 1.1 ragge #undef REG
152 1.1 ragge
153 1.1 ragge cons_decl(dz);
154 1.1 ragge
155 1.1 ragge int
156 1.1 ragge dzcngetc(dev)
157 1.1 ragge dev_t dev;
158 1.1 ragge {
159 1.6 ragge int c = 0;
160 1.6 ragge int mino = minor(dev);
161 1.6 ragge u_short rbuf;
162 1.7 ragge #if 0
163 1.3 ragge u_char mask;
164 1.3 ragge
165 1.3 ragge mask = vs_cpu->vc_intmsk; /* save old state */
166 1.3 ragge vs_cpu->vc_intmsk = 0; /* disable all interrupts */
167 1.7 ragge #endif
168 1.1 ragge
169 1.1 ragge do {
170 1.1 ragge while ((dz->csr & 0x80) == 0)
171 1.1 ragge ; /* Wait for char */
172 1.6 ragge rbuf = dz->rbuf;
173 1.6 ragge if (((rbuf >> 8) & 3) != mino)
174 1.6 ragge continue;
175 1.6 ragge c = rbuf & 0x7f;
176 1.1 ragge } while (c == 17 || c == 19); /* ignore XON/XOFF */
177 1.1 ragge
178 1.1 ragge if (c == 13)
179 1.1 ragge c = 10;
180 1.3 ragge
181 1.7 ragge #if 0
182 1.3 ragge vs_cpu->vc_intclr = 0x80; /* clear te interrupt request */
183 1.3 ragge vs_cpu->vc_intmsk = mask; /* restore interrupt mask */
184 1.7 ragge #endif
185 1.3 ragge
186 1.1 ragge return (c);
187 1.1 ragge }
188 1.1 ragge
189 1.1 ragge #define DZMAJOR 1
190 1.1 ragge
191 1.1 ragge void
192 1.1 ragge dzcnprobe(cndev)
193 1.1 ragge struct consdev *cndev;
194 1.1 ragge {
195 1.7 ragge extern vaddr_t iospace;
196 1.1 ragge
197 1.1 ragge switch (vax_boardtype) {
198 1.1 ragge case VAX_BTYP_410:
199 1.1 ragge case VAX_BTYP_420:
200 1.1 ragge case VAX_BTYP_43:
201 1.6 ragge case VAX_BTYP_46:
202 1.1 ragge cndev->cn_dev = makedev(DZMAJOR, 3);
203 1.7 ragge dz_regs = iospace;
204 1.7 ragge ioaccess(iospace, 0x200A0000, 1);
205 1.1 ragge cndev->cn_pri = CN_NORMAL;
206 1.1 ragge break;
207 1.1 ragge
208 1.1 ragge default:
209 1.1 ragge cndev->cn_pri = CN_DEAD;
210 1.1 ragge break;
211 1.1 ragge }
212 1.1 ragge
213 1.1 ragge return;
214 1.1 ragge }
215 1.1 ragge
216 1.1 ragge void
217 1.1 ragge dzcninit(cndev)
218 1.1 ragge struct consdev *cndev;
219 1.1 ragge {
220 1.1 ragge dz = (void*)dz_regs;
221 1.1 ragge
222 1.1 ragge dz->csr = 0; /* Disable scanning until initting is done */
223 1.1 ragge dz->tcr = 8; /* Turn off all but line 3's xmitter */
224 1.1 ragge dz->csr = 0x20; /* Turn scanning back on */
225 1.1 ragge }
226 1.1 ragge
227 1.1 ragge
228 1.1 ragge void
229 1.1 ragge dzcnputc(dev,ch)
230 1.1 ragge dev_t dev;
231 1.1 ragge int ch;
232 1.1 ragge {
233 1.1 ragge int timeout = 1<<15; /* don't hang the machine! */
234 1.6 ragge int mino = minor(dev);
235 1.3 ragge u_short tcr;
236 1.7 ragge #if 0
237 1.3 ragge u_char mask;
238 1.7 ragge #endif
239 1.1 ragge
240 1.1 ragge if (mfpr(PR_MAPEN) == 0)
241 1.1 ragge return;
242 1.1 ragge
243 1.7 ragge #if 0
244 1.3 ragge mask = vs_cpu->vc_intmsk; /* save old state */
245 1.3 ragge vs_cpu->vc_intmsk = 0; /* disable all interrupts */
246 1.7 ragge #endif
247 1.3 ragge tcr = dz->tcr; /* remember which lines to scan */
248 1.6 ragge dz->tcr = (1 << mino);
249 1.3 ragge
250 1.1 ragge while ((dz->csr & 0x8000) == 0) /* Wait until ready */
251 1.1 ragge if (--timeout < 0)
252 1.1 ragge break;
253 1.1 ragge dz->tdr = ch; /* Put the character */
254 1.3 ragge
255 1.3 ragge dz->tcr = tcr;
256 1.7 ragge #if 0
257 1.3 ragge vs_cpu->vc_intmsk = mask; /* restore interrupt mask */
258 1.7 ragge #endif
259 1.2 ragge }
260 1.2 ragge
261 1.2 ragge void
262 1.2 ragge dzcnpollc(dev, pollflag)
263 1.2 ragge dev_t dev;
264 1.2 ragge int pollflag;
265 1.2 ragge {
266 1.1 ragge }
267 1.4 ragge
268 1.4 ragge #if NLKC
269 1.4 ragge cons_decl(lkc);
270 1.4 ragge
271 1.4 ragge void
272 1.4 ragge lkccninit(cndev)
273 1.4 ragge struct consdev *cndev;
274 1.4 ragge {
275 1.4 ragge dz = (void*)dz_regs;
276 1.4 ragge
277 1.4 ragge dz->csr = 0; /* Disable scanning until initting is done */
278 1.4 ragge dz->tcr = 1; /* Turn off all but line 0's xmitter */
279 1.4 ragge dz->rbuf = 0x1c18; /* XXX */
280 1.4 ragge dz->csr = 0x20; /* Turn scanning back on */
281 1.4 ragge }
282 1.4 ragge
283 1.4 ragge int
284 1.4 ragge lkccngetc(dev)
285 1.4 ragge dev_t dev;
286 1.4 ragge {
287 1.5 ragge int lkc_decode(int);
288 1.4 ragge int c;
289 1.7 ragge #if 0
290 1.4 ragge u_char mask;
291 1.4 ragge
292 1.4 ragge mask = vs_cpu->vc_intmsk; /* save old state */
293 1.4 ragge vs_cpu->vc_intmsk = 0; /* disable all interrupts */
294 1.7 ragge #endif
295 1.4 ragge
296 1.4 ragge loop:
297 1.4 ragge while ((dz->csr & 0x80) == 0)
298 1.4 ragge ; /* Wait for char */
299 1.4 ragge
300 1.5 ragge c = lkc_decode(dz->rbuf & 255);
301 1.5 ragge if (c < 1)
302 1.4 ragge goto loop;
303 1.4 ragge
304 1.7 ragge #if 0
305 1.4 ragge vs_cpu->vc_intclr = 0x80; /* clear te interrupt request */
306 1.4 ragge vs_cpu->vc_intmsk = mask; /* restore interrupt mask */
307 1.7 ragge #endif
308 1.4 ragge
309 1.4 ragge return (c);
310 1.4 ragge }
311 1.4 ragge #endif
312