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ncr.c revision 1.13
      1  1.13  jonathan /*	$NetBSD: ncr.c,v 1.13 1998/07/04 22:18:45 jonathan Exp $	*/
      2   1.1     ragge 
      3   1.1     ragge #define USE_VMAPBUF
      4   1.1     ragge 
      5   1.1     ragge /*
      6   1.1     ragge  * Copyright (c) 1995 David Jones, Gordon W. Ross
      7   1.1     ragge  * Copyright (c) 1994 Adam Glass
      8   1.1     ragge  * All rights reserved.
      9   1.1     ragge  *
     10   1.1     ragge  * Redistribution and use in source and binary forms, with or without
     11   1.1     ragge  * modification, are permitted provided that the following conditions
     12   1.1     ragge  * are met:
     13   1.1     ragge  * 1. Redistributions of source code must retain the above copyright
     14   1.1     ragge  *    notice, this list of conditions and the following disclaimer.
     15   1.1     ragge  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1     ragge  *    notice, this list of conditions and the following disclaimer in the
     17   1.1     ragge  *    documentation and/or other materials provided with the distribution.
     18   1.1     ragge  * 3. The name of the authors may not be used to endorse or promote products
     19   1.1     ragge  *    derived from this software without specific prior written permission.
     20   1.1     ragge  * 4. All advertising materials mentioning features or use of this software
     21   1.1     ragge  *    must display the following acknowledgement:
     22   1.1     ragge  *	This product includes software developed by
     23   1.1     ragge  *	Adam Glass, David Jones, and Gordon Ross
     24   1.1     ragge  *
     25   1.1     ragge  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
     26   1.1     ragge  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     27   1.1     ragge  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     28   1.1     ragge  * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
     29   1.1     ragge  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     30   1.1     ragge  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     31   1.1     ragge  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     32   1.1     ragge  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     33   1.1     ragge  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     34   1.1     ragge  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     35   1.1     ragge  */
     36   1.1     ragge 
     37   1.1     ragge /*
     38   1.1     ragge  * This file contains only the machine-dependent parts of the
     39   1.1     ragge  * Sun3 SCSI driver.  (Autoconfig stuff and DMA functions.)
     40   1.1     ragge  * The machine-independent parts are in ncr5380sbc.c
     41   1.1     ragge  *
     42   1.1     ragge  * Supported hardware includes:
     43   1.1     ragge  * Sun SCSI-3 on OBIO (Sun3/50,Sun3/60)
     44   1.1     ragge  * Sun SCSI-3 on VME (Sun3/160,Sun3/260)
     45   1.1     ragge  *
     46   1.1     ragge  * Could be made to support the Sun3/E if someone wanted to.
     47   1.1     ragge  *
     48   1.1     ragge  * Note:  Both supported variants of the Sun SCSI-3 adapter have
     49   1.1     ragge  * some really unusual "features" for this driver to deal with,
     50   1.1     ragge  * generally related to the DMA engine.	 The OBIO variant will
     51   1.1     ragge  * ignore any attempt to write the FIFO count register while the
     52   1.1     ragge  * SCSI bus is in DATA_IN or DATA_OUT phase.  This is dealt with
     53   1.1     ragge  * by setting the FIFO count early in COMMAND or MSG_IN phase.
     54   1.1     ragge  *
     55   1.1     ragge  * The VME variant has a bit to enable or disable the DMA engine,
     56   1.1     ragge  * but that bit also gates the interrupt line from the NCR5380!
     57   1.1     ragge  * Therefore, in order to get any interrupt from the 5380, (i.e.
     58   1.1     ragge  * for reselect) one must clear the DMA engine transfer count and
     59   1.1     ragge  * then enable DMA.  This has the further complication that you
     60   1.1     ragge  * CAN NOT touch the NCR5380 while the DMA enable bit is set, so
     61   1.1     ragge  * we have to turn DMA back off before we even look at the 5380.
     62   1.1     ragge  *
     63   1.1     ragge  * What wonderfully whacky hardware this is!
     64   1.1     ragge  *
     65   1.1     ragge  * Credits, history:
     66   1.1     ragge  *
     67   1.1     ragge  * David Jones wrote the initial version of this module, which
     68   1.1     ragge  * included support for the VME adapter only. (no reselection).
     69   1.1     ragge  *
     70   1.1     ragge  * Gordon Ross added support for the OBIO adapter, and re-worked
     71   1.1     ragge  * both the VME and OBIO code to support disconnect/reselect.
     72   1.1     ragge  * (Required figuring out the hardware "features" noted above.)
     73   1.1     ragge  *
     74   1.1     ragge  * The autoconfiguration boilerplate came from Adam Glass.
     75   1.1     ragge  *
     76   1.1     ragge  * VS2000:
     77   1.1     ragge  */
     78  1.13  jonathan #include "opt_ddb.h"
     79   1.1     ragge 
     80   1.1     ragge #include <sys/param.h>
     81   1.1     ragge #include <sys/systm.h>
     82   1.1     ragge #include <sys/kernel.h>
     83   1.1     ragge #include <sys/conf.h>
     84   1.1     ragge #include <sys/file.h>
     85   1.1     ragge #include <sys/stat.h>
     86   1.1     ragge #include <sys/ioctl.h>
     87   1.1     ragge #include <sys/buf.h>
     88   1.1     ragge #include <sys/proc.h>
     89   1.1     ragge #include <sys/user.h>
     90   1.1     ragge #include <sys/map.h>
     91   1.1     ragge #include <sys/device.h>
     92   1.1     ragge #include <sys/dkstat.h>
     93   1.1     ragge #include <sys/disklabel.h>
     94   1.1     ragge #include <sys/disk.h>
     95   1.1     ragge #include <sys/syslog.h>
     96  1.12     ragge #include <sys/malloc.h>
     97   1.1     ragge 
     98   1.1     ragge /* #include <sys/errno.h> */
     99   1.1     ragge 
    100   1.9    bouyer #include <dev/scsipi/scsi_all.h>
    101   1.9    bouyer #include <dev/scsipi/scsipi_all.h>
    102   1.9    bouyer #include <dev/scsipi/scsipi_debug.h>
    103   1.9    bouyer #include <dev/scsipi/scsiconf.h>
    104   1.1     ragge 
    105   1.1     ragge #include <machine/uvax.h>
    106   1.1     ragge #include <machine/ka410.h>
    107   1.1     ragge #include <machine/ka43.h>
    108   1.1     ragge #include <machine/vsbus.h>	/* struct confargs */
    109   1.1     ragge 
    110   1.1     ragge #include <dev/ic/ncr5380reg.h>
    111   1.1     ragge #include <dev/ic/ncr5380var.h>
    112   1.1     ragge 
    113   1.1     ragge #define trace(x)
    114   1.1     ragge #define debug(x)
    115   1.1     ragge 
    116   1.1     ragge #ifndef NCR5380_CSRBITS
    117   1.1     ragge #define NCR5380_CSRBITS \
    118   1.1     ragge 	"\020\010DEND\007DREQ\006PERR\005IREQ\004MTCH\003DCON\002ATN\001ACK"
    119   1.1     ragge #endif
    120   1.1     ragge 
    121   1.1     ragge #ifndef NCR5380_BUSCSRBITS
    122   1.1     ragge #define NCR5380_BUSCSRBITS \
    123   1.1     ragge 	"\020\010RST\007BSY\006REQ\005MSG\004C/D\003I/O\002SEL\001DBP"
    124   1.1     ragge #endif
    125   1.1     ragge 
    126   1.1     ragge #include "ncr.h"
    127   1.1     ragge 
    128   1.1     ragge #ifdef DDB
    129   1.1     ragge #define integrate
    130   1.1     ragge #else
    131   1.1     ragge #define integrate static
    132   1.1     ragge #endif
    133   1.1     ragge 
    134   1.1     ragge /*
    135   1.1     ragge  * Transfers smaller than this are done using PIO
    136   1.1     ragge  * (on assumption they're not worth DMA overhead)
    137   1.1     ragge  */
    138   1.1     ragge #define MIN_DMA_LEN 128
    139   1.1     ragge 
    140   1.1     ragge /*
    141   1.1     ragge  * Transfers lager than 65535 bytes need to be split-up.
    142   1.1     ragge  * (Some of the FIFO logic has only 16 bits counters.)
    143   1.1     ragge  * Make the size an integer multiple of the page size
    144   1.1     ragge  * to avoid buf/cluster remap problems.	 (paranoid?)
    145   1.1     ragge  *
    146   1.1     ragge  * bertram: VS2000 has an DMA-area which is 16KB, thus
    147   1.1     ragge  * have a maximum DMA-size of 16KB...
    148   1.1     ragge  */
    149   1.1     ragge #ifdef DMA_SHARED
    150   1.1     ragge #define MAX_DMA_LEN	0x2000		/* (8 * 1024) */
    151   1.1     ragge #define DMA_ADDR_HBYTE	0x20
    152   1.1     ragge #define DMA_ADDR_LBYTE	0x00
    153   1.1     ragge #else
    154   1.1     ragge #define MAX_DMA_LEN	0x4000		/* (16 * 1024) */
    155   1.1     ragge #define DMA_ADDR_HBYTE	0x00
    156   1.1     ragge #define DMA_ADDR_LBYTE	0x00
    157   1.1     ragge #endif
    158   1.1     ragge 
    159   1.1     ragge #ifdef	DEBUG
    160   1.1     ragge int si_debug = 3;
    161   1.1     ragge static int si_link_flags = 0 /* | SDEV_DB2 */ ;
    162   1.1     ragge #endif
    163   1.1     ragge 
    164   1.1     ragge /*
    165   1.1     ragge  * This structure is used to keep track of mappedpwd DMA requests.
    166   1.1     ragge  * Note: combined the UDC command block with this structure, so
    167   1.1     ragge  * the array of these has to be in DVMA space.
    168   1.1     ragge  */
    169   1.1     ragge struct si_dma_handle {
    170   1.1     ragge 	int		dh_flags;
    171   1.1     ragge #define SIDH_BUSY	1		/* This DH is in use */
    172   1.1     ragge #define SIDH_OUT	2		/* DMA does data out (write) */
    173   1.1     ragge #define SIDH_PHYS	4
    174   1.1     ragge #define SIDH_DONE	8
    175   1.1     ragge 	u_char *	dh_addr;	/* KVA of start of buffer */
    176   1.1     ragge 	int		dh_maplen;	/* Length of KVA mapping. */
    177   1.1     ragge 	u_char *	dh_dvma;	/* VA of buffer in DVMA space */
    178   1.1     ragge 	int		dh_xlen;
    179   1.1     ragge };
    180   1.1     ragge 
    181   1.1     ragge /*
    182   1.1     ragge  * The first structure member has to be the ncr5380_softc
    183   1.1     ragge  * so we can just cast to go back and fourth between them.
    184   1.1     ragge  */
    185   1.1     ragge struct si_softc {
    186   1.1     ragge 	struct ncr5380_softc	ncr_sc;
    187   1.1     ragge 	volatile struct si_regs *sc_regs;	/* do we really need this? */
    188   1.1     ragge 
    189   1.1     ragge 	struct si_dma_handle	*sc_dma;
    190   1.1     ragge 	struct confargs		*sc_cfargs;
    191   1.1     ragge 
    192   1.1     ragge 	int	sc_xflags;	/* ka410/ka43: resid, sizeof(areg) */
    193   1.1     ragge 
    194   1.1     ragge 	char	*sc_dbase;
    195   1.1     ragge 	int	sc_dsize;
    196   1.1     ragge 
    197   1.1     ragge 	volatile char	*sc_dareg;
    198   1.1     ragge 	volatile short	*sc_dcreg;
    199   1.1     ragge 	volatile char	*sc_ddreg;
    200   1.1     ragge 	volatile int	sc_dflags;
    201   1.1     ragge 
    202   1.1     ragge #define VSDMA_LOCKED	0x80	/* */
    203   1.1     ragge #define VSDMA_WANTED	0x40	/* */
    204   1.1     ragge #define VSDMA_IWANTED	0x20
    205   1.1     ragge #define VSDMA_BLOCKED	0x10
    206   1.1     ragge #define VSDMA_DMABUSY	0x08	/* DMA in progress */
    207   1.1     ragge #define VSDMA_REGBUSY	0x04	/* accessing registers */
    208   1.1     ragge #define VSDMA_WRBUF	0x02	/* writing to bounce-buffer */
    209   1.1     ragge #define VSDMA_RDBUF	0x01	/* reading from bounce-buffer */
    210   1.1     ragge 
    211   1.1     ragge #define VSDMA_STATUS	0xF0
    212   1.1     ragge #define VSDMA_LCKTYPE	0x0F
    213   1.1     ragge 
    214   1.1     ragge #ifdef POLL_MODE
    215   1.1     ragge 	volatile u_char *intreq;
    216   1.1     ragge 	volatile u_char *intclr;
    217   1.1     ragge 	volatile u_char *intmsk;
    218   1.1     ragge 	volatile int	intbit;
    219   1.1     ragge #endif
    220   1.1     ragge };
    221   1.1     ragge 
    222   1.1     ragge extern int cold;	/* enable polling while cold-flag set */
    223   1.1     ragge 
    224   1.1     ragge /* Options.  Interesting values are: 1,3,7 */
    225   1.1     ragge int si_options = 3;	/* bertram: 3 or 7 ??? */
    226   1.1     ragge #define SI_ENABLE_DMA	1	/* Use DMA (maybe polled) */
    227   1.1     ragge #define SI_DMA_INTR	2	/* DMA completion interrupts */
    228   1.1     ragge #define SI_DO_RESELECT	4	/* Allow disconnect/reselect */
    229   1.1     ragge 
    230   1.1     ragge #define DMA_DIR_IN  1
    231   1.1     ragge #define DMA_DIR_OUT 0
    232   1.1     ragge 
    233   1.1     ragge /* How long to wait for DMA before declaring an error. */
    234   1.1     ragge int si_dma_intr_timo = 500;	/* ticks (sec. X 100) */
    235   1.1     ragge 
    236   1.1     ragge integrate char si_name[] = "ncr";
    237   1.1     ragge integrate int	si_intr __P((void *));
    238   1.1     ragge 
    239   1.1     ragge integrate void	si_minphys __P((struct buf *bp));
    240   1.1     ragge integrate void	si_reset_adapter __P((struct ncr5380_softc *sc));
    241   1.1     ragge 
    242   1.1     ragge void si_dma_alloc __P((struct ncr5380_softc *));
    243   1.1     ragge void si_dma_free __P((struct ncr5380_softc *));
    244   1.1     ragge void si_dma_poll __P((struct ncr5380_softc *));
    245   1.1     ragge 
    246   1.1     ragge void si_intr_on __P((struct ncr5380_softc *));
    247   1.1     ragge void si_intr_off __P((struct ncr5380_softc *));
    248   1.1     ragge 
    249   1.1     ragge int si_dmaLockBus __P((struct ncr5380_softc *, int));
    250   1.1     ragge int si_dmaToggleLock __P((struct ncr5380_softc *, int, int));
    251   1.1     ragge int si_dmaReleaseBus __P((struct ncr5380_softc *, int));
    252   1.1     ragge 
    253   1.1     ragge void si_dma_setup __P((struct ncr5380_softc *));
    254   1.1     ragge void si_dma_start __P((struct ncr5380_softc *));
    255   1.1     ragge void si_dma_eop __P((struct ncr5380_softc *));
    256   1.1     ragge void si_dma_stop __P((struct ncr5380_softc *));
    257   1.1     ragge 
    258   1.9    bouyer static struct scsipi_adapter	si_ops = {
    259   1.1     ragge 	ncr5380_scsi_cmd,		/* scsi_cmd()		*/
    260   1.1     ragge 	si_minphys,			/* scsi_minphys()	*/
    261   1.1     ragge 	NULL,				/* open_target_lu()	*/
    262   1.1     ragge 	NULL,				/* close_target_lu()	*/
    263   1.1     ragge };
    264   1.1     ragge 
    265   1.1     ragge /* This is copied from julian's bt driver */
    266   1.1     ragge /* "so we have a default dev struct for our link struct." */
    267   1.9    bouyer static struct scsipi_device si_dev = {
    268   1.1     ragge 	NULL,		/* Use default error handler.	    */
    269   1.1     ragge 	NULL,		/* Use default start handler.		*/
    270   1.1     ragge 	NULL,		/* Use default async handler.	    */
    271   1.1     ragge 	NULL,		/* Use default "done" routine.	    */
    272   1.1     ragge };
    273   1.1     ragge 
    274  1.12     ragge integrate int si_match(struct device *, struct cfdata *, void *);
    275  1.12     ragge integrate void si_attach(struct device *, struct device *, void *);
    276   1.1     ragge 
    277   1.1     ragge struct cfattach ncr_ca = {
    278   1.1     ragge 	sizeof(struct si_softc), si_match, si_attach,
    279   1.1     ragge };
    280   1.1     ragge 
    281   1.1     ragge void
    282   1.1     ragge dk_establish(p,q)
    283   1.1     ragge 	struct disk *p;
    284   1.1     ragge 	struct device *q;
    285   1.1     ragge {
    286   1.1     ragge #if 0
    287   1.5  christos 	printf ("faking dk_establish()...\n");
    288   1.1     ragge #endif
    289   1.1     ragge }
    290   1.1     ragge 
    291   1.1     ragge 
    292   1.1     ragge integrate int
    293   1.1     ragge si_match(parent, match, aux)
    294   1.1     ragge 	struct device	*parent;
    295  1.12     ragge 	struct cfdata *match;
    296  1.12     ragge 	void	*aux;
    297   1.1     ragge {
    298   1.1     ragge 	struct confargs *ca = aux;
    299  1.10     ragge 	volatile int *base;
    300  1.10     ragge 	int res;
    301   1.1     ragge 
    302   1.1     ragge 	trace(("ncr_match(0x%x, %d, %s)\n", parent, cf->cf_unit, ca->ca_name));
    303   1.1     ragge 
    304  1.12     ragge return 0;
    305   1.1     ragge 	if (strcmp(ca->ca_name, "ncr") &&
    306   1.1     ragge 	    strcmp(ca->ca_name, "ncr5380") &&
    307   1.1     ragge 	    strcmp(ca->ca_name, "NCR5380"))
    308   1.1     ragge 		return (0);
    309   1.1     ragge 
    310  1.10     ragge 	base = (void*)uvax_phys2virt(ca->ca_ioaddr);
    311  1.10     ragge 	printf("probing for SCSI controller at 0x%x...\n", ca->ca_ioaddr);
    312   1.1     ragge 	/*
    313  1.10     ragge 	 * this is rather brute force attempt:
    314  1.10     ragge 	 * it seems that writing -1 to the location of the ncr's registers
    315  1.10     ragge 	 * results in 0x000000?? (8-bit registers) if ncr5380 exists and
    316  1.10     ragge 	 * in 0xffffffff if there's no ncr5380 at this address.
    317   1.1     ragge 	 */
    318  1.10     ragge 	*base = -1;     /* might be sufficient to check first reg. only */
    319  1.10     ragge 	res = *base;
    320  1.10     ragge 	printf("result: 0x%x (%d)\n", res, res);
    321  1.10     ragge 	res >>= 16;
    322  1.10     ragge 	if (res == 0xffff) {
    323  1.10     ragge 		printf("no NCR5380 at 0x%x.\n", ca->ca_ioaddr);
    324  1.10     ragge 		return (0);
    325  1.10     ragge 	}
    326  1.10     ragge 	else if (res == 0) {
    327  1.10     ragge 		printf("SCSI controller found.\n");
    328  1.10     ragge 		return (1);
    329  1.10     ragge 	}
    330  1.12     ragge 	printf("unexpected/strange result 0x%x during probe.\n", res);
    331  1.10     ragge         return (0);
    332   1.1     ragge }
    333   1.1     ragge 
    334  1.12     ragge integrate void si_set_portid(int, int);
    335  1.12     ragge 
    336   1.1     ragge integrate void
    337   1.1     ragge si_set_portid(pid,port)
    338   1.1     ragge 	int pid;
    339   1.1     ragge 	int port;
    340   1.1     ragge {
    341   1.1     ragge 	struct {
    342   1.1     ragge 	  u_long    :2;
    343   1.1     ragge 	  u_long id0:3;
    344   1.1     ragge 	  u_long id1:3;
    345   1.1     ragge 	  u_long    :26;
    346   1.1     ragge 	} *p;
    347   1.1     ragge 
    348   1.1     ragge #ifdef DEBUG
    349   1.1     ragge 	int *ip;
    350   1.1     ragge 	ip = (void*)uvax_phys2virt(KA410_SCSIPORT);
    351   1.1     ragge 	p = (void*)uvax_phys2virt(KA410_SCSIPORT);
    352   1.5  christos 	printf("scsi-id: (%x/%d) %d / %d\n", *ip, *ip, p->id0, p->id1);
    353   1.1     ragge #endif
    354   1.1     ragge 
    355   1.1     ragge 	p = (void*)uvax_phys2virt(KA410_SCSIPORT);
    356   1.1     ragge 	switch (port) {
    357   1.1     ragge 	case 0:
    358   1.1     ragge 		p->id0 = pid;
    359   1.5  christos 		printf(": scsi-id %d\n", p->id0);
    360   1.1     ragge 		break;
    361   1.1     ragge 	case 1:
    362   1.1     ragge 		p->id1 = pid;
    363   1.5  christos 		printf(": scsi-id %d\n", p->id1);
    364   1.1     ragge 		break;
    365   1.1     ragge 	default:
    366   1.5  christos 		printf("invalid port-number %d\n", port);
    367   1.1     ragge 	}
    368   1.1     ragge }
    369   1.1     ragge 
    370   1.1     ragge integrate void
    371   1.1     ragge si_attach(parent, self, aux)
    372   1.1     ragge 	struct device	*parent, *self;
    373   1.1     ragge 	void		*aux;
    374   1.1     ragge {
    375   1.1     ragge 	struct si_softc *sc = (struct si_softc *) self;
    376   1.1     ragge 	struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc;
    377   1.1     ragge 	volatile struct si_regs *regs;
    378   1.1     ragge 	struct confargs *ca = aux;
    379   1.1     ragge 	int i;
    380   1.1     ragge 
    381   1.1     ragge 	trace (("ncr_attach(0x%x, 0x%x, %s)\n", parent, self, ca->ca_name));
    382   1.1     ragge 
    383   1.1     ragge 	/*
    384   1.1     ragge 	 *
    385   1.1     ragge 	 */
    386   1.1     ragge #ifdef POLL_MODE
    387   1.1     ragge 	sc->intreq = (void*)uvax_phys2virt(KA410_INTREQ);
    388   1.1     ragge 	sc->intmsk = (void*)uvax_phys2virt(KA410_INTMSK);
    389   1.1     ragge 	sc->intclr = (void*)uvax_phys2virt(KA410_INTCLR);
    390   1.1     ragge 	sc->intbit = ca->ca_intbit;
    391   1.1     ragge #endif
    392   1.1     ragge 
    393   1.1     ragge 	sc->sc_cfargs = ca;	/* needed for interrupt-setup */
    394   1.1     ragge 
    395   1.1     ragge 	regs = (void*)uvax_phys2virt(ca->ca_ioaddr);
    396   1.1     ragge 
    397   1.1     ragge 	sc->sc_dareg = (void*)uvax_phys2virt(ca->ca_dareg);
    398   1.1     ragge 	sc->sc_dcreg = (void*)uvax_phys2virt(ca->ca_dcreg);
    399   1.1     ragge 	sc->sc_ddreg = (void*)uvax_phys2virt(ca->ca_ddreg);
    400   1.1     ragge 	sc->sc_dbase = (void*)uvax_phys2virt(ca->ca_dbase);
    401   1.1     ragge 	sc->sc_dsize = ca->ca_dsize;
    402   1.1     ragge 	sc->sc_dflags = 4;	/* XXX */
    403   1.1     ragge 	sc->sc_xflags = ca->ca_dflag;	/* should/will be renamed */
    404   1.1     ragge 	/*
    405   1.1     ragge 	 * Fill in the prototype scsi_link.
    406   1.1     ragge 	 */
    407   1.9    bouyer 	ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
    408   1.1     ragge 	ncr_sc->sc_link.adapter_softc = sc;
    409   1.9    bouyer 	ncr_sc->sc_link.scsipi_scsi.adapter_target = ca->ca_idval;
    410   1.1     ragge 	ncr_sc->sc_link.adapter = &si_ops;
    411   1.1     ragge 	ncr_sc->sc_link.device = &si_dev;
    412   1.9    bouyer 	ncr_sc->sc_link.type = BUS_SCSI;
    413   1.1     ragge 
    414   1.1     ragge 	si_set_portid(ca->ca_idval, ncr_sc->sc_dev.dv_unit);
    415   1.1     ragge 
    416   1.1     ragge 	/*
    417   1.1     ragge 	 * Initialize fields used by the MI code
    418   1.1     ragge 	 */
    419   1.1     ragge 	ncr_sc->sci_r0 = (void*)&regs->sci.sci_r0;
    420   1.1     ragge 	ncr_sc->sci_r1 = (void*)&regs->sci.sci_r1;
    421   1.1     ragge 	ncr_sc->sci_r2 = (void*)&regs->sci.sci_r2;
    422   1.1     ragge 	ncr_sc->sci_r3 = (void*)&regs->sci.sci_r3;
    423   1.1     ragge 	ncr_sc->sci_r4 = (void*)&regs->sci.sci_r4;
    424   1.1     ragge 	ncr_sc->sci_r5 = (void*)&regs->sci.sci_r5;
    425   1.1     ragge 	ncr_sc->sci_r6 = (void*)&regs->sci.sci_r6;
    426   1.1     ragge 	ncr_sc->sci_r7 = (void*)&regs->sci.sci_r7;
    427   1.1     ragge 
    428   1.1     ragge 	/*
    429   1.1     ragge 	 * MD function pointers used by the MI code.
    430   1.1     ragge 	 */
    431   1.1     ragge 	ncr_sc->sc_pio_out = ncr5380_pio_out;
    432   1.1     ragge 	ncr_sc->sc_pio_in =  ncr5380_pio_in;
    433   1.1     ragge 	ncr_sc->sc_dma_alloc = si_dma_alloc;
    434   1.1     ragge 	ncr_sc->sc_dma_free  = si_dma_free;
    435   1.1     ragge 	ncr_sc->sc_dma_poll  = si_dma_poll;	/* si_dma_poll not used! */
    436   1.1     ragge 	ncr_sc->sc_intr_on   = si_intr_on;	/* vsbus_unlockDMA; */
    437   1.1     ragge 	ncr_sc->sc_intr_off  = si_intr_off;	/* vsbus_lockDMA; */
    438   1.1     ragge 
    439   1.1     ragge 	ncr_sc->sc_dma_setup = NULL;		/* si_dma_setup not used! */
    440   1.1     ragge 	ncr_sc->sc_dma_start = si_dma_start;
    441   1.1     ragge 	ncr_sc->sc_dma_eop   = NULL;
    442   1.1     ragge 	ncr_sc->sc_dma_stop  = si_dma_stop;
    443   1.1     ragge 
    444   1.1     ragge 	ncr_sc->sc_flags = 0;
    445   1.8       gwr 	if ((si_options & SI_DO_RESELECT) == 0)
    446   1.8       gwr 		ncr_sc->sc_no_disconnect = 0xff;
    447   1.1     ragge 	if ((si_options & SI_DMA_INTR) == 0)
    448   1.1     ragge 		ncr_sc->sc_flags |= NCR5380_FORCE_POLLING;
    449   1.1     ragge 	ncr_sc->sc_min_dma_len = MIN_DMA_LEN;
    450   1.1     ragge 
    451   1.1     ragge 	/*
    452   1.1     ragge 	 * Initialize fields used only here in the MD code.
    453   1.1     ragge 	 */
    454   1.1     ragge 	i = SCI_OPENINGS * sizeof(struct si_dma_handle);
    455  1.12     ragge 	sc->sc_dma = (struct si_dma_handle *) malloc(i, M_DEVBUF, M_NOWAIT);
    456   1.1     ragge 	if (sc->sc_dma == NULL)
    457   1.1     ragge 		panic("si: dvma_malloc failed\n");
    458   1.1     ragge 	for (i = 0; i < SCI_OPENINGS; i++)
    459   1.1     ragge 		sc->sc_dma[i].dh_flags = 0;
    460   1.1     ragge 
    461   1.1     ragge 	sc->sc_regs = regs;
    462   1.1     ragge 
    463   1.1     ragge #ifdef	DEBUG
    464   1.1     ragge 	if (si_debug)
    465  1.12     ragge 		printf("si: Set TheSoftC=%p TheRegs=%p\n", sc, regs);
    466   1.1     ragge 	ncr_sc->sc_link.flags |= si_link_flags;
    467   1.1     ragge #endif
    468   1.1     ragge 
    469   1.1     ragge 	/*
    470   1.1     ragge 	 *  Initialize si board itself.
    471   1.1     ragge 	 */
    472   1.1     ragge 	si_reset_adapter(ncr_sc);
    473   1.1     ragge 	ncr5380_init(ncr_sc);
    474   1.1     ragge 	ncr5380_reset_scsibus(ncr_sc);
    475   1.3       cgd 	config_found(self, &(ncr_sc->sc_link), scsiprint);
    476   1.1     ragge 
    477   1.1     ragge 	/*
    478   1.1     ragge 	 * Now ready for interrupts.
    479   1.1     ragge 	 */
    480  1.12     ragge #if 0
    481   1.1     ragge 	vsbus_intr_register(sc->sc_cfargs, si_intr, (void *)sc);
    482   1.1     ragge 	vsbus_intr_enable(sc->sc_cfargs);
    483  1.12     ragge #endif
    484   1.1     ragge }
    485   1.1     ragge 
    486   1.1     ragge integrate void
    487   1.1     ragge si_minphys(struct buf *bp)
    488   1.1     ragge {
    489   1.1     ragge 	debug(("minphys: blkno=%d, bcount=%d, data=0x%x, flags=%x\n",
    490   1.1     ragge 	      bp->b_blkno, bp->b_bcount, bp->b_data, bp->b_flags));
    491   1.1     ragge 
    492   1.1     ragge 	if (bp->b_bcount > MAX_DMA_LEN) {
    493   1.1     ragge #ifdef	DEBUG
    494   1.1     ragge 		if (si_debug) {
    495  1.12     ragge 			printf("si_minphys len = 0x%lx.\n", bp->b_bcount);
    496   1.6     ragge #ifdef DDB
    497   1.1     ragge 			Debugger();
    498   1.6     ragge #endif
    499   1.1     ragge 		}
    500   1.1     ragge #endif
    501   1.1     ragge 		bp->b_bcount = MAX_DMA_LEN;
    502   1.1     ragge 	}
    503   1.1     ragge 	return (minphys(bp));
    504   1.1     ragge }
    505   1.1     ragge 
    506   1.1     ragge 
    507   1.1     ragge #define CSR_WANT (SI_CSR_SBC_IP | SI_CSR_DMA_IP | \
    508   1.1     ragge 	SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR )
    509   1.1     ragge 
    510   1.1     ragge static int si_intrCount = 0;
    511   1.1     ragge static int lastCSR = 0;
    512   1.1     ragge 
    513   1.1     ragge integrate int
    514   1.1     ragge si_intr(arg)
    515   1.1     ragge 	void *arg;
    516   1.1     ragge {
    517   1.1     ragge 	struct ncr5380_softc *ncr_sc = arg;
    518   1.1     ragge 	struct si_softc *sc = arg;
    519   1.1     ragge 	int count, claimed;
    520   1.1     ragge 
    521   1.1     ragge 	count = ++si_intrCount;
    522   1.1     ragge 	trace(("%s: si-intr(%d).....\n", ncr_sc->sc_dev.dv_xname, count));
    523   1.1     ragge 
    524   1.1     ragge #ifdef DEBUG
    525   1.1     ragge 	/*
    526   1.1     ragge 	 * Each DMA interrupt is followed by one spurious(?) interrupt.
    527   1.1     ragge 	 * if (ncr_sc->sc_state & NCR_WORKING == 0) we know, that the
    528   1.1     ragge 	 * interrupt was not claimed by the higher-level routine, so that
    529   1.1     ragge 	 * it might be save to ignore these...
    530   1.1     ragge 	 */
    531   1.1     ragge 	if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) {
    532   1.5  christos 		printf("spurious(%d): %x, %d, status=%b\n", count,
    533   1.1     ragge 		       sc->sc_dflags, ncr_sc->sc_ncmds,
    534   1.1     ragge 		       *ncr_sc->sci_csr, NCR5380_CSRBITS);
    535   1.1     ragge 	}
    536   1.1     ragge #endif
    537   1.1     ragge 	/*
    538   1.1     ragge 	 * If there was a DMA operation in progress, now it's no longer
    539   1.1     ragge 	 * active, since whatever caused the interrupt also interrupted
    540   1.1     ragge 	 * the DMA operation. Thus accessing the registers now doesn't
    541   1.1     ragge 	 * harm anything which is not yet broken...
    542   1.1     ragge 	 */
    543   1.1     ragge 	debug(("si_intr(status: %x, dma-count: %d)\n",
    544   1.1     ragge 	       *ncr_sc->sci_csr, *sc->sc_dcreg));
    545   1.1     ragge 
    546   1.1     ragge 	/*
    547   1.1     ragge 	 * First check for DMA errors / incomplete transfers
    548   1.1     ragge 	 * If operation was read/data-in, the copy data from buffer
    549   1.1     ragge 	 */
    550   1.1     ragge 	if (ncr_sc->sc_state & NCR_DOINGDMA) {
    551   1.1     ragge 		struct sci_req *sr = ncr_sc->sc_current;
    552   1.1     ragge 		struct si_dma_handle *dh = sr->sr_dma_hand;
    553   1.1     ragge 		int resid, ntrans;
    554   1.1     ragge 
    555   1.1     ragge 		resid = *sc->sc_dcreg;
    556   1.1     ragge 		if (resid == 1 && sc->sc_xflags) {
    557   1.1     ragge 		  debug(("correcting resid...\n"));
    558   1.1     ragge 		  resid = 0;
    559   1.1     ragge 		}
    560   1.1     ragge 		ntrans = dh->dh_xlen + resid;
    561   1.1     ragge 		if (resid == 0) {
    562   1.1     ragge 			if ((dh->dh_flags & SIDH_OUT) == 0) {
    563   1.1     ragge 				si_dmaToggleLock(ncr_sc,
    564   1.1     ragge 						 VSDMA_DMABUSY, VSDMA_RDBUF);
    565   1.1     ragge 				bcopy(sc->sc_dbase, dh->dh_dvma, ntrans);
    566   1.1     ragge 				si_dmaToggleLock(ncr_sc,
    567   1.1     ragge 						 VSDMA_RDBUF, VSDMA_DMABUSY);
    568   1.1     ragge 				dh->dh_flags |= SIDH_DONE;
    569   1.1     ragge 			}
    570   1.1     ragge 		}
    571   1.1     ragge 		else {
    572   1.1     ragge #ifdef DEBUG
    573   1.1     ragge 			int csr = *ncr_sc->sci_csr;
    574   1.5  christos 			printf("DMA incomplete (%d/%d) status = %b\n",
    575   1.1     ragge 			       ntrans, resid, csr, NCR5380_CSRBITS);
    576   1.1     ragge 			if(csr != lastCSR) {
    577   1.1     ragge 				debug(("Changed status bits: %b\n",
    578   1.1     ragge 				       k, NCR5380_CSRBITS));
    579   1.1     ragge 				lastCSR = csr & 0xFF;
    580   1.1     ragge 			}
    581   1.1     ragge #endif
    582   1.5  christos 			printf("DMA incomplete: ntrans=%d/%d, lock=%x\n",
    583   1.1     ragge 			       ntrans, dh->dh_xlen, sc->sc_dflags);
    584   1.1     ragge 			ncr_sc->sc_state |= NCR_ABORTING;
    585   1.1     ragge 		}
    586   1.1     ragge 
    587   1.1     ragge 		if ((sc->sc_dflags & VSDMA_BLOCKED) == 0) {
    588   1.5  christos 			printf("not blocked during DMA.\n");
    589   1.1     ragge 		}
    590   1.1     ragge 		sc->sc_dflags &= ~VSDMA_BLOCKED;
    591   1.1     ragge 		si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY);
    592   1.1     ragge 	}
    593   1.1     ragge 	if ((sc->sc_dflags & VSDMA_BLOCKED) != 0) {
    594   1.5  christos 		printf("blocked while not doing DMA.\n");
    595   1.1     ragge 		sc->sc_dflags &= ~VSDMA_BLOCKED;
    596   1.1     ragge 	}
    597   1.1     ragge 
    598   1.1     ragge 	/*
    599   1.1     ragge 	 * Now, whatever it was, let the ncr5380sbc routine handle it...
    600   1.1     ragge 	 */
    601   1.1     ragge 	claimed = ncr5380_intr(ncr_sc);
    602   1.1     ragge #ifdef	DEBUG
    603   1.1     ragge 	if (!claimed) {
    604   1.5  christos 		printf("si_intr: spurious from SBC\n");
    605   1.1     ragge 		if (si_debug & 4) {
    606   1.1     ragge 			Debugger();	/* XXX */
    607   1.1     ragge 		}
    608   1.1     ragge 	}
    609   1.1     ragge #endif
    610   1.1     ragge 	trace(("%s: si-intr(%d) done, claimed=%d\n",
    611   1.1     ragge 	       ncr_sc->sc_dev.dv_xname, count, claimed));
    612   1.1     ragge 	return (claimed);
    613   1.1     ragge }
    614   1.1     ragge 
    615   1.1     ragge 
    616   1.1     ragge integrate void
    617   1.1     ragge si_reset_adapter(struct ncr5380_softc *ncr_sc)
    618   1.1     ragge {
    619   1.1     ragge 
    620   1.1     ragge #ifdef	DEBUG
    621   1.1     ragge 	if (si_debug) {
    622   1.5  christos 		printf("si_reset_adapter\n");
    623   1.1     ragge 	}
    624   1.1     ragge #endif
    625   1.1     ragge 	SCI_CLR_INTR(ncr_sc);
    626   1.1     ragge }
    627   1.1     ragge 
    628   1.1     ragge 
    629   1.1     ragge /*****************************************************************
    630   1.1     ragge  * Common functions for DMA
    631   1.1     ragge  ****************************************************************/
    632   1.1     ragge 
    633   1.1     ragge /*
    634   1.1     ragge  * Allocate a DMA handle and put it in sc->sc_dma.  Prepare
    635   1.1     ragge  * for DMA transfer.  On the Sun3, this means mapping the buffer
    636   1.1     ragge  * into DVMA space.  dvma_mapin() flushes the cache for us.
    637   1.1     ragge  */
    638   1.1     ragge void
    639   1.1     ragge si_dma_alloc(ncr_sc)
    640   1.1     ragge 	struct ncr5380_softc *ncr_sc;
    641   1.1     ragge {
    642   1.1     ragge 	struct si_softc *sc = (struct si_softc *)ncr_sc;
    643   1.1     ragge 	struct sci_req *sr = ncr_sc->sc_current;
    644   1.9    bouyer 	struct scsipi_xfer *xs = sr->sr_xs;
    645   1.1     ragge 	struct buf *bp = sr->sr_xs->bp;
    646   1.1     ragge 	struct si_dma_handle *dh;
    647   1.1     ragge 	int i, xlen;
    648   1.1     ragge 	u_long addr;
    649   1.1     ragge 
    650   1.1     ragge 	trace (("si_dma_alloc()\n"));
    651   1.1     ragge 
    652   1.1     ragge #ifdef	DIAGNOSTIC
    653   1.1     ragge 	if (sr->sr_dma_hand != NULL)
    654   1.1     ragge 		panic("si_dma_alloc: already have DMA handle");
    655   1.1     ragge #endif
    656   1.1     ragge 
    657   1.1     ragge 	addr = (u_long) ncr_sc->sc_dataptr;
    658   1.1     ragge 	debug(("addr=%x, dataptr=%x\n", addr, ncr_sc->sc_dataptr));
    659   1.1     ragge 	xlen = ncr_sc->sc_datalen;
    660   1.1     ragge 
    661   1.1     ragge 	/* Make sure our caller checked sc_min_dma_len. */
    662   1.1     ragge 	if (xlen < MIN_DMA_LEN)
    663   1.1     ragge 		panic("si_dma_alloc: xlen=0x%x\n", xlen);
    664   1.1     ragge 
    665   1.1     ragge 	/*
    666   1.1     ragge 	 * Never attempt single transfers of more than 63k, because
    667   1.1     ragge 	 * our count register may be only 16 bits (an OBIO adapter).
    668   1.1     ragge 	 * This should never happen since already bounded by minphys().
    669   1.1     ragge 	 * XXX - Should just segment these...
    670   1.1     ragge 	 */
    671   1.1     ragge 	if (xlen > MAX_DMA_LEN) {
    672   1.7     ragge #ifdef DEBUG
    673   1.5  christos 		printf("si_dma_alloc: excessive xlen=0x%x\n", xlen);
    674   1.1     ragge 		Debugger();
    675   1.7     ragge #endif
    676   1.1     ragge 		ncr_sc->sc_datalen = xlen = MAX_DMA_LEN;
    677   1.1     ragge 	}
    678   1.1     ragge 
    679   1.1     ragge 	/* Find free DMA handle.  Guaranteed to find one since we have
    680   1.1     ragge 	   as many DMA handles as the driver has processes. */
    681   1.1     ragge 	for (i = 0; i < SCI_OPENINGS; i++) {
    682   1.1     ragge 		if ((sc->sc_dma[i].dh_flags & SIDH_BUSY) == 0)
    683   1.1     ragge 			goto found;
    684   1.1     ragge 	}
    685   1.1     ragge 	panic("si: no free DMA handles.");
    686   1.1     ragge found:
    687   1.1     ragge 
    688   1.1     ragge 	dh = &sc->sc_dma[i];
    689   1.1     ragge 	dh->dh_flags = SIDH_BUSY;
    690   1.1     ragge 	dh->dh_addr = (u_char*) addr;
    691   1.1     ragge 	dh->dh_maplen  = xlen;
    692   1.1     ragge 	dh->dh_xlen  = xlen;
    693   1.1     ragge 	dh->dh_dvma = 0;
    694   1.1     ragge 
    695   1.1     ragge 	/* Copy the "write" flag for convenience. */
    696   1.1     ragge 	if (xs->flags & SCSI_DATA_OUT)
    697   1.1     ragge 		dh->dh_flags |= SIDH_OUT;
    698   1.1     ragge 
    699   1.1     ragge #if 1
    700   1.1     ragge 	/*
    701   1.1     ragge 	 * If the buffer has the flag B_PHYS, the the address specified
    702   1.1     ragge 	 * in the buffer is a user-space address and we need to remap
    703   1.1     ragge 	 * this address into kernel space so that using this buffer
    704   1.1     ragge 	 * within the interrupt routine will work.
    705   1.1     ragge 	 * If it's already a kernel space address, we need to make sure
    706   1.1     ragge 	 * that all pages are in-core. the mapin() routine takes care
    707   1.1     ragge 	 * of that.
    708   1.1     ragge 	 */
    709   1.1     ragge 	if (bp && (bp->b_flags & B_PHYS))
    710   1.1     ragge 		dh->dh_flags |= SIDH_PHYS;
    711   1.1     ragge #endif
    712   1.1     ragge 
    713   1.1     ragge 	if (!bp) {
    714   1.5  christos 		printf("ncr.c: struct buf *bp is null-pointer.\n");
    715   1.1     ragge 		dh->dh_flags = 0;
    716   1.1     ragge 		return;
    717   1.1     ragge 	}
    718   1.1     ragge 	if (bp->b_bcount < 0 || bp->b_bcount > MAX_DMA_LEN) {
    719  1.12     ragge 		printf("ncr.c: invalid bcount %ld (0x%lx)\n",
    720   1.1     ragge 		       bp->b_bcount, bp->b_bcount);
    721   1.1     ragge 		dh->dh_flags = 0;
    722   1.1     ragge 		return;
    723   1.1     ragge 	}
    724   1.1     ragge 	dh->dh_dvma = bp->b_data;
    725   1.1     ragge #if 0
    726   1.1     ragge 	/*
    727   1.1     ragge 	 * mapping of user-space addresses is no longer neccessary, now
    728   1.1     ragge 	 * that the vmapbuf/vunmapbuf routines exist. Now the higher-level
    729   1.1     ragge 	 * driver already cares for the mapping!
    730   1.1     ragge 	 */
    731   1.1     ragge 	if (bp->b_flags & B_PHYS) {
    732   1.1     ragge 		xdebug(("not mapping in... %x/%x %x\n", bp->b_saveaddr,
    733   1.1     ragge 			bp->b_data, bp->b_bcount));
    734   1.1     ragge #ifdef USE_VMAPBUF
    735   1.1     ragge 		dh->dh_addr = bp->b_data;
    736   1.1     ragge 		dh->dh_maplen = bp->b_bcount;
    737   1.1     ragge 		vmapbuf(bp, bp->b_bcount);
    738   1.1     ragge 		dh->dh_dvma = bp->b_data;
    739   1.1     ragge #else
    740   1.1     ragge 		dh->dh_dvma = (u_char*)vsdma_mapin(bp);
    741   1.1     ragge #endif
    742   1.1     ragge 		xdebug(("addr %x, maplen %d, dvma %x, bcount %d, dir %s\n",
    743   1.1     ragge 		       dh->dh_addr, dh->dh_maplen, dh->dh_dvma, bp->b_bcount,
    744   1.1     ragge 		       (dh->dh_flags & SIDH_OUT ? "OUT" : "IN")));
    745   1.1     ragge 	}
    746   1.1     ragge #endif
    747   1.1     ragge 	/* success */
    748   1.1     ragge 	sr->sr_dma_hand = dh;
    749   1.1     ragge 
    750   1.1     ragge 	return;
    751   1.1     ragge }
    752   1.1     ragge 
    753   1.1     ragge 
    754   1.1     ragge void
    755   1.1     ragge si_dma_free(ncr_sc)
    756   1.1     ragge 	struct ncr5380_softc *ncr_sc;
    757   1.1     ragge {
    758   1.1     ragge 	struct sci_req *sr = ncr_sc->sc_current;
    759   1.1     ragge 	struct si_dma_handle *dh = sr->sr_dma_hand;
    760   1.1     ragge 
    761   1.1     ragge 	trace (("si_dma_free()\n"));
    762   1.1     ragge 
    763   1.1     ragge #ifdef	DIAGNOSTIC
    764   1.1     ragge 	if (dh == NULL)
    765   1.1     ragge 		panic("si_dma_free: no DMA handle");
    766   1.1     ragge #endif
    767   1.1     ragge 
    768   1.1     ragge 	if (ncr_sc->sc_state & NCR_DOINGDMA)
    769   1.1     ragge 		panic("si_dma_free: free while in progress");
    770   1.1     ragge 
    771   1.1     ragge 	if (dh->dh_flags & SIDH_BUSY) {
    772   1.1     ragge #if 0
    773   1.1     ragge 		debug(("bp->b_flags=0x%x\n", bp->b_flags));
    774   1.1     ragge 		if (bp->b_flags & B_PHYS) {
    775   1.1     ragge #ifdef USE_VMAPBUF
    776   1.5  christos 			printf("not unmapping(%x/%x %x/%x %d/%d)...\n",
    777   1.1     ragge 			       dh->dh_addr, dh->dh_dvma,
    778   1.1     ragge 			       bp->b_saveaddr, bp->b_data,
    779   1.1     ragge 			       bp->b_bcount, dh->dh_maplen);
    780   1.1     ragge 			/* vunmapbuf(bp, dh->dh_maplen); */
    781   1.5  christos 			printf("done.\n");
    782   1.1     ragge #endif
    783   1.1     ragge 			dh->dh_dvma = 0;
    784   1.1     ragge 		}
    785   1.1     ragge #endif
    786   1.1     ragge 		dh->dh_flags = 0;
    787   1.1     ragge 	}
    788   1.1     ragge 	sr->sr_dma_hand = NULL;
    789   1.1     ragge }
    790   1.1     ragge 
    791   1.1     ragge 
    792   1.1     ragge /*
    793   1.1     ragge  * REGBUSY and DMABUSY won't collide since the higher-level driver
    794   1.1     ragge  * issues intr_on/intr_off before/after doing DMA. The only problem
    795   1.1     ragge  * is to handle RDBUF/WRBUF wrt REGBUSY/DMABUSY
    796   1.1     ragge  *
    797   1.1     ragge  * There might be race-conditions, but for now we don't care for them...
    798   1.1     ragge  */
    799   1.1     ragge int
    800   1.1     ragge si_dmaLockBus(ncr_sc, lt)
    801   1.1     ragge 	struct ncr5380_softc *ncr_sc;
    802   1.1     ragge 	int lt;			/* Lock-Type */
    803   1.1     ragge {
    804   1.1     ragge 	struct si_softc *sc = (void*)ncr_sc;
    805   1.1     ragge 	int timeout = 200;	/* wait .2 seconds max. */
    806   1.1     ragge 
    807   1.1     ragge 	trace(("si_dmaLockBus(%x), cold: %d, current: %x\n",
    808   1.1     ragge 	       lt, cold, sc->sc_dflags));
    809   1.1     ragge 
    810   1.1     ragge #ifdef POLL_MODE
    811   1.1     ragge 	if (cold)
    812   1.1     ragge 		return (0);
    813   1.1     ragge #endif
    814   1.1     ragge 
    815   1.1     ragge 	if ((ncr_sc->sc_current != NULL) && (lt == VSDMA_REGBUSY)) {
    816   1.5  christos 		printf("trying to use regs while sc_current is set.\n");
    817  1.12     ragge 		printf("lt=%x, fl=%x, cur=%p\n",
    818   1.1     ragge 		       lt, sc->sc_dflags, ncr_sc->sc_current);
    819   1.1     ragge 	}
    820   1.1     ragge 	if ((ncr_sc->sc_current == NULL) && (lt != VSDMA_REGBUSY)) {
    821   1.5  christos 		printf("trying to use/prepare DMA without current.\n");
    822  1.12     ragge 		printf("lt=%x, fl=%x, cur=%p\n",
    823   1.1     ragge 		       lt, sc->sc_dflags, ncr_sc->sc_current);
    824   1.1     ragge 	}
    825   1.1     ragge 
    826   1.1     ragge 	if ((sc->sc_dflags & VSDMA_LOCKED) == 0) {
    827   1.1     ragge 		struct si_softc *sc = (struct si_softc *)ncr_sc;
    828   1.1     ragge 		sc->sc_dflags |= VSDMA_WANTED;
    829   1.1     ragge 		vsbus_lockDMA(sc->sc_cfargs);
    830   1.1     ragge 		sc->sc_dflags = VSDMA_LOCKED | lt;
    831   1.1     ragge 		return (0);
    832   1.1     ragge 	}
    833   1.1     ragge 
    834   1.1     ragge #if 1
    835   1.1     ragge 	while ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) {
    836   1.1     ragge 		debug(("busy wait(1)...\n"));
    837   1.1     ragge 		if (--timeout == 0) {
    838   1.5  christos 			printf("timeout in busy-wait(%x %x)\n",
    839   1.1     ragge 			       lt, sc->sc_dflags);
    840   1.1     ragge 			sc->sc_dflags &= ~VSDMA_LCKTYPE;
    841   1.1     ragge 			break;
    842   1.1     ragge 		}
    843   1.1     ragge 		delay(1000);
    844   1.1     ragge 	}
    845   1.1     ragge 	debug(("busy wait(1) done.\n"));
    846   1.1     ragge 	sc->sc_dflags |= lt;
    847   1.1     ragge 
    848   1.1     ragge #else
    849   1.1     ragge 	if ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) {
    850   1.1     ragge 		switch (lt) {
    851   1.1     ragge 
    852   1.1     ragge 		case VSDMA_RDBUF:
    853   1.1     ragge 			/* sc->sc_dflags |= VSDMA_IWANTED; */
    854   1.1     ragge 			debug(("busy wait(1)...\n"));
    855   1.1     ragge 			while (sc->sc_dflags &
    856   1.1     ragge 			       (VSDMA_WRBUF | VSDMA_DMABUSY)) {
    857   1.1     ragge 				if (--timeout == 0) {
    858   1.5  christos 					printf("timeout in busy-wait(1)\n");
    859   1.1     ragge 					sc->sc_dflags &= ~VSDMA_WRBUF;
    860   1.1     ragge 					sc->sc_dflags &= ~VSDMA_DMABUSY;
    861   1.1     ragge 				}
    862   1.1     ragge 				delay(1000);
    863   1.1     ragge 			}
    864   1.1     ragge 			/* sc->sc_dflags &= ~VSDMA_IWANTED; */
    865   1.1     ragge 			debug(("busy wait(1) done.\n"));
    866   1.1     ragge 			sc->sc_dflags |= lt;
    867   1.1     ragge 			break;
    868   1.1     ragge 
    869   1.1     ragge 		case VSDMA_WRBUF:
    870   1.1     ragge 			/* sc->sc_dflags |= VSDMA_IWANTED; */
    871   1.1     ragge 			debug(("busy wait(2)...\n"));
    872   1.1     ragge 			while (sc->sc_dflags &
    873   1.1     ragge 			       (VSDMA_RDBUF | VSDMA_DMABUSY)) {
    874   1.1     ragge 				if (--timeout == 0) {
    875   1.5  christos 					printf("timeout in busy-wait(2)\n");
    876   1.1     ragge 					sc->sc_dflags &= ~VSDMA_RDBUF;
    877   1.1     ragge 					sc->sc_dflags &= ~VSDMA_DMABUSY;
    878   1.1     ragge 				}
    879   1.1     ragge 				delay(1000);
    880   1.1     ragge 			}
    881   1.1     ragge 			/* sc->sc_dflags &= ~VSDMA_IWANTED; */
    882   1.1     ragge 			debug(("busy wait(2) done.\n"));
    883   1.1     ragge 			sc->sc_dflags |= lt;
    884   1.1     ragge 			break;
    885   1.1     ragge 
    886   1.1     ragge 		case VSDMA_DMABUSY:
    887   1.1     ragge 			/* sc->sc_dflags |= VSDMA_IWANTED; */
    888   1.1     ragge 			debug(("busy wait(3)...\n"));
    889   1.1     ragge 			while (sc->sc_dflags &
    890   1.1     ragge 			       (VSDMA_RDBUF | VSDMA_WRBUF)) {
    891   1.1     ragge 				if (--timeout == 0) {
    892   1.5  christos 					printf("timeout in busy-wait(3)\n");
    893   1.1     ragge 					sc->sc_dflags &= ~VSDMA_RDBUF;
    894   1.1     ragge 					sc->sc_dflags &= ~VSDMA_WRBUF;
    895   1.1     ragge 				}
    896   1.1     ragge 				delay(1000);
    897   1.1     ragge 			}
    898   1.1     ragge 			/* sc->sc_dflags &= ~VSDMA_IWANTED; */
    899   1.1     ragge 			debug(("busy wait(3) done.\n"));
    900   1.1     ragge 			sc->sc_dflags |= lt;
    901   1.1     ragge 			break;
    902   1.1     ragge 
    903   1.1     ragge 		case VSDMA_REGBUSY:
    904   1.1     ragge 			/* sc->sc_dflags |= VSDMA_IWANTED; */
    905   1.1     ragge 			debug(("busy wait(4)...\n"));
    906   1.1     ragge 			while (sc->sc_dflags &
    907   1.1     ragge 			       (VSDMA_RDBUF | VSDMA_WRBUF | VSDMA_DMABUSY)) {
    908   1.1     ragge 				if (--timeout == 0) {
    909   1.5  christos 					printf("timeout in busy-wait(4)\n");
    910   1.1     ragge 					sc->sc_dflags &= ~VSDMA_RDBUF;
    911   1.1     ragge 					sc->sc_dflags &= ~VSDMA_WRBUF;
    912   1.1     ragge 					sc->sc_dflags &= ~VSDMA_DMABUSY;
    913   1.1     ragge 				}
    914   1.1     ragge 				delay(1000);
    915   1.1     ragge 			}
    916   1.1     ragge 			/* sc->sc_dflags &= ~VSDMA_IWANTED; */
    917   1.1     ragge 			debug(("busy wait(4) done.\n"));
    918   1.1     ragge 			sc->sc_dflags |= lt;
    919   1.1     ragge 			break;
    920   1.1     ragge 
    921   1.1     ragge 		default:
    922   1.5  christos 			printf("illegal lockType %x in si_dmaLockBus()\n");
    923   1.1     ragge 		}
    924   1.1     ragge 	}
    925   1.1     ragge 	else
    926   1.5  christos 		printf("already locked. (%x/%x)\n", lt, sc->sc_dflags);
    927   1.1     ragge #endif
    928   1.1     ragge 	if (sc->sc_dflags & lt) /* successfully locked for this type */
    929   1.1     ragge 		return (0);
    930   1.1     ragge 
    931   1.5  christos 	printf("spurious %x in si_dmaLockBus(%x)\n", lt, sc->sc_dflags);
    932  1.12     ragge 	return 0;
    933   1.1     ragge }
    934   1.1     ragge 
    935   1.1     ragge /*
    936   1.1     ragge  * the lock of this type is no longer needed. If all (internal) locks are
    937   1.1     ragge  * released, release the DMA bus.
    938   1.1     ragge  */
    939   1.1     ragge int
    940   1.1     ragge si_dmaReleaseBus(ncr_sc, lt)
    941   1.1     ragge 	struct ncr5380_softc *ncr_sc;
    942   1.1     ragge 	int lt;			/* Lock-Type */
    943   1.1     ragge {
    944   1.1     ragge 	struct si_softc *sc = (void*)ncr_sc;
    945   1.1     ragge 
    946   1.1     ragge 	trace(("si_dmaReleaseBus(%x), cold: %d, current: %x\n",
    947   1.1     ragge 	       lt, cold, sc->sc_dflags));
    948   1.1     ragge 
    949   1.1     ragge #ifdef POLL_MODE
    950   1.1     ragge 	if (cold)
    951   1.1     ragge 		return (0);
    952   1.1     ragge #endif
    953   1.1     ragge 
    954   1.1     ragge 	if ((sc->sc_dflags & VSDMA_LCKTYPE) == lt) {
    955   1.1     ragge 		sc->sc_dflags &= ~lt;
    956   1.1     ragge 	}
    957   1.1     ragge 	else
    958   1.5  christos 		printf("trying to release %x while flags = %x\n", lt,
    959   1.1     ragge 		       sc->sc_dflags);
    960   1.1     ragge 
    961   1.1     ragge 	if (sc->sc_dflags == VSDMA_LOCKED) {	/* no longer needed */
    962   1.1     ragge 		struct si_softc *sc = (struct si_softc *)ncr_sc;
    963   1.1     ragge 		vsbus_unlockDMA(sc->sc_cfargs);
    964   1.1     ragge 		sc->sc_dflags = 0;
    965   1.1     ragge 	}
    966  1.12     ragge 	return 0;
    967   1.1     ragge }
    968   1.1     ragge 
    969   1.1     ragge /*
    970   1.1     ragge  * Just toggle the type of lock without releasing the lock...
    971   1.1     ragge  * This is usually needed before/after bcopy() to/from DMA-buffer
    972   1.1     ragge  */
    973   1.1     ragge int
    974   1.1     ragge si_dmaToggleLock(ncr_sc, lt1, lt2)
    975   1.1     ragge 	struct ncr5380_softc *ncr_sc;
    976   1.1     ragge 	int lt1, lt2;		/* Lock-Type */
    977   1.1     ragge {
    978   1.1     ragge 	struct si_softc *sc = (void*)ncr_sc;
    979   1.1     ragge 
    980   1.1     ragge #ifdef POLL_MODE
    981   1.1     ragge 	if (cold)
    982   1.1     ragge 		return (0);
    983   1.1     ragge #endif
    984   1.1     ragge 
    985   1.1     ragge 	if (((sc->sc_dflags & lt1) != 0) &&
    986   1.1     ragge 	    ((sc->sc_dflags & lt2) == 0)) {
    987   1.1     ragge 		sc->sc_dflags |= lt2;
    988   1.1     ragge 		sc->sc_dflags &= ~lt1;
    989   1.1     ragge 		return (0);
    990   1.1     ragge 	}
    991   1.5  christos 	printf("cannot toggle locking from %x to %x (current = %x)\n",
    992   1.1     ragge 	       lt1, lt2, sc->sc_dflags);
    993  1.12     ragge 	return 0;
    994   1.1     ragge }
    995   1.1     ragge 
    996   1.1     ragge /*
    997   1.1     ragge  * This is called when the bus is going idle,
    998   1.1     ragge  * so we want to enable the SBC interrupts.
    999   1.1     ragge  * That is controlled by the DMA enable!
   1000   1.1     ragge  * Who would have guessed!
   1001   1.1     ragge  * What a NASTY trick!
   1002   1.1     ragge  */
   1003   1.1     ragge void
   1004   1.1     ragge si_intr_on(ncr_sc)
   1005   1.1     ragge 	struct ncr5380_softc *ncr_sc;
   1006   1.1     ragge {
   1007   1.1     ragge 	si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY);
   1008   1.1     ragge }
   1009   1.1     ragge 
   1010   1.1     ragge /*
   1011   1.1     ragge  * This is called when the bus is idle and we are
   1012   1.1     ragge  * about to start playing with the SBC chip.
   1013   1.1     ragge  *
   1014   1.1     ragge  * VS2000 note: we have four kinds of access which are mutually exclusive:
   1015   1.1     ragge  * - access to the NCR5380 registers
   1016   1.1     ragge  * - access to the HDC9224 registers
   1017   1.1     ragge  * - access to the DMA area
   1018   1.1     ragge  * - doing DMA
   1019   1.1     ragge  */
   1020   1.1     ragge void
   1021   1.1     ragge si_intr_off(ncr_sc)
   1022   1.1     ragge 	struct ncr5380_softc *ncr_sc;
   1023   1.1     ragge {
   1024   1.1     ragge 	si_dmaLockBus(ncr_sc, VSDMA_REGBUSY);
   1025   1.1     ragge }
   1026   1.1     ragge 
   1027   1.1     ragge /*****************************************************************
   1028   1.1     ragge  * VME functions for DMA
   1029   1.1     ragge  ****************************************************************/
   1030   1.1     ragge 
   1031   1.1     ragge 
   1032   1.1     ragge /*
   1033   1.1     ragge  * This function is called during the COMMAND or MSG_IN phase
   1034   1.1     ragge  * that preceeds a DATA_IN or DATA_OUT phase, in case we need
   1035   1.1     ragge  * to setup the DMA engine before the bus enters a DATA phase.
   1036   1.1     ragge  *
   1037   1.1     ragge  * XXX: The VME adapter appears to suppress SBC interrupts
   1038   1.1     ragge  * when the FIFO is not empty or the FIFO count is non-zero!
   1039   1.1     ragge  *
   1040   1.1     ragge  * On the VME version we just clear the DMA count and address
   1041   1.1     ragge  * here (to make sure it stays idle) and do the real setup
   1042   1.1     ragge  * later, in dma_start.
   1043   1.1     ragge  */
   1044   1.1     ragge void
   1045   1.1     ragge si_dma_setup(ncr_sc)
   1046   1.1     ragge 	struct ncr5380_softc *ncr_sc;
   1047   1.1     ragge {
   1048   1.1     ragge 	trace (("si_dma_setup(ncr_sc) !!!\n"));
   1049   1.1     ragge 
   1050   1.1     ragge 	/*
   1051   1.1     ragge 	 * VS2000: nothing to do ...
   1052   1.1     ragge 	 */
   1053   1.1     ragge }
   1054   1.1     ragge 
   1055   1.1     ragge 
   1056   1.1     ragge void
   1057   1.1     ragge si_dma_start(ncr_sc)
   1058   1.1     ragge 	struct ncr5380_softc *ncr_sc;
   1059   1.1     ragge {
   1060   1.1     ragge 	struct si_softc *sc = (struct si_softc *)ncr_sc;
   1061   1.1     ragge 	struct sci_req *sr = ncr_sc->sc_current;
   1062   1.1     ragge 	struct si_dma_handle *dh = sr->sr_dma_hand;
   1063   1.1     ragge 	int xlen;
   1064   1.1     ragge 
   1065   1.1     ragge 	trace(("si_dma_start(%x)\n", sr->sr_dma_hand));
   1066   1.1     ragge 
   1067   1.1     ragge 	/*
   1068   1.1     ragge 	 * we always transfer from/to base of DMA-area,
   1069   1.1     ragge 	 * thus the DMA-address is always the same, only size
   1070   1.1     ragge 	 * and direction matter/differ on VS2000
   1071   1.1     ragge 	 */
   1072   1.1     ragge 
   1073   1.1     ragge 	debug(("ncr_sc->sc_datalen = %d\n", ncr_sc->sc_datalen));
   1074   1.1     ragge 	xlen = ncr_sc->sc_datalen;
   1075   1.1     ragge 	dh->dh_xlen = xlen;
   1076   1.1     ragge 
   1077   1.1     ragge 	/*
   1078   1.1     ragge 	 * VS2000 has a fixed 16KB-area where DMA is restricted to.
   1079   1.1     ragge 	 * All DMA-addresses are relative to this base: KA410_DMA_BASE
   1080   1.1     ragge 	 * Thus we need to copy the data into this area when writing,
   1081   1.1     ragge 	 * or copy from this area when reading. (kind of bounce-buffer)
   1082   1.1     ragge 	 */
   1083   1.1     ragge 
   1084   1.1     ragge 	/* Set direction (send/recv) */
   1085   1.1     ragge 	if (dh->dh_flags & SIDH_OUT) {
   1086   1.1     ragge 		/*
   1087   1.1     ragge 		 * We know that we are called while intr_off (regs locked)
   1088   1.1     ragge 		 * thus we toggle the lock from REGBUSY to WRBUF
   1089   1.1     ragge 		 * also we set the BLOCKIT flag, so that the locking of
   1090   1.1     ragge 		 * the DMA bus won't be released to the HDC9224...
   1091   1.1     ragge 		 */
   1092   1.1     ragge 		debug(("preparing msg-out (bcopy)\n"));
   1093   1.1     ragge 		si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_WRBUF);
   1094   1.1     ragge 		bcopy(dh->dh_dvma, sc->sc_dbase, xlen);
   1095   1.1     ragge 		si_dmaToggleLock(ncr_sc, VSDMA_WRBUF, VSDMA_REGBUSY);
   1096   1.1     ragge 		*sc->sc_ddreg = DMA_DIR_OUT;
   1097   1.1     ragge 	}
   1098   1.1     ragge 	else {
   1099   1.1     ragge 		debug(("preparing data-in (bzero)\n"));
   1100   1.1     ragge 		/* bzero(sc->sc_dbase, xlen); */
   1101   1.1     ragge 		*sc->sc_ddreg = DMA_DIR_IN;
   1102   1.1     ragge 	}
   1103   1.1     ragge 	sc->sc_dflags |= VSDMA_BLOCKED;
   1104   1.1     ragge 
   1105   1.1     ragge 	*sc->sc_dareg = DMA_ADDR_HBYTE; /* high byte (6 bits) */
   1106   1.1     ragge 	*sc->sc_dareg = DMA_ADDR_LBYTE; /* low byte */
   1107   1.1     ragge 	*sc->sc_dcreg = 0 - xlen; /* bertram XXX */
   1108   1.1     ragge 
   1109   1.1     ragge #ifdef	DEBUG
   1110   1.1     ragge 	if (si_debug & 2) {
   1111  1.12     ragge 		printf("si_dma_start: dh=%p, xlen=%d, creg=0x%x\n",
   1112  1.12     ragge 			   dh, xlen, *sc->sc_dcreg);
   1113   1.1     ragge 	}
   1114   1.1     ragge #endif
   1115   1.1     ragge 
   1116   1.1     ragge #ifdef POLL_MODE
   1117   1.1     ragge 	debug(("dma_start: cold=%d\n", cold));
   1118   1.1     ragge 	if (cold) {
   1119   1.1     ragge 		*sc->intmsk &= ~sc->intbit;
   1120   1.1     ragge 		*sc->intclr = sc->intbit;
   1121   1.1     ragge 	}
   1122   1.1     ragge 	else
   1123   1.1     ragge 		*sc->intmsk |= sc->intbit;
   1124   1.1     ragge #endif
   1125   1.1     ragge 	/*
   1126   1.1     ragge 	 * Acknowledge the phase change.  (After DMA setup!)
   1127   1.1     ragge 	 * Put the SBIC into DMA mode, and start the transfer.
   1128   1.1     ragge 	 */
   1129   1.1     ragge 	si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_DMABUSY);
   1130   1.1     ragge 	if (dh->dh_flags & SIDH_OUT) {
   1131   1.1     ragge 		*ncr_sc->sci_tcmd = PHASE_DATA_OUT;
   1132   1.1     ragge 		SCI_CLR_INTR(ncr_sc);
   1133   1.1     ragge 		*ncr_sc->sci_icmd = SCI_ICMD_DATA;
   1134   1.1     ragge 		*ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE);
   1135   1.1     ragge 		*ncr_sc->sci_dma_send = 0;	/* start it */
   1136   1.1     ragge 	} else {
   1137   1.1     ragge 		*ncr_sc->sci_tcmd = PHASE_DATA_IN;
   1138   1.1     ragge 		SCI_CLR_INTR(ncr_sc);
   1139   1.1     ragge 		*ncr_sc->sci_icmd = 0;
   1140   1.1     ragge 		*ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE);
   1141   1.1     ragge 		*ncr_sc->sci_irecv = 0; /* start it */
   1142   1.1     ragge 	}
   1143   1.1     ragge 	ncr_sc->sc_state |= NCR_DOINGDMA;
   1144   1.1     ragge 	/*
   1145   1.5  christos 	 * having a delay (eg. printf) here, seems to solve the problem.
   1146   1.1     ragge 	 * Isn't that strange ????
   1147   1.1     ragge 	 * Maybe the higher-level driver accesses one of the registers of
   1148   1.1     ragge 	 * the controller while DMA is in progress. Having a long enough
   1149   1.1     ragge 	 * delay here might prevent/delay this access until DMA bus is
   1150   1.1     ragge 	 * free again...
   1151   1.1     ragge 	 *
   1152   1.5  christos 	 * The instruction ++++ printf("DMA started.\n"); ++++
   1153   1.1     ragge 	 * is long/slow enough, to make the SSCI driver work. Thus we
   1154   1.1     ragge 	 * try to find a delay() long/slow enough to do the same. The
   1155   1.1     ragge 	 * argument to this delay is relative to the transfer-count.
   1156   1.1     ragge 	 */
   1157   1.1     ragge 	delay(3*xlen/4);		/* XXX solve this problem!!! XXX */
   1158   1.1     ragge 
   1159   1.1     ragge #ifdef	DEBUG
   1160   1.1     ragge 	if (si_debug & 2) {
   1161   1.5  christos 		printf("si_dma_start: started, flags=0x%x\n",
   1162   1.1     ragge 			   ncr_sc->sc_state);
   1163   1.1     ragge 	}
   1164   1.1     ragge #endif
   1165   1.1     ragge }
   1166   1.1     ragge 
   1167  1.12     ragge #if 0
   1168  1.12     ragge void si_vme_dma_eop(struct ncr5380_softc *);
   1169   1.1     ragge 
   1170   1.1     ragge void
   1171   1.1     ragge si_vme_dma_eop(ncr_sc)
   1172   1.1     ragge 	struct ncr5380_softc *ncr_sc;
   1173   1.1     ragge {
   1174   1.1     ragge 	trace (("si_vme_dma_eop() !!!\n"));
   1175   1.1     ragge 	/* Not needed - DMA was stopped prior to examining sci_csr */
   1176   1.1     ragge }
   1177  1.12     ragge #endif
   1178   1.1     ragge 
   1179   1.1     ragge /*
   1180   1.1     ragge  * si_dma_stop() has now become almost a nop-routine, since DMA-buffer
   1181   1.1     ragge  * has already been read within si_intr(), so there's nothing left to do.
   1182   1.1     ragge  */
   1183   1.1     ragge void
   1184   1.1     ragge si_dma_stop(ncr_sc)
   1185   1.1     ragge 	struct ncr5380_softc *ncr_sc;
   1186   1.1     ragge {
   1187   1.1     ragge 	struct si_softc *sc = (struct si_softc *)ncr_sc;
   1188   1.1     ragge 	struct sci_req *sr = ncr_sc->sc_current;
   1189   1.1     ragge 	struct si_dma_handle *dh = sr->sr_dma_hand;
   1190   1.1     ragge 	int resid, ntrans;
   1191   1.1     ragge 
   1192   1.1     ragge 	if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) {
   1193   1.1     ragge #ifdef	DEBUG
   1194   1.5  christos 		printf("si_dma_stop: dma not running\n");
   1195   1.1     ragge #endif
   1196   1.1     ragge 		return;
   1197   1.1     ragge 	}
   1198   1.1     ragge 	ncr_sc->sc_state &= ~NCR_DOINGDMA;
   1199   1.1     ragge 
   1200   1.1     ragge 	/* Note that timeout may have set the error flag. */
   1201   1.1     ragge 	if (ncr_sc->sc_state & NCR_ABORTING) {
   1202   1.5  christos 		printf("si_dma_stop: timeout?\n");
   1203   1.1     ragge 		goto out;
   1204   1.1     ragge 	}
   1205   1.1     ragge 
   1206   1.1     ragge 	/*
   1207   1.1     ragge 	 * Now try to figure out how much actually transferred
   1208   1.1     ragge 	 */
   1209   1.1     ragge 	si_dmaLockBus(ncr_sc, VSDMA_DMABUSY);
   1210   1.1     ragge 	si_dmaToggleLock(ncr_sc, VSDMA_DMABUSY, VSDMA_REGBUSY);
   1211   1.1     ragge 	resid = *sc->sc_dcreg;
   1212   1.1     ragge 	/*
   1213   1.1     ragge 	 * XXX: don't correct at two places !!!
   1214   1.1     ragge 	 */
   1215   1.1     ragge 	if (resid == 1 && sc->sc_xflags) {
   1216   1.1     ragge 		resid = 0;
   1217   1.1     ragge 	}
   1218   1.1     ragge 	ntrans = dh->dh_xlen + resid;
   1219   1.1     ragge 	if (resid != 0)
   1220   1.5  christos 		printf("resid=%d, xlen=%d, ntrans=%d\n",
   1221   1.1     ragge 		       resid, dh->dh_xlen, ntrans);
   1222   1.1     ragge 
   1223   1.1     ragge #ifdef	DEBUG
   1224   1.1     ragge 	if (si_debug & 2) {
   1225   1.5  christos 		printf("si_dma_stop: resid=0x%x ntrans=0x%x\n",
   1226   1.1     ragge 		       resid, ntrans);
   1227   1.1     ragge 	}
   1228   1.1     ragge #endif
   1229   1.1     ragge 
   1230   1.1     ragge 	if (ntrans < MIN_DMA_LEN) {
   1231   1.5  christos 		printf("si: fifo count: 0x%x\n", resid);
   1232   1.1     ragge 		ncr_sc->sc_state |= NCR_ABORTING;
   1233   1.1     ragge 		goto out;
   1234   1.1     ragge 	}
   1235   1.1     ragge 	if (ntrans > ncr_sc->sc_datalen)
   1236   1.1     ragge 		panic("si_dma_stop: excess transfer");
   1237   1.1     ragge 
   1238   1.1     ragge 	/*
   1239   1.1     ragge 	 * On VS2000 in case of a READ-operation, we must now copy
   1240   1.1     ragge 	 * the buffer-contents to the destination-address!
   1241   1.1     ragge 	 */
   1242   1.1     ragge 	if ((dh->dh_flags & SIDH_OUT) == 0 &&
   1243   1.1     ragge 	    (dh->dh_flags & SIDH_DONE) == 0) {
   1244   1.5  christos 		printf("DMA buffer not yet copied.\n");
   1245   1.1     ragge 		si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_RDBUF);
   1246   1.1     ragge 		bcopy(sc->sc_dbase, dh->dh_dvma, ntrans);
   1247   1.1     ragge 		si_dmaToggleLock(ncr_sc, VSDMA_RDBUF, VSDMA_REGBUSY);
   1248   1.1     ragge 	}
   1249   1.1     ragge 	si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY);
   1250   1.1     ragge 
   1251   1.1     ragge 	/* Adjust data pointer */
   1252   1.1     ragge 	ncr_sc->sc_dataptr += ntrans;
   1253   1.1     ragge 	ncr_sc->sc_datalen -= ntrans;
   1254   1.1     ragge 
   1255   1.1     ragge out:
   1256   1.1     ragge 	si_dmaLockBus(ncr_sc, VSDMA_DMABUSY);
   1257   1.1     ragge 
   1258   1.1     ragge 	/* Put SBIC back in PIO mode. */
   1259   1.1     ragge 	*ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE);
   1260   1.1     ragge 	*ncr_sc->sci_icmd = 0;
   1261   1.1     ragge 
   1262   1.1     ragge 	si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY);
   1263   1.1     ragge }
   1264   1.1     ragge 
   1265   1.1     ragge /*
   1266   1.1     ragge  * Poll (spin-wait) for DMA completion.
   1267   1.1     ragge  * Called right after xx_dma_start(), and
   1268   1.1     ragge  * xx_dma_stop() will be called next.
   1269   1.1     ragge  */
   1270   1.1     ragge void
   1271   1.1     ragge si_dma_poll(ncr_sc)
   1272   1.1     ragge 	struct ncr5380_softc *ncr_sc;
   1273   1.1     ragge {
   1274  1.12     ragge #ifdef POLL_MODE
   1275  1.12     ragge 	struct sci_req *sr = ncr_sc->sc_current;
   1276   1.1     ragge 	struct si_softc *sc = (struct si_softc *)ncr_sc;
   1277   1.1     ragge 	struct si_dma_handle *dh = sr->sr_dma_hand;
   1278   1.1     ragge 	int i, timeout;
   1279  1.12     ragge #endif
   1280   1.1     ragge 
   1281   1.1     ragge 	if (! cold)
   1282   1.5  christos 		printf("spurious call of DMA-poll ???");
   1283   1.1     ragge 
   1284   1.1     ragge #ifdef POLL_MODE
   1285   1.1     ragge 
   1286   1.1     ragge 	delay(10000);
   1287   1.1     ragge 	trace(("si_dma_poll(%x)\n", *sc->sc_dcreg));
   1288   1.1     ragge 
   1289   1.1     ragge 	/*
   1290   1.1     ragge 	 * interrupt-request has been cleared by dma_start, thus
   1291   1.1     ragge 	 * we do nothing else but wait for the intreq to reappear...
   1292   1.1     ragge 	 */
   1293   1.1     ragge 
   1294   1.1     ragge 	timeout = 5000;
   1295   1.1     ragge 	for (i=0; i<timeout; i++) {
   1296   1.1     ragge 		if (*sc->intreq & sc->intbit)
   1297   1.1     ragge 			break;
   1298   1.1     ragge 		delay(100);
   1299   1.1     ragge 	}
   1300   1.1     ragge 	if ((*sc->intreq & sc->intbit) == 0) {
   1301   1.5  christos 		printf("si: DMA timeout (while polling)\n");
   1302   1.1     ragge 		/* Indicate timeout as MI code would. */
   1303   1.1     ragge 		sr->sr_flags |= SR_OVERDUE;
   1304   1.1     ragge 	}
   1305   1.1     ragge #endif
   1306   1.1     ragge 	return;
   1307   1.1     ragge }
   1308