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ncr.c revision 1.27
      1  1.27    ragge /*	$NetBSD: ncr.c,v 1.27 2000/05/27 10:12:45 ragge Exp $	*/
      2   1.1    ragge 
      3  1.16    ragge /*-
      4  1.16    ragge  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5   1.1    ragge  * All rights reserved.
      6   1.1    ragge  *
      7  1.16    ragge  * This code is derived from software contributed to The NetBSD Foundation
      8  1.16    ragge  * by Adam Glass, David Jones, Gordon W. Ross, and Jens A. Nilsson.
      9  1.16    ragge  *
     10   1.1    ragge  * Redistribution and use in source and binary forms, with or without
     11   1.1    ragge  * modification, are permitted provided that the following conditions
     12   1.1    ragge  * are met:
     13   1.1    ragge  * 1. Redistributions of source code must retain the above copyright
     14   1.1    ragge  *    notice, this list of conditions and the following disclaimer.
     15   1.1    ragge  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1    ragge  *    notice, this list of conditions and the following disclaimer in the
     17   1.1    ragge  *    documentation and/or other materials provided with the distribution.
     18  1.16    ragge  * 3. All advertising materials mentioning features or use of this software
     19   1.1    ragge  *    must display the following acknowledgement:
     20  1.23    ragge  *	  This product includes software developed by the NetBSD
     21  1.23    ragge  *	  Foundation, Inc. and its contributors.
     22  1.16    ragge  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.16    ragge  *    contributors may be used to endorse or promote products derived
     24  1.16    ragge  *    from this software without specific prior written permission.
     25  1.16    ragge  *
     26  1.16    ragge  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.16    ragge  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.16    ragge  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.16    ragge  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.16    ragge  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.16    ragge  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.16    ragge  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.16    ragge  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.16    ragge  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.16    ragge  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.16    ragge  * POSSIBILITY OF SUCH DAMAGE.
     37   1.1    ragge  */
     38   1.1    ragge 
     39   1.1    ragge /*
     40  1.16    ragge  * This file contains the machine-dependent parts of the NCR-5380
     41  1.16    ragge  * controller. The machine-independent parts are in ncr5380sbc.c.
     42  1.16    ragge  *
     43  1.16    ragge  * Note: Only PIO transfers for now which implicates very bad
     44  1.16    ragge  * performance. DMA support will come soon.
     45  1.16    ragge  *
     46  1.16    ragge  * Jens A. Nilsson.
     47  1.16    ragge  *
     48  1.16    ragge  * Credits:
     49  1.16    ragge  *
     50  1.16    ragge  * This code is based on arch/sun3/dev/si*
     51  1.16    ragge  * Written by David Jones, Gordon Ross, and Adam Glass.
     52   1.1    ragge  */
     53   1.1    ragge 
     54   1.1    ragge #include <sys/param.h>
     55   1.1    ragge #include <sys/systm.h>
     56  1.16    ragge #include <sys/errno.h>
     57   1.1    ragge #include <sys/kernel.h>
     58  1.16    ragge #include <sys/malloc.h>
     59  1.16    ragge #include <sys/device.h>
     60   1.1    ragge #include <sys/buf.h>
     61   1.1    ragge #include <sys/proc.h>
     62   1.1    ragge #include <sys/user.h>
     63   1.1    ragge 
     64  1.23    ragge #include <vm/vm.h>
     65  1.23    ragge #include <vm/vm_kern.h>
     66  1.23    ragge 
     67   1.9   bouyer #include <dev/scsipi/scsi_all.h>
     68   1.9   bouyer #include <dev/scsipi/scsipi_all.h>
     69   1.9   bouyer #include <dev/scsipi/scsipi_debug.h>
     70   1.9   bouyer #include <dev/scsipi/scsiconf.h>
     71   1.1    ragge 
     72   1.1    ragge #include <dev/ic/ncr5380reg.h>
     73   1.1    ragge #include <dev/ic/ncr5380var.h>
     74   1.1    ragge 
     75  1.24     matt #include <machine/cpu.h>
     76  1.16    ragge #include <machine/vsbus.h>
     77  1.16    ragge #include <machine/bus.h>
     78  1.21    ragge #include <machine/sid.h>
     79  1.24     matt #include <machine/scb.h>
     80  1.27    ragge #include <machine/clock.h>
     81   1.1    ragge 
     82  1.16    ragge #include "ioconf.h"
     83   1.1    ragge 
     84  1.16    ragge #define MIN_DMA_LEN 128
     85   1.1    ragge 
     86   1.1    ragge struct si_dma_handle {
     87  1.16    ragge 	int	dh_flags;
     88  1.16    ragge #define SIDH_BUSY	1
     89  1.16    ragge #define SIDH_OUT	2
     90  1.23    ragge 	caddr_t dh_addr;
     91  1.23    ragge 	int	dh_len;
     92  1.23    ragge 	struct	proc *dh_proc;
     93   1.1    ragge };
     94   1.1    ragge 
     95   1.1    ragge struct si_softc {
     96  1.23    ragge 	struct	ncr5380_softc	ncr_sc;
     97  1.23    ragge 	caddr_t ncr_addr;
     98  1.23    ragge 	int	ncr_off;
     99  1.23    ragge 	int	ncr_dmaaddr;
    100  1.23    ragge 	int	ncr_dmacount;
    101  1.23    ragge 	int	ncr_dmadir;
    102  1.23    ragge 	struct	si_dma_handle ncr_dma[SCI_OPENINGS];
    103   1.1    ragge };
    104   1.1    ragge 
    105  1.23    ragge static	int si_match(struct device *, struct cfdata *, void *);
    106  1.23    ragge static	void si_attach(struct device *, struct device *, void *);
    107  1.23    ragge static	void si_minphys(struct buf *);
    108  1.23    ragge 
    109  1.23    ragge static	void si_dma_alloc __P((struct ncr5380_softc *));
    110  1.23    ragge static	void si_dma_free __P((struct ncr5380_softc *));
    111  1.23    ragge static	void si_dma_setup __P((struct ncr5380_softc *));
    112  1.23    ragge static	void si_dma_start __P((struct ncr5380_softc *));
    113  1.23    ragge static	void si_dma_poll __P((struct ncr5380_softc *));
    114  1.23    ragge static	void si_dma_eop __P((struct ncr5380_softc *));
    115  1.23    ragge static	void si_dma_stop __P((struct ncr5380_softc *));
    116  1.23    ragge 
    117   1.1    ragge 
    118   1.1    ragge struct cfattach ncr_ca = {
    119  1.16    ragge 	sizeof(struct si_softc), si_match, si_attach
    120   1.1    ragge };
    121   1.1    ragge 
    122  1.16    ragge static int
    123  1.16    ragge si_match(parent, cf, aux)
    124  1.16    ragge 	struct device *parent;
    125  1.16    ragge 	struct cfdata *cf;
    126  1.16    ragge 	void *aux;
    127   1.1    ragge {
    128  1.16    ragge 	struct vsbus_attach_args *va = aux;
    129  1.18    ragge 	volatile char *si_csr = (char *) va->va_addr;
    130   1.1    ragge 
    131  1.21    ragge 	if (vax_boardtype == VAX_BTYP_49)
    132  1.21    ragge 		return 0;
    133  1.19    ragge 	/* This is the way Linux autoprobes the interrupt MK-990321 */
    134  1.19    ragge 	si_csr[12] = 0;
    135  1.19    ragge 	si_csr[16] = 0x80;
    136  1.19    ragge 	si_csr[0] = 0x80;
    137  1.19    ragge 	si_csr[4] = 5; /* 0xcf */
    138  1.18    ragge 	DELAY(100000);
    139  1.18    ragge 	return 1;
    140   1.1    ragge }
    141   1.1    ragge 
    142  1.16    ragge static void
    143  1.18    ragge si_attach(parent, self, aux)
    144   1.1    ragge 	struct device	*parent, *self;
    145  1.18    ragge 	void		*aux;
    146   1.1    ragge {
    147  1.18    ragge 	struct vsbus_attach_args *va = aux;
    148   1.1    ragge 	struct si_softc *sc = (struct si_softc *) self;
    149  1.16    ragge 	struct ncr5380_softc *ncr_sc = &sc->ncr_sc;
    150  1.27    ragge 	int tweak, target;
    151  1.24     matt 
    152  1.24     matt 	scb_vecalloc(va->va_cvec, (void (*)(void *)) ncr5380_intr, sc, SCB_ISTACK);
    153  1.24     matt 
    154   1.1    ragge 	/*
    155  1.23    ragge 	 * DMA area mapin.
    156  1.23    ragge 	 * On VS3100, split the 128K block between the two devices.
    157  1.23    ragge 	 * On VS2000, don't care for now.
    158   1.1    ragge 	 */
    159  1.23    ragge #define DMASIZE (64*1024)
    160  1.23    ragge 	if (vax_boardtype != VAX_BTYP_410) {
    161  1.23    ragge 		if (va->va_paddr & 0x100) /* Magic */
    162  1.23    ragge 			sc->ncr_off = DMASIZE;
    163  1.23    ragge 		sc->ncr_addr = (caddr_t)uvm_km_valloc(kernel_map, DMASIZE);
    164  1.23    ragge 
    165  1.23    ragge 		ioaccess((vaddr_t)sc->ncr_addr,
    166  1.23    ragge 		    0x202d0000 + sc->ncr_off, DMASIZE/VAX_NBPG);
    167  1.23    ragge 
    168  1.23    ragge 		/*
    169  1.23    ragge 		 * MD function pointers used by the MI code.
    170  1.23    ragge 		 */
    171  1.23    ragge 		ncr_sc->sc_dma_alloc = si_dma_alloc;
    172  1.23    ragge 		ncr_sc->sc_dma_free  = si_dma_free;
    173  1.23    ragge 		ncr_sc->sc_dma_setup = si_dma_setup;
    174  1.23    ragge 		ncr_sc->sc_dma_start = si_dma_start;
    175  1.23    ragge 		ncr_sc->sc_dma_poll  = si_dma_poll;
    176  1.23    ragge 		ncr_sc->sc_dma_eop   = si_dma_eop;
    177  1.23    ragge 		ncr_sc->sc_dma_stop  = si_dma_stop;
    178  1.23    ragge 
    179  1.23    ragge 		/* DMA control register offsets */
    180  1.23    ragge 		sc->ncr_dmaaddr = 32;	/* DMA address in buffer, longword */
    181  1.23    ragge 		sc->ncr_dmacount = 64;	/* DMA count register */
    182  1.23    ragge 		sc->ncr_dmadir = 68;	/* Direction of DMA transfer */
    183  1.23    ragge 	}
    184  1.16    ragge 	ncr_sc->sc_pio_out = ncr5380_pio_out;
    185  1.16    ragge 	ncr_sc->sc_pio_in =  ncr5380_pio_in;
    186  1.16    ragge 
    187  1.16    ragge 	ncr_sc->sc_min_dma_len = MIN_DMA_LEN;
    188  1.15  thorpej 
    189  1.15  thorpej 	/*
    190  1.16    ragge 	 * Initialize fields used by the MI code.
    191   1.1    ragge 	 */
    192  1.22    ragge /*	ncr_sc->sc_regt =  Unused on VAX */
    193  1.22    ragge 	ncr_sc->sc_regh = vax_map_physmem(va->va_paddr, 1);
    194  1.22    ragge 
    195  1.22    ragge 	/* Register offsets */
    196  1.22    ragge 	ncr_sc->sci_r0 = 0;
    197  1.22    ragge 	ncr_sc->sci_r1 = 4;
    198  1.22    ragge 	ncr_sc->sci_r2 = 8;
    199  1.22    ragge 	ncr_sc->sci_r3 = 12;
    200  1.22    ragge 	ncr_sc->sci_r4 = 16;
    201  1.22    ragge 	ncr_sc->sci_r5 = 20;
    202  1.22    ragge 	ncr_sc->sci_r6 = 24;
    203  1.22    ragge 	ncr_sc->sci_r7 = 28;
    204  1.26  tsutsui 
    205  1.26  tsutsui 	ncr_sc->sc_rev = NCR_VARIANT_NCR5380;
    206   1.1    ragge 
    207  1.20    ragge 	ncr_sc->sc_no_disconnect = 0xff;
    208  1.25  mycroft 
    209  1.27    ragge 	/*
    210  1.27    ragge 	 * Get the SCSI chip target address out of NVRAM.
    211  1.27    ragge 	 * This do not apply to the VS2000.
    212  1.27    ragge 	 */
    213  1.27    ragge 	tweak = clk_tweak + (va->va_paddr & 0x100 ? 3 : 0);
    214  1.27    ragge 	if (vax_boardtype == VAX_BTYP_410)
    215  1.27    ragge 		target = 7;
    216  1.27    ragge 	else
    217  1.27    ragge 		target = (clk_page[0xbc/2] >> tweak) & 7;
    218  1.27    ragge 
    219  1.27    ragge 	printf("\n%s: NCR5380, SCSI ID %d\n", ncr_sc->sc_dev.dv_xname, target);
    220  1.27    ragge 
    221  1.25  mycroft 	ncr_sc->sc_adapter.scsipi_minphys = si_minphys;
    222  1.27    ragge 	ncr_sc->sc_link.scsipi_scsi.adapter_target = target;
    223   1.1    ragge 	/*
    224  1.16    ragge 	 * Initialize si board itself.
    225   1.1    ragge 	 */
    226  1.25  mycroft 	ncr5380_attach(ncr_sc);
    227   1.1    ragge }
    228   1.1    ragge 
    229  1.22    ragge /*
    230  1.22    ragge  * Adjust the max transfer size. The DMA buffer is only 16k on VS2000.
    231  1.22    ragge  */
    232  1.16    ragge static void
    233   1.1    ragge si_minphys(struct buf *bp)
    234   1.1    ragge {
    235  1.22    ragge 	if ((vax_boardtype == VAX_BTYP_410) && (bp->b_bcount > (16*1024)))
    236  1.22    ragge 		bp->b_bcount = (16*1024);
    237  1.22    ragge 	else if (bp->b_bcount > MAXPHYS)
    238  1.22    ragge 		bp->b_bcount = MAXPHYS;
    239  1.23    ragge }
    240  1.23    ragge 
    241  1.23    ragge void
    242  1.23    ragge si_dma_alloc(ncr_sc)
    243  1.23    ragge 	struct ncr5380_softc *ncr_sc;
    244  1.23    ragge {
    245  1.23    ragge 	struct si_softc *sc = (struct si_softc *)ncr_sc;
    246  1.23    ragge 	struct sci_req *sr = ncr_sc->sc_current;
    247  1.23    ragge 	struct scsipi_xfer *xs = sr->sr_xs;
    248  1.23    ragge 	struct si_dma_handle *dh;
    249  1.23    ragge 	int xlen, i;
    250  1.23    ragge 
    251  1.23    ragge #ifdef DIAGNOSTIC
    252  1.23    ragge 	if (sr->sr_dma_hand != NULL)
    253  1.23    ragge 		panic("si_dma_alloc: already have DMA handle");
    254  1.23    ragge #endif
    255  1.23    ragge 
    256  1.23    ragge 	/* Polled transfers shouldn't allocate a DMA handle. */
    257  1.23    ragge 	if (sr->sr_flags & SR_IMMED)
    258  1.23    ragge 		return;
    259  1.23    ragge 
    260  1.23    ragge 	xlen = ncr_sc->sc_datalen;
    261  1.23    ragge 
    262  1.23    ragge 	/* Make sure our caller checked sc_min_dma_len. */
    263  1.23    ragge 	if (xlen < MIN_DMA_LEN)
    264  1.23    ragge 		panic("si_dma_alloc: len=0x%x\n", xlen);
    265  1.23    ragge 
    266  1.23    ragge 	/*
    267  1.23    ragge 	 * Find free PDMA handle.  Guaranteed to find one since we
    268  1.23    ragge 	 * have as many PDMA handles as the driver has processes.
    269  1.23    ragge 	 * (instances?)
    270  1.23    ragge 	 */
    271  1.23    ragge 	 for (i = 0; i < SCI_OPENINGS; i++) {
    272  1.23    ragge 		if ((sc->ncr_dma[i].dh_flags & SIDH_BUSY) == 0)
    273  1.23    ragge 			goto found;
    274  1.23    ragge 	}
    275  1.23    ragge 	panic("sbc: no free PDMA handles");
    276  1.23    ragge found:
    277  1.23    ragge 	dh = &sc->ncr_dma[i];
    278  1.23    ragge 	dh->dh_flags = SIDH_BUSY;
    279  1.23    ragge 	dh->dh_addr = ncr_sc->sc_dataptr;
    280  1.23    ragge 	dh->dh_len = xlen;
    281  1.23    ragge 	dh->dh_proc = xs->bp->b_proc;
    282  1.23    ragge 
    283  1.23    ragge 	/* Remember dest buffer parameters */
    284  1.23    ragge 	if (xs->xs_control & XS_CTL_DATA_OUT)
    285  1.23    ragge 		dh->dh_flags |= SIDH_OUT;
    286  1.23    ragge 
    287  1.23    ragge 	sr->sr_dma_hand = dh;
    288  1.23    ragge }
    289  1.23    ragge 
    290  1.23    ragge void
    291  1.23    ragge si_dma_free(ncr_sc)
    292  1.23    ragge 	struct ncr5380_softc *ncr_sc;
    293  1.23    ragge {
    294  1.23    ragge 	struct sci_req *sr = ncr_sc->sc_current;
    295  1.23    ragge 	struct si_dma_handle *dh = sr->sr_dma_hand;
    296  1.23    ragge 
    297  1.23    ragge 	if (dh->dh_flags & SIDH_BUSY)
    298  1.23    ragge 		dh->dh_flags = 0;
    299  1.23    ragge 	else
    300  1.23    ragge 		printf("si_dma_free: free'ing unused buffer\n");
    301  1.23    ragge 
    302  1.23    ragge 	sr->sr_dma_hand = NULL;
    303  1.23    ragge }
    304  1.23    ragge 
    305  1.23    ragge void
    306  1.23    ragge si_dma_setup(ncr_sc)
    307  1.23    ragge 	struct ncr5380_softc *ncr_sc;
    308  1.23    ragge {
    309  1.23    ragge 	/* Do nothing here */
    310  1.23    ragge }
    311  1.23    ragge 
    312  1.23    ragge void
    313  1.23    ragge si_dma_start(ncr_sc)
    314  1.23    ragge 	struct ncr5380_softc *ncr_sc;
    315  1.23    ragge {
    316  1.23    ragge 	struct si_softc *sc = (struct si_softc *)ncr_sc;
    317  1.23    ragge 	struct sci_req *sr = ncr_sc->sc_current;
    318  1.23    ragge 	struct si_dma_handle *dh = sr->sr_dma_hand;
    319  1.23    ragge 
    320  1.23    ragge 	/*
    321  1.23    ragge 	 * Set the VAX-DMA-specific registers, and copy the data if
    322  1.23    ragge 	 * it is directed "outbound".
    323  1.23    ragge 	 */
    324  1.23    ragge 	if (dh->dh_flags & SIDH_OUT) {
    325  1.23    ragge 		if ((vaddr_t)dh->dh_addr & KERNBASE)
    326  1.23    ragge 			bcopy(dh->dh_addr, sc->ncr_addr, dh->dh_len);
    327  1.23    ragge 		else
    328  1.23    ragge 			vsbus_copyfromproc(dh->dh_proc, dh->dh_addr,
    329  1.23    ragge 			    sc->ncr_addr, dh->dh_len);
    330  1.23    ragge 		bus_space_write_1(ncr_sc->sc_regt, ncr_sc->sc_regh,
    331  1.23    ragge 		    sc->ncr_dmadir, 0);
    332  1.23    ragge 	} else {
    333  1.23    ragge 		bus_space_write_1(ncr_sc->sc_regt, ncr_sc->sc_regh,
    334  1.23    ragge 		    sc->ncr_dmadir, 1);
    335  1.23    ragge 	}
    336  1.23    ragge 	bus_space_write_4(ncr_sc->sc_regt, ncr_sc->sc_regh,
    337  1.23    ragge 	    sc->ncr_dmacount, -dh->dh_len);
    338  1.23    ragge 	bus_space_write_4(ncr_sc->sc_regt, ncr_sc->sc_regh,
    339  1.23    ragge 	    sc->ncr_dmaaddr, sc->ncr_off);
    340  1.23    ragge 	/*
    341  1.23    ragge 	 * Now from the 5380-internal DMA registers.
    342  1.23    ragge 	 */
    343  1.23    ragge 	if (dh->dh_flags & SIDH_OUT) {
    344  1.23    ragge 		NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT);
    345  1.23    ragge 		NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA);
    346  1.23    ragge 		NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
    347  1.23    ragge 		    | SCI_MODE_DMA | SCI_MODE_DMA_IE);
    348  1.23    ragge 		NCR5380_WRITE(ncr_sc, sci_dma_send, 0);
    349  1.23    ragge 	} else {
    350  1.23    ragge 		NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN);
    351  1.23    ragge 		NCR5380_WRITE(ncr_sc, sci_icmd, 0);
    352  1.23    ragge 		NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
    353  1.23    ragge 		    | SCI_MODE_DMA | SCI_MODE_DMA_IE);
    354  1.23    ragge 		NCR5380_WRITE(ncr_sc, sci_irecv, 0);
    355  1.23    ragge 	}
    356  1.23    ragge 	ncr_sc->sc_state |= NCR_DOINGDMA;
    357  1.23    ragge }
    358  1.23    ragge 
    359  1.23    ragge /*
    360  1.23    ragge  * When?
    361  1.23    ragge  */
    362  1.23    ragge void
    363  1.23    ragge si_dma_poll(ncr_sc)
    364  1.23    ragge 	struct ncr5380_softc *ncr_sc;
    365  1.23    ragge {
    366  1.23    ragge 	printf("si_dma_poll\n");
    367  1.23    ragge }
    368  1.23    ragge 
    369  1.23    ragge /*
    370  1.23    ragge  * When?
    371  1.23    ragge  */
    372  1.23    ragge void
    373  1.23    ragge si_dma_eop(ncr_sc)
    374  1.23    ragge 	struct ncr5380_softc *ncr_sc;
    375  1.23    ragge {
    376  1.23    ragge 	printf("si_dma_eop\n");
    377  1.23    ragge }
    378  1.23    ragge 
    379  1.23    ragge void
    380  1.23    ragge si_dma_stop(ncr_sc)
    381  1.23    ragge 	struct ncr5380_softc *ncr_sc;
    382  1.23    ragge {
    383  1.23    ragge 	struct si_softc *sc = (struct si_softc *)ncr_sc;
    384  1.23    ragge 	struct sci_req *sr = ncr_sc->sc_current;
    385  1.23    ragge 	struct si_dma_handle *dh = sr->sr_dma_hand;
    386  1.23    ragge 	int count, i;
    387  1.23    ragge 
    388  1.23    ragge 	if (ncr_sc->sc_state & NCR_DOINGDMA)
    389  1.23    ragge 		ncr_sc->sc_state &= ~NCR_DOINGDMA;
    390  1.23    ragge 
    391  1.23    ragge 	/*
    392  1.23    ragge 	 * Sometimes the FIFO buffer isn't drained when the
    393  1.23    ragge 	 * interrupt is posted. Just loop here and hope that
    394  1.23    ragge 	 * it will drain soon.
    395  1.23    ragge 	 */
    396  1.23    ragge 	for (i = 0; i < 20000; i++) {
    397  1.23    ragge 		count = bus_space_read_4(ncr_sc->sc_regt,
    398  1.23    ragge 		    ncr_sc->sc_regh, sc->ncr_dmacount);
    399  1.23    ragge 		if (count == 0)
    400  1.23    ragge 			break;
    401  1.23    ragge 		DELAY(100);
    402  1.23    ragge 	}
    403  1.23    ragge 	if (count == 0) {
    404  1.23    ragge 		if (((dh->dh_flags & SIDH_OUT) == 0)) {
    405  1.23    ragge 			if ((vaddr_t)dh->dh_addr & KERNBASE)
    406  1.23    ragge 				bcopy(sc->ncr_addr, dh->dh_addr, dh->dh_len);
    407  1.23    ragge 			else
    408  1.23    ragge 				vsbus_copytoproc(dh->dh_proc, sc->ncr_addr,
    409  1.23    ragge 				    dh->dh_addr, dh->dh_len);
    410  1.23    ragge 
    411  1.23    ragge 		}
    412  1.23    ragge 		ncr_sc->sc_dataptr += dh->dh_len;
    413  1.23    ragge 		ncr_sc->sc_datalen -= dh->dh_len;
    414  1.23    ragge 	}
    415  1.23    ragge 
    416  1.23    ragge 	NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) &
    417  1.23    ragge 	    ~(SCI_MODE_DMA | SCI_MODE_DMA_IE));
    418  1.23    ragge 	NCR5380_WRITE(ncr_sc, sci_icmd, 0);
    419   1.1    ragge }
    420