ncr.c revision 1.1
1 /* $NetBSD: ncr.c,v 1.1 1996/07/20 18:55:14 ragge Exp $ */ 2 3 /* #define DEBUG /* */ 4 /* #define TRACE /* */ 5 /* #define POLL_MODE /* */ 6 #define USE_VMAPBUF 7 8 /* 9 * Copyright (c) 1995 David Jones, Gordon W. Ross 10 * Copyright (c) 1994 Adam Glass 11 * All rights reserved. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. The name of the authors may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 4. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by 26 * Adam Glass, David Jones, and Gordon Ross 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 29 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 30 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 33 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 37 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * This file contains only the machine-dependent parts of the 42 * Sun3 SCSI driver. (Autoconfig stuff and DMA functions.) 43 * The machine-independent parts are in ncr5380sbc.c 44 * 45 * Supported hardware includes: 46 * Sun SCSI-3 on OBIO (Sun3/50,Sun3/60) 47 * Sun SCSI-3 on VME (Sun3/160,Sun3/260) 48 * 49 * Could be made to support the Sun3/E if someone wanted to. 50 * 51 * Note: Both supported variants of the Sun SCSI-3 adapter have 52 * some really unusual "features" for this driver to deal with, 53 * generally related to the DMA engine. The OBIO variant will 54 * ignore any attempt to write the FIFO count register while the 55 * SCSI bus is in DATA_IN or DATA_OUT phase. This is dealt with 56 * by setting the FIFO count early in COMMAND or MSG_IN phase. 57 * 58 * The VME variant has a bit to enable or disable the DMA engine, 59 * but that bit also gates the interrupt line from the NCR5380! 60 * Therefore, in order to get any interrupt from the 5380, (i.e. 61 * for reselect) one must clear the DMA engine transfer count and 62 * then enable DMA. This has the further complication that you 63 * CAN NOT touch the NCR5380 while the DMA enable bit is set, so 64 * we have to turn DMA back off before we even look at the 5380. 65 * 66 * What wonderfully whacky hardware this is! 67 * 68 * Credits, history: 69 * 70 * David Jones wrote the initial version of this module, which 71 * included support for the VME adapter only. (no reselection). 72 * 73 * Gordon Ross added support for the OBIO adapter, and re-worked 74 * both the VME and OBIO code to support disconnect/reselect. 75 * (Required figuring out the hardware "features" noted above.) 76 * 77 * The autoconfiguration boilerplate came from Adam Glass. 78 * 79 * VS2000: 80 */ 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/kernel.h> 85 #include <sys/conf.h> 86 #include <sys/file.h> 87 #include <sys/stat.h> 88 #include <sys/ioctl.h> 89 #include <sys/buf.h> 90 #include <sys/proc.h> 91 #include <sys/user.h> 92 #include <sys/map.h> 93 #include <sys/device.h> 94 #include <sys/dkstat.h> 95 #include <sys/disklabel.h> 96 #include <sys/disk.h> 97 #include <sys/syslog.h> 98 99 /* #include <sys/errno.h> */ 100 101 #include <scsi/scsi_all.h> 102 #include <scsi/scsi_debug.h> 103 #include <scsi/scsiconf.h> 104 105 #include <machine/uvax.h> 106 #include <machine/ka410.h> 107 #include <machine/ka43.h> 108 #include <machine/vsbus.h> /* struct confargs */ 109 110 #include <dev/ic/ncr5380reg.h> 111 #include <dev/ic/ncr5380var.h> 112 113 #define trace(x) 114 #define debug(x) 115 116 #ifndef NCR5380_CSRBITS 117 #define NCR5380_CSRBITS \ 118 "\020\010DEND\007DREQ\006PERR\005IREQ\004MTCH\003DCON\002ATN\001ACK" 119 #endif 120 121 #ifndef NCR5380_BUSCSRBITS 122 #define NCR5380_BUSCSRBITS \ 123 "\020\010RST\007BSY\006REQ\005MSG\004C/D\003I/O\002SEL\001DBP" 124 #endif 125 126 #include "ncr.h" 127 128 #ifdef DDB 129 #define integrate 130 #else 131 #define integrate static 132 #endif 133 134 /* 135 * Transfers smaller than this are done using PIO 136 * (on assumption they're not worth DMA overhead) 137 */ 138 #define MIN_DMA_LEN 128 139 140 /* 141 * Transfers lager than 65535 bytes need to be split-up. 142 * (Some of the FIFO logic has only 16 bits counters.) 143 * Make the size an integer multiple of the page size 144 * to avoid buf/cluster remap problems. (paranoid?) 145 * 146 * bertram: VS2000 has an DMA-area which is 16KB, thus 147 * have a maximum DMA-size of 16KB... 148 */ 149 #ifdef DMA_SHARED 150 #define MAX_DMA_LEN 0x2000 /* (8 * 1024) */ 151 #define DMA_ADDR_HBYTE 0x20 152 #define DMA_ADDR_LBYTE 0x00 153 #else 154 #define MAX_DMA_LEN 0x4000 /* (16 * 1024) */ 155 #define DMA_ADDR_HBYTE 0x00 156 #define DMA_ADDR_LBYTE 0x00 157 #endif 158 159 #ifdef DEBUG 160 int si_debug = 3; 161 static int si_link_flags = 0 /* | SDEV_DB2 */ ; 162 #endif 163 164 /* 165 * This structure is used to keep track of mappedpwd DMA requests. 166 * Note: combined the UDC command block with this structure, so 167 * the array of these has to be in DVMA space. 168 */ 169 struct si_dma_handle { 170 int dh_flags; 171 #define SIDH_BUSY 1 /* This DH is in use */ 172 #define SIDH_OUT 2 /* DMA does data out (write) */ 173 #define SIDH_PHYS 4 174 #define SIDH_DONE 8 175 u_char * dh_addr; /* KVA of start of buffer */ 176 int dh_maplen; /* Length of KVA mapping. */ 177 u_char * dh_dvma; /* VA of buffer in DVMA space */ 178 int dh_xlen; 179 }; 180 181 /* 182 * The first structure member has to be the ncr5380_softc 183 * so we can just cast to go back and fourth between them. 184 */ 185 struct si_softc { 186 struct ncr5380_softc ncr_sc; 187 volatile struct si_regs *sc_regs; /* do we really need this? */ 188 189 struct si_dma_handle *sc_dma; 190 struct confargs *sc_cfargs; 191 192 int sc_xflags; /* ka410/ka43: resid, sizeof(areg) */ 193 194 char *sc_dbase; 195 int sc_dsize; 196 197 volatile char *sc_dareg; 198 volatile short *sc_dcreg; 199 volatile char *sc_ddreg; 200 volatile int sc_dflags; 201 202 #define VSDMA_LOCKED 0x80 /* */ 203 #define VSDMA_WANTED 0x40 /* */ 204 #define VSDMA_IWANTED 0x20 205 #define VSDMA_BLOCKED 0x10 206 #define VSDMA_DMABUSY 0x08 /* DMA in progress */ 207 #define VSDMA_REGBUSY 0x04 /* accessing registers */ 208 #define VSDMA_WRBUF 0x02 /* writing to bounce-buffer */ 209 #define VSDMA_RDBUF 0x01 /* reading from bounce-buffer */ 210 211 #define VSDMA_STATUS 0xF0 212 #define VSDMA_LCKTYPE 0x0F 213 214 #ifdef POLL_MODE 215 volatile u_char *intreq; 216 volatile u_char *intclr; 217 volatile u_char *intmsk; 218 volatile int intbit; 219 #endif 220 }; 221 222 extern int cold; /* enable polling while cold-flag set */ 223 224 /* Options. Interesting values are: 1,3,7 */ 225 int si_options = 3; /* bertram: 3 or 7 ??? */ 226 #define SI_ENABLE_DMA 1 /* Use DMA (maybe polled) */ 227 #define SI_DMA_INTR 2 /* DMA completion interrupts */ 228 #define SI_DO_RESELECT 4 /* Allow disconnect/reselect */ 229 230 #define DMA_DIR_IN 1 231 #define DMA_DIR_OUT 0 232 233 /* How long to wait for DMA before declaring an error. */ 234 int si_dma_intr_timo = 500; /* ticks (sec. X 100) */ 235 236 integrate char si_name[] = "ncr"; 237 integrate int si_match(); 238 integrate void si_attach(); 239 integrate int si_intr __P((void *)); 240 241 integrate void si_minphys __P((struct buf *bp)); 242 integrate void si_reset_adapter __P((struct ncr5380_softc *sc)); 243 244 void si_dma_alloc __P((struct ncr5380_softc *)); 245 void si_dma_free __P((struct ncr5380_softc *)); 246 void si_dma_poll __P((struct ncr5380_softc *)); 247 248 void si_intr_on __P((struct ncr5380_softc *)); 249 void si_intr_off __P((struct ncr5380_softc *)); 250 251 int si_dmaLockBus __P((struct ncr5380_softc *, int)); 252 int si_dmaToggleLock __P((struct ncr5380_softc *, int, int)); 253 int si_dmaReleaseBus __P((struct ncr5380_softc *, int)); 254 255 void si_dma_setup __P((struct ncr5380_softc *)); 256 void si_dma_start __P((struct ncr5380_softc *)); 257 void si_dma_eop __P((struct ncr5380_softc *)); 258 void si_dma_stop __P((struct ncr5380_softc *)); 259 260 static struct scsi_adapter si_ops = { 261 ncr5380_scsi_cmd, /* scsi_cmd() */ 262 si_minphys, /* scsi_minphys() */ 263 NULL, /* open_target_lu() */ 264 NULL, /* close_target_lu() */ 265 }; 266 267 /* This is copied from julian's bt driver */ 268 /* "so we have a default dev struct for our link struct." */ 269 static struct scsi_device si_dev = { 270 NULL, /* Use default error handler. */ 271 NULL, /* Use default start handler. */ 272 NULL, /* Use default async handler. */ 273 NULL, /* Use default "done" routine. */ 274 }; 275 276 277 struct cfdriver ncr_cd = { 278 NULL, si_name, DV_DULL 279 }; 280 struct cfattach ncr_ca = { 281 sizeof(struct si_softc), si_match, si_attach, 282 }; 283 284 integrate int 285 si_print(aux, name) 286 void *aux; 287 char *name; 288 { 289 if (name != NULL) 290 printf("%s: scsibus ", name); 291 return UNCONF; 292 } 293 294 void 295 dk_establish(p,q) 296 struct disk *p; 297 struct device *q; 298 { 299 #if 0 300 printf ("faking dk_establish()...\n"); 301 #endif 302 } 303 304 305 integrate int 306 si_match(parent, match, aux) 307 struct device *parent; 308 void *match, *aux; 309 { 310 struct cfdata *cf = match; 311 struct confargs *ca = aux; 312 313 trace(("ncr_match(0x%x, %d, %s)\n", parent, cf->cf_unit, ca->ca_name)); 314 315 if (strcmp(ca->ca_name, "ncr") && 316 strcmp(ca->ca_name, "ncr5380") && 317 strcmp(ca->ca_name, "NCR5380")) 318 return (0); 319 320 /* 321 * we just define it being there ... 322 */ 323 return (1); 324 } 325 326 integrate void 327 si_set_portid(pid,port) 328 int pid; 329 int port; 330 { 331 struct { 332 u_long :2; 333 u_long id0:3; 334 u_long id1:3; 335 u_long :26; 336 } *p; 337 338 #ifdef DEBUG 339 int *ip; 340 ip = (void*)uvax_phys2virt(KA410_SCSIPORT); 341 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 342 printf("scsi-id: (%x/%d) %d / %d\n", *ip, *ip, p->id0, p->id1); 343 #endif 344 345 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 346 switch (port) { 347 case 0: 348 p->id0 = pid; 349 printf(": scsi-id %d\n", p->id0); 350 break; 351 case 1: 352 p->id1 = pid; 353 printf(": scsi-id %d\n", p->id1); 354 break; 355 default: 356 printf("invalid port-number %d\n", port); 357 } 358 } 359 360 integrate void 361 si_attach(parent, self, aux) 362 struct device *parent, *self; 363 void *aux; 364 { 365 struct si_softc *sc = (struct si_softc *) self; 366 struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc; 367 volatile struct si_regs *regs; 368 struct confargs *ca = aux; 369 int i; 370 int *ip = aux;; 371 372 trace (("ncr_attach(0x%x, 0x%x, %s)\n", parent, self, ca->ca_name)); 373 374 /* 375 * 376 */ 377 #ifdef POLL_MODE 378 sc->intreq = (void*)uvax_phys2virt(KA410_INTREQ); 379 sc->intmsk = (void*)uvax_phys2virt(KA410_INTMSK); 380 sc->intclr = (void*)uvax_phys2virt(KA410_INTCLR); 381 sc->intbit = ca->ca_intbit; 382 #endif 383 384 sc->sc_cfargs = ca; /* needed for interrupt-setup */ 385 386 regs = (void*)uvax_phys2virt(ca->ca_ioaddr); 387 388 sc->sc_dareg = (void*)uvax_phys2virt(ca->ca_dareg); 389 sc->sc_dcreg = (void*)uvax_phys2virt(ca->ca_dcreg); 390 sc->sc_ddreg = (void*)uvax_phys2virt(ca->ca_ddreg); 391 sc->sc_dbase = (void*)uvax_phys2virt(ca->ca_dbase); 392 sc->sc_dsize = ca->ca_dsize; 393 sc->sc_dflags = 4; /* XXX */ 394 sc->sc_xflags = ca->ca_dflag; /* should/will be renamed */ 395 /* 396 * Fill in the prototype scsi_link. 397 */ 398 ncr_sc->sc_link.adapter_softc = sc; 399 ncr_sc->sc_link.adapter_target = ca->ca_idval; 400 ncr_sc->sc_link.adapter = &si_ops; 401 ncr_sc->sc_link.device = &si_dev; 402 403 si_set_portid(ca->ca_idval, ncr_sc->sc_dev.dv_unit); 404 405 /* 406 * Initialize fields used by the MI code 407 */ 408 ncr_sc->sci_r0 = (void*)®s->sci.sci_r0; 409 ncr_sc->sci_r1 = (void*)®s->sci.sci_r1; 410 ncr_sc->sci_r2 = (void*)®s->sci.sci_r2; 411 ncr_sc->sci_r3 = (void*)®s->sci.sci_r3; 412 ncr_sc->sci_r4 = (void*)®s->sci.sci_r4; 413 ncr_sc->sci_r5 = (void*)®s->sci.sci_r5; 414 ncr_sc->sci_r6 = (void*)®s->sci.sci_r6; 415 ncr_sc->sci_r7 = (void*)®s->sci.sci_r7; 416 417 /* 418 * MD function pointers used by the MI code. 419 */ 420 ncr_sc->sc_pio_out = ncr5380_pio_out; 421 ncr_sc->sc_pio_in = ncr5380_pio_in; 422 ncr_sc->sc_dma_alloc = si_dma_alloc; 423 ncr_sc->sc_dma_free = si_dma_free; 424 ncr_sc->sc_dma_poll = si_dma_poll; /* si_dma_poll not used! */ 425 ncr_sc->sc_intr_on = si_intr_on; /* vsbus_unlockDMA; */ 426 ncr_sc->sc_intr_off = si_intr_off; /* vsbus_lockDMA; */ 427 428 ncr_sc->sc_dma_setup = NULL; /* si_dma_setup not used! */ 429 ncr_sc->sc_dma_start = si_dma_start; 430 ncr_sc->sc_dma_eop = NULL; 431 ncr_sc->sc_dma_stop = si_dma_stop; 432 433 ncr_sc->sc_flags = 0; 434 if (si_options & SI_DO_RESELECT) 435 ncr_sc->sc_flags |= NCR5380_PERMIT_RESELECT; 436 if ((si_options & SI_DMA_INTR) == 0) 437 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 438 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 439 440 /* 441 * Initialize fields used only here in the MD code. 442 */ 443 i = SCI_OPENINGS * sizeof(struct si_dma_handle); 444 sc->sc_dma = (struct si_dma_handle *) malloc(i); 445 if (sc->sc_dma == NULL) 446 panic("si: dvma_malloc failed\n"); 447 for (i = 0; i < SCI_OPENINGS; i++) 448 sc->sc_dma[i].dh_flags = 0; 449 450 sc->sc_regs = regs; 451 452 #ifdef DEBUG 453 if (si_debug) 454 printf("si: Set TheSoftC=%x TheRegs=%x\n", sc, regs); 455 ncr_sc->sc_link.flags |= si_link_flags; 456 #endif 457 458 /* 459 * Initialize si board itself. 460 */ 461 si_reset_adapter(ncr_sc); 462 ncr5380_init(ncr_sc); 463 ncr5380_reset_scsibus(ncr_sc); 464 config_found(self, &(ncr_sc->sc_link), si_print); 465 466 /* 467 * Now ready for interrupts. 468 */ 469 vsbus_intr_register(sc->sc_cfargs, si_intr, (void *)sc); 470 vsbus_intr_enable(sc->sc_cfargs); 471 } 472 473 integrate void 474 si_minphys(struct buf *bp) 475 { 476 debug(("minphys: blkno=%d, bcount=%d, data=0x%x, flags=%x\n", 477 bp->b_blkno, bp->b_bcount, bp->b_data, bp->b_flags)); 478 479 if (bp->b_bcount > MAX_DMA_LEN) { 480 #ifdef DEBUG 481 if (si_debug) { 482 printf("si_minphys len = 0x%x.\n", bp->b_bcount); 483 Debugger(); 484 } 485 #endif 486 bp->b_bcount = MAX_DMA_LEN; 487 } 488 return (minphys(bp)); 489 } 490 491 492 #define CSR_WANT (SI_CSR_SBC_IP | SI_CSR_DMA_IP | \ 493 SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR ) 494 495 static int si_intrCount = 0; 496 static int lastCSR = 0; 497 498 integrate int 499 si_intr(arg) 500 void *arg; 501 { 502 struct ncr5380_softc *ncr_sc = arg; 503 struct si_softc *sc = arg; 504 int count, claimed; 505 506 count = ++si_intrCount; 507 trace(("%s: si-intr(%d).....\n", ncr_sc->sc_dev.dv_xname, count)); 508 509 #ifdef DEBUG 510 /* 511 * Each DMA interrupt is followed by one spurious(?) interrupt. 512 * if (ncr_sc->sc_state & NCR_WORKING == 0) we know, that the 513 * interrupt was not claimed by the higher-level routine, so that 514 * it might be save to ignore these... 515 */ 516 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 517 printf("spurious(%d): %x, %d, status=%b\n", count, 518 sc->sc_dflags, ncr_sc->sc_ncmds, 519 *ncr_sc->sci_csr, NCR5380_CSRBITS); 520 } 521 #endif 522 /* 523 * If there was a DMA operation in progress, now it's no longer 524 * active, since whatever caused the interrupt also interrupted 525 * the DMA operation. Thus accessing the registers now doesn't 526 * harm anything which is not yet broken... 527 */ 528 debug(("si_intr(status: %x, dma-count: %d)\n", 529 *ncr_sc->sci_csr, *sc->sc_dcreg)); 530 531 /* 532 * First check for DMA errors / incomplete transfers 533 * If operation was read/data-in, the copy data from buffer 534 */ 535 if (ncr_sc->sc_state & NCR_DOINGDMA) { 536 struct sci_req *sr = ncr_sc->sc_current; 537 struct si_dma_handle *dh = sr->sr_dma_hand; 538 int resid, ntrans; 539 540 resid = *sc->sc_dcreg; 541 if (resid == 1 && sc->sc_xflags) { 542 debug(("correcting resid...\n")); 543 resid = 0; 544 } 545 ntrans = dh->dh_xlen + resid; 546 if (resid == 0) { 547 if ((dh->dh_flags & SIDH_OUT) == 0) { 548 si_dmaToggleLock(ncr_sc, 549 VSDMA_DMABUSY, VSDMA_RDBUF); 550 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 551 si_dmaToggleLock(ncr_sc, 552 VSDMA_RDBUF, VSDMA_DMABUSY); 553 dh->dh_flags |= SIDH_DONE; 554 } 555 } 556 else { 557 #ifdef DEBUG 558 int csr = *ncr_sc->sci_csr; 559 printf("DMA incomplete (%d/%d) status = %b\n", 560 ntrans, resid, csr, NCR5380_CSRBITS); 561 if(csr != lastCSR) { 562 int k = (csr & ~lastCSR) | (~csr & lastCSR); 563 debug(("Changed status bits: %b\n", 564 k, NCR5380_CSRBITS)); 565 lastCSR = csr & 0xFF; 566 } 567 #endif 568 printf("DMA incomplete: ntrans=%d/%d, lock=%x\n", 569 ntrans, dh->dh_xlen, sc->sc_dflags); 570 ncr_sc->sc_state |= NCR_ABORTING; 571 } 572 573 if ((sc->sc_dflags & VSDMA_BLOCKED) == 0) { 574 printf("not blocked during DMA.\n"); 575 } 576 sc->sc_dflags &= ~VSDMA_BLOCKED; 577 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 578 } 579 if ((sc->sc_dflags & VSDMA_BLOCKED) != 0) { 580 printf("blocked while not doing DMA.\n"); 581 sc->sc_dflags &= ~VSDMA_BLOCKED; 582 } 583 584 /* 585 * Now, whatever it was, let the ncr5380sbc routine handle it... 586 */ 587 claimed = ncr5380_intr(ncr_sc); 588 #ifdef DEBUG 589 if (!claimed) { 590 printf("si_intr: spurious from SBC\n"); 591 if (si_debug & 4) { 592 Debugger(); /* XXX */ 593 } 594 } 595 #endif 596 trace(("%s: si-intr(%d) done, claimed=%d\n", 597 ncr_sc->sc_dev.dv_xname, count, claimed)); 598 return (claimed); 599 } 600 601 602 integrate void 603 si_reset_adapter(struct ncr5380_softc *ncr_sc) 604 { 605 struct si_softc *sc = (struct si_softc *)ncr_sc; 606 volatile struct si_regs *si = sc->sc_regs; 607 608 #ifdef DEBUG 609 if (si_debug) { 610 printf("si_reset_adapter\n"); 611 } 612 #endif 613 SCI_CLR_INTR(ncr_sc); 614 } 615 616 617 /***************************************************************** 618 * Common functions for DMA 619 ****************************************************************/ 620 621 /* 622 * Allocate a DMA handle and put it in sc->sc_dma. Prepare 623 * for DMA transfer. On the Sun3, this means mapping the buffer 624 * into DVMA space. dvma_mapin() flushes the cache for us. 625 */ 626 void 627 si_dma_alloc(ncr_sc) 628 struct ncr5380_softc *ncr_sc; 629 { 630 struct si_softc *sc = (struct si_softc *)ncr_sc; 631 struct sci_req *sr = ncr_sc->sc_current; 632 struct scsi_xfer *xs = sr->sr_xs; 633 struct buf *bp = sr->sr_xs->bp; 634 struct si_dma_handle *dh; 635 int i, xlen; 636 u_long addr; 637 638 trace (("si_dma_alloc()\n")); 639 640 #ifdef DIAGNOSTIC 641 if (sr->sr_dma_hand != NULL) 642 panic("si_dma_alloc: already have DMA handle"); 643 #endif 644 645 addr = (u_long) ncr_sc->sc_dataptr; 646 debug(("addr=%x, dataptr=%x\n", addr, ncr_sc->sc_dataptr)); 647 xlen = ncr_sc->sc_datalen; 648 649 /* Make sure our caller checked sc_min_dma_len. */ 650 if (xlen < MIN_DMA_LEN) 651 panic("si_dma_alloc: xlen=0x%x\n", xlen); 652 653 /* 654 * Never attempt single transfers of more than 63k, because 655 * our count register may be only 16 bits (an OBIO adapter). 656 * This should never happen since already bounded by minphys(). 657 * XXX - Should just segment these... 658 */ 659 if (xlen > MAX_DMA_LEN) { 660 printf("si_dma_alloc: excessive xlen=0x%x\n", xlen); 661 Debugger(); 662 ncr_sc->sc_datalen = xlen = MAX_DMA_LEN; 663 } 664 665 /* Find free DMA handle. Guaranteed to find one since we have 666 as many DMA handles as the driver has processes. */ 667 for (i = 0; i < SCI_OPENINGS; i++) { 668 if ((sc->sc_dma[i].dh_flags & SIDH_BUSY) == 0) 669 goto found; 670 } 671 panic("si: no free DMA handles."); 672 found: 673 674 dh = &sc->sc_dma[i]; 675 dh->dh_flags = SIDH_BUSY; 676 dh->dh_addr = (u_char*) addr; 677 dh->dh_maplen = xlen; 678 dh->dh_xlen = xlen; 679 dh->dh_dvma = 0; 680 681 /* Copy the "write" flag for convenience. */ 682 if (xs->flags & SCSI_DATA_OUT) 683 dh->dh_flags |= SIDH_OUT; 684 685 #if 1 686 /* 687 * If the buffer has the flag B_PHYS, the the address specified 688 * in the buffer is a user-space address and we need to remap 689 * this address into kernel space so that using this buffer 690 * within the interrupt routine will work. 691 * If it's already a kernel space address, we need to make sure 692 * that all pages are in-core. the mapin() routine takes care 693 * of that. 694 */ 695 if (bp && (bp->b_flags & B_PHYS)) 696 dh->dh_flags |= SIDH_PHYS; 697 #endif 698 699 if (!bp) { 700 printf("ncr.c: struct buf *bp is null-pointer.\n"); 701 dh->dh_flags = 0; 702 return; 703 } 704 if (bp->b_bcount < 0 || bp->b_bcount > MAX_DMA_LEN) { 705 printf("ncr.c: invalid bcount %d (0x%x)\n", 706 bp->b_bcount, bp->b_bcount); 707 dh->dh_flags = 0; 708 return; 709 } 710 dh->dh_dvma = bp->b_data; 711 #if 0 712 /* 713 * mapping of user-space addresses is no longer neccessary, now 714 * that the vmapbuf/vunmapbuf routines exist. Now the higher-level 715 * driver already cares for the mapping! 716 */ 717 if (bp->b_flags & B_PHYS) { 718 xdebug(("not mapping in... %x/%x %x\n", bp->b_saveaddr, 719 bp->b_data, bp->b_bcount)); 720 #ifdef USE_VMAPBUF 721 dh->dh_addr = bp->b_data; 722 dh->dh_maplen = bp->b_bcount; 723 vmapbuf(bp, bp->b_bcount); 724 dh->dh_dvma = bp->b_data; 725 #else 726 dh->dh_dvma = (u_char*)vsdma_mapin(bp); 727 #endif 728 xdebug(("addr %x, maplen %d, dvma %x, bcount %d, dir %s\n", 729 dh->dh_addr, dh->dh_maplen, dh->dh_dvma, bp->b_bcount, 730 (dh->dh_flags & SIDH_OUT ? "OUT" : "IN"))); 731 } 732 #endif 733 /* success */ 734 sr->sr_dma_hand = dh; 735 736 return; 737 } 738 739 740 void 741 si_dma_free(ncr_sc) 742 struct ncr5380_softc *ncr_sc; 743 { 744 struct si_softc *sc = (struct si_softc *)ncr_sc; 745 struct sci_req *sr = ncr_sc->sc_current; 746 struct scsi_xfer *xs = sr->sr_xs; 747 struct buf *bp = sr->sr_xs->bp; 748 struct si_dma_handle *dh = sr->sr_dma_hand; 749 750 trace (("si_dma_free()\n")); 751 752 #ifdef DIAGNOSTIC 753 if (dh == NULL) 754 panic("si_dma_free: no DMA handle"); 755 #endif 756 757 if (ncr_sc->sc_state & NCR_DOINGDMA) 758 panic("si_dma_free: free while in progress"); 759 760 if (dh->dh_flags & SIDH_BUSY) { 761 #if 0 762 debug(("bp->b_flags=0x%x\n", bp->b_flags)); 763 if (bp->b_flags & B_PHYS) { 764 #ifdef USE_VMAPBUF 765 printf("not unmapping(%x/%x %x/%x %d/%d)...\n", 766 dh->dh_addr, dh->dh_dvma, 767 bp->b_saveaddr, bp->b_data, 768 bp->b_bcount, dh->dh_maplen); 769 /* vunmapbuf(bp, dh->dh_maplen); */ 770 printf("done.\n"); 771 #endif 772 dh->dh_dvma = 0; 773 } 774 #endif 775 dh->dh_flags = 0; 776 } 777 sr->sr_dma_hand = NULL; 778 } 779 780 781 /* 782 * REGBUSY and DMABUSY won't collide since the higher-level driver 783 * issues intr_on/intr_off before/after doing DMA. The only problem 784 * is to handle RDBUF/WRBUF wrt REGBUSY/DMABUSY 785 * 786 * There might be race-conditions, but for now we don't care for them... 787 */ 788 int 789 si_dmaLockBus(ncr_sc, lt) 790 struct ncr5380_softc *ncr_sc; 791 int lt; /* Lock-Type */ 792 { 793 struct si_softc *sc = (void*)ncr_sc; 794 int timeout = 200; /* wait .2 seconds max. */ 795 796 trace(("si_dmaLockBus(%x), cold: %d, current: %x\n", 797 lt, cold, sc->sc_dflags)); 798 799 #ifdef POLL_MODE 800 if (cold) 801 return (0); 802 #endif 803 804 if ((ncr_sc->sc_current != NULL) && (lt == VSDMA_REGBUSY)) { 805 printf("trying to use regs while sc_current is set.\n"); 806 printf("lt=%x, fl=%x, cur=%x\n", 807 lt, sc->sc_dflags, ncr_sc->sc_current); 808 } 809 if ((ncr_sc->sc_current == NULL) && (lt != VSDMA_REGBUSY)) { 810 printf("trying to use/prepare DMA without current.\n"); 811 printf("lt=%x, fl=%x, cur=%x\n", 812 lt, sc->sc_dflags, ncr_sc->sc_current); 813 } 814 815 if ((sc->sc_dflags & VSDMA_LOCKED) == 0) { 816 struct si_softc *sc = (struct si_softc *)ncr_sc; 817 sc->sc_dflags |= VSDMA_WANTED; 818 vsbus_lockDMA(sc->sc_cfargs); 819 sc->sc_dflags = VSDMA_LOCKED | lt; 820 return (0); 821 } 822 823 #if 1 824 while ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 825 debug(("busy wait(1)...\n")); 826 if (--timeout == 0) { 827 printf("timeout in busy-wait(%x %x)\n", 828 lt, sc->sc_dflags); 829 sc->sc_dflags &= ~VSDMA_LCKTYPE; 830 break; 831 } 832 delay(1000); 833 } 834 debug(("busy wait(1) done.\n")); 835 sc->sc_dflags |= lt; 836 837 #else 838 if ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 839 switch (lt) { 840 841 case VSDMA_RDBUF: 842 /* sc->sc_dflags |= VSDMA_IWANTED; */ 843 debug(("busy wait(1)...\n")); 844 while (sc->sc_dflags & 845 (VSDMA_WRBUF | VSDMA_DMABUSY)) { 846 if (--timeout == 0) { 847 printf("timeout in busy-wait(1)\n"); 848 sc->sc_dflags &= ~VSDMA_WRBUF; 849 sc->sc_dflags &= ~VSDMA_DMABUSY; 850 } 851 delay(1000); 852 } 853 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 854 debug(("busy wait(1) done.\n")); 855 sc->sc_dflags |= lt; 856 break; 857 858 case VSDMA_WRBUF: 859 /* sc->sc_dflags |= VSDMA_IWANTED; */ 860 debug(("busy wait(2)...\n")); 861 while (sc->sc_dflags & 862 (VSDMA_RDBUF | VSDMA_DMABUSY)) { 863 if (--timeout == 0) { 864 printf("timeout in busy-wait(2)\n"); 865 sc->sc_dflags &= ~VSDMA_RDBUF; 866 sc->sc_dflags &= ~VSDMA_DMABUSY; 867 } 868 delay(1000); 869 } 870 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 871 debug(("busy wait(2) done.\n")); 872 sc->sc_dflags |= lt; 873 break; 874 875 case VSDMA_DMABUSY: 876 /* sc->sc_dflags |= VSDMA_IWANTED; */ 877 debug(("busy wait(3)...\n")); 878 while (sc->sc_dflags & 879 (VSDMA_RDBUF | VSDMA_WRBUF)) { 880 if (--timeout == 0) { 881 printf("timeout in busy-wait(3)\n"); 882 sc->sc_dflags &= ~VSDMA_RDBUF; 883 sc->sc_dflags &= ~VSDMA_WRBUF; 884 } 885 delay(1000); 886 } 887 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 888 debug(("busy wait(3) done.\n")); 889 sc->sc_dflags |= lt; 890 break; 891 892 case VSDMA_REGBUSY: 893 /* sc->sc_dflags |= VSDMA_IWANTED; */ 894 debug(("busy wait(4)...\n")); 895 while (sc->sc_dflags & 896 (VSDMA_RDBUF | VSDMA_WRBUF | VSDMA_DMABUSY)) { 897 if (--timeout == 0) { 898 printf("timeout in busy-wait(4)\n"); 899 sc->sc_dflags &= ~VSDMA_RDBUF; 900 sc->sc_dflags &= ~VSDMA_WRBUF; 901 sc->sc_dflags &= ~VSDMA_DMABUSY; 902 } 903 delay(1000); 904 } 905 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 906 debug(("busy wait(4) done.\n")); 907 sc->sc_dflags |= lt; 908 break; 909 910 default: 911 printf("illegal lockType %x in si_dmaLockBus()\n"); 912 } 913 } 914 else 915 printf("already locked. (%x/%x)\n", lt, sc->sc_dflags); 916 #endif 917 if (sc->sc_dflags & lt) /* successfully locked for this type */ 918 return (0); 919 920 printf("spurious %x in si_dmaLockBus(%x)\n", lt, sc->sc_dflags); 921 } 922 923 /* 924 * the lock of this type is no longer needed. If all (internal) locks are 925 * released, release the DMA bus. 926 */ 927 int 928 si_dmaReleaseBus(ncr_sc, lt) 929 struct ncr5380_softc *ncr_sc; 930 int lt; /* Lock-Type */ 931 { 932 struct si_softc *sc = (void*)ncr_sc; 933 934 trace(("si_dmaReleaseBus(%x), cold: %d, current: %x\n", 935 lt, cold, sc->sc_dflags)); 936 937 #ifdef POLL_MODE 938 if (cold) 939 return (0); 940 #endif 941 942 if ((sc->sc_dflags & VSDMA_LCKTYPE) == lt) { 943 sc->sc_dflags &= ~lt; 944 } 945 else 946 printf("trying to release %x while flags = %x\n", lt, 947 sc->sc_dflags); 948 949 if (sc->sc_dflags == VSDMA_LOCKED) { /* no longer needed */ 950 struct si_softc *sc = (struct si_softc *)ncr_sc; 951 vsbus_unlockDMA(sc->sc_cfargs); 952 sc->sc_dflags = 0; 953 return (0); 954 } 955 } 956 957 /* 958 * Just toggle the type of lock without releasing the lock... 959 * This is usually needed before/after bcopy() to/from DMA-buffer 960 */ 961 int 962 si_dmaToggleLock(ncr_sc, lt1, lt2) 963 struct ncr5380_softc *ncr_sc; 964 int lt1, lt2; /* Lock-Type */ 965 { 966 struct si_softc *sc = (void*)ncr_sc; 967 968 #ifdef POLL_MODE 969 if (cold) 970 return (0); 971 #endif 972 973 if (((sc->sc_dflags & lt1) != 0) && 974 ((sc->sc_dflags & lt2) == 0)) { 975 sc->sc_dflags |= lt2; 976 sc->sc_dflags &= ~lt1; 977 return (0); 978 } 979 printf("cannot toggle locking from %x to %x (current = %x)\n", 980 lt1, lt2, sc->sc_dflags); 981 } 982 983 /* 984 * This is called when the bus is going idle, 985 * so we want to enable the SBC interrupts. 986 * That is controlled by the DMA enable! 987 * Who would have guessed! 988 * What a NASTY trick! 989 */ 990 void 991 si_intr_on(ncr_sc) 992 struct ncr5380_softc *ncr_sc; 993 { 994 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 995 } 996 997 /* 998 * This is called when the bus is idle and we are 999 * about to start playing with the SBC chip. 1000 * 1001 * VS2000 note: we have four kinds of access which are mutually exclusive: 1002 * - access to the NCR5380 registers 1003 * - access to the HDC9224 registers 1004 * - access to the DMA area 1005 * - doing DMA 1006 */ 1007 void 1008 si_intr_off(ncr_sc) 1009 struct ncr5380_softc *ncr_sc; 1010 { 1011 si_dmaLockBus(ncr_sc, VSDMA_REGBUSY); 1012 } 1013 1014 /***************************************************************** 1015 * VME functions for DMA 1016 ****************************************************************/ 1017 1018 1019 /* 1020 * This function is called during the COMMAND or MSG_IN phase 1021 * that preceeds a DATA_IN or DATA_OUT phase, in case we need 1022 * to setup the DMA engine before the bus enters a DATA phase. 1023 * 1024 * XXX: The VME adapter appears to suppress SBC interrupts 1025 * when the FIFO is not empty or the FIFO count is non-zero! 1026 * 1027 * On the VME version we just clear the DMA count and address 1028 * here (to make sure it stays idle) and do the real setup 1029 * later, in dma_start. 1030 */ 1031 void 1032 si_dma_setup(ncr_sc) 1033 struct ncr5380_softc *ncr_sc; 1034 { 1035 trace (("si_dma_setup(ncr_sc) !!!\n")); 1036 1037 /* 1038 * VS2000: nothing to do ... 1039 */ 1040 } 1041 1042 1043 void 1044 si_dma_start(ncr_sc) 1045 struct ncr5380_softc *ncr_sc; 1046 { 1047 struct si_softc *sc = (struct si_softc *)ncr_sc; 1048 struct sci_req *sr = ncr_sc->sc_current; 1049 struct si_dma_handle *dh = sr->sr_dma_hand; 1050 volatile struct si_regs *si = sc->sc_regs; 1051 long data_pa; 1052 int xlen; 1053 1054 trace(("si_dma_start(%x)\n", sr->sr_dma_hand)); 1055 1056 /* 1057 * we always transfer from/to base of DMA-area, 1058 * thus the DMA-address is always the same, only size 1059 * and direction matter/differ on VS2000 1060 */ 1061 1062 debug(("ncr_sc->sc_datalen = %d\n", ncr_sc->sc_datalen)); 1063 xlen = ncr_sc->sc_datalen; 1064 dh->dh_xlen = xlen; 1065 1066 /* 1067 * VS2000 has a fixed 16KB-area where DMA is restricted to. 1068 * All DMA-addresses are relative to this base: KA410_DMA_BASE 1069 * Thus we need to copy the data into this area when writing, 1070 * or copy from this area when reading. (kind of bounce-buffer) 1071 */ 1072 1073 /* Set direction (send/recv) */ 1074 if (dh->dh_flags & SIDH_OUT) { 1075 /* 1076 * We know that we are called while intr_off (regs locked) 1077 * thus we toggle the lock from REGBUSY to WRBUF 1078 * also we set the BLOCKIT flag, so that the locking of 1079 * the DMA bus won't be released to the HDC9224... 1080 */ 1081 debug(("preparing msg-out (bcopy)\n")); 1082 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_WRBUF); 1083 bcopy(dh->dh_dvma, sc->sc_dbase, xlen); 1084 si_dmaToggleLock(ncr_sc, VSDMA_WRBUF, VSDMA_REGBUSY); 1085 *sc->sc_ddreg = DMA_DIR_OUT; 1086 } 1087 else { 1088 debug(("preparing data-in (bzero)\n")); 1089 /* bzero(sc->sc_dbase, xlen); */ 1090 *sc->sc_ddreg = DMA_DIR_IN; 1091 } 1092 sc->sc_dflags |= VSDMA_BLOCKED; 1093 1094 *sc->sc_dareg = DMA_ADDR_HBYTE; /* high byte (6 bits) */ 1095 *sc->sc_dareg = DMA_ADDR_LBYTE; /* low byte */ 1096 *sc->sc_dcreg = 0 - xlen; /* bertram XXX */ 1097 1098 #ifdef DEBUG 1099 if (si_debug & 2) { 1100 printf("si_dma_start: dh=0x%x, pa=0x%x, xlen=%d, creg=0x%x\n", 1101 dh, data_pa, xlen, *sc->sc_dcreg); 1102 } 1103 #endif 1104 1105 #ifdef POLL_MODE 1106 debug(("dma_start: cold=%d\n", cold)); 1107 if (cold) { 1108 *sc->intmsk &= ~sc->intbit; 1109 *sc->intclr = sc->intbit; 1110 } 1111 else 1112 *sc->intmsk |= sc->intbit; 1113 #endif 1114 /* 1115 * Acknowledge the phase change. (After DMA setup!) 1116 * Put the SBIC into DMA mode, and start the transfer. 1117 */ 1118 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_DMABUSY); 1119 if (dh->dh_flags & SIDH_OUT) { 1120 *ncr_sc->sci_tcmd = PHASE_DATA_OUT; 1121 SCI_CLR_INTR(ncr_sc); 1122 *ncr_sc->sci_icmd = SCI_ICMD_DATA; 1123 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1124 *ncr_sc->sci_dma_send = 0; /* start it */ 1125 } else { 1126 *ncr_sc->sci_tcmd = PHASE_DATA_IN; 1127 SCI_CLR_INTR(ncr_sc); 1128 *ncr_sc->sci_icmd = 0; 1129 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1130 *ncr_sc->sci_irecv = 0; /* start it */ 1131 } 1132 ncr_sc->sc_state |= NCR_DOINGDMA; 1133 /* 1134 * having a delay (eg. printf) here, seems to solve the problem. 1135 * Isn't that strange ???? 1136 * Maybe the higher-level driver accesses one of the registers of 1137 * the controller while DMA is in progress. Having a long enough 1138 * delay here might prevent/delay this access until DMA bus is 1139 * free again... 1140 * 1141 * The instruction ++++ printf("DMA started.\n"); ++++ 1142 * is long/slow enough, to make the SSCI driver work. Thus we 1143 * try to find a delay() long/slow enough to do the same. The 1144 * argument to this delay is relative to the transfer-count. 1145 */ 1146 delay(3*xlen/4); /* XXX solve this problem!!! XXX */ 1147 1148 #ifdef DEBUG 1149 if (si_debug & 2) { 1150 printf("si_dma_start: started, flags=0x%x\n", 1151 ncr_sc->sc_state); 1152 } 1153 #endif 1154 } 1155 1156 1157 void 1158 si_vme_dma_eop(ncr_sc) 1159 struct ncr5380_softc *ncr_sc; 1160 { 1161 trace (("si_vme_dma_eop() !!!\n")); 1162 /* Not needed - DMA was stopped prior to examining sci_csr */ 1163 } 1164 1165 /* 1166 * si_dma_stop() has now become almost a nop-routine, since DMA-buffer 1167 * has already been read within si_intr(), so there's nothing left to do. 1168 */ 1169 void 1170 si_dma_stop(ncr_sc) 1171 struct ncr5380_softc *ncr_sc; 1172 { 1173 struct si_softc *sc = (struct si_softc *)ncr_sc; 1174 struct sci_req *sr = ncr_sc->sc_current; 1175 struct si_dma_handle *dh = sr->sr_dma_hand; 1176 volatile struct si_regs *si = sc->sc_regs; 1177 int resid, ntrans; 1178 1179 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 1180 #ifdef DEBUG 1181 printf("si_dma_stop: dma not running\n"); 1182 #endif 1183 return; 1184 } 1185 ncr_sc->sc_state &= ~NCR_DOINGDMA; 1186 1187 /* Note that timeout may have set the error flag. */ 1188 if (ncr_sc->sc_state & NCR_ABORTING) { 1189 printf("si_dma_stop: timeout?\n"); 1190 goto out; 1191 } 1192 1193 /* 1194 * Now try to figure out how much actually transferred 1195 */ 1196 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1197 si_dmaToggleLock(ncr_sc, VSDMA_DMABUSY, VSDMA_REGBUSY); 1198 resid = *sc->sc_dcreg; 1199 /* 1200 * XXX: don't correct at two places !!! 1201 */ 1202 if (resid == 1 && sc->sc_xflags) { 1203 resid = 0; 1204 } 1205 ntrans = dh->dh_xlen + resid; 1206 if (resid != 0) 1207 printf("resid=%d, xlen=%d, ntrans=%d\n", 1208 resid, dh->dh_xlen, ntrans); 1209 1210 #ifdef DEBUG 1211 if (si_debug & 2) { 1212 printf("si_dma_stop: resid=0x%x ntrans=0x%x\n", 1213 resid, ntrans); 1214 } 1215 #endif 1216 1217 if (ntrans < MIN_DMA_LEN) { 1218 printf("si: fifo count: 0x%x\n", resid); 1219 ncr_sc->sc_state |= NCR_ABORTING; 1220 goto out; 1221 } 1222 if (ntrans > ncr_sc->sc_datalen) 1223 panic("si_dma_stop: excess transfer"); 1224 1225 /* 1226 * On VS2000 in case of a READ-operation, we must now copy 1227 * the buffer-contents to the destination-address! 1228 */ 1229 if ((dh->dh_flags & SIDH_OUT) == 0 && 1230 (dh->dh_flags & SIDH_DONE) == 0) { 1231 printf("DMA buffer not yet copied.\n"); 1232 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_RDBUF); 1233 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 1234 si_dmaToggleLock(ncr_sc, VSDMA_RDBUF, VSDMA_REGBUSY); 1235 } 1236 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 1237 1238 /* Adjust data pointer */ 1239 ncr_sc->sc_dataptr += ntrans; 1240 ncr_sc->sc_datalen -= ntrans; 1241 1242 out: 1243 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1244 1245 /* Put SBIC back in PIO mode. */ 1246 *ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE); 1247 *ncr_sc->sci_icmd = 0; 1248 1249 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 1250 } 1251 1252 /* 1253 * Poll (spin-wait) for DMA completion. 1254 * Called right after xx_dma_start(), and 1255 * xx_dma_stop() will be called next. 1256 */ 1257 void 1258 si_dma_poll(ncr_sc) 1259 struct ncr5380_softc *ncr_sc; 1260 { 1261 struct si_softc *sc = (struct si_softc *)ncr_sc; 1262 struct sci_req *sr = ncr_sc->sc_current; 1263 struct si_dma_handle *dh = sr->sr_dma_hand; 1264 int i, timeout; 1265 1266 if (! cold) 1267 printf("spurious call of DMA-poll ???"); 1268 1269 #ifdef POLL_MODE 1270 1271 delay(10000); 1272 trace(("si_dma_poll(%x)\n", *sc->sc_dcreg)); 1273 1274 /* 1275 * interrupt-request has been cleared by dma_start, thus 1276 * we do nothing else but wait for the intreq to reappear... 1277 */ 1278 1279 timeout = 5000; 1280 for (i=0; i<timeout; i++) { 1281 if (*sc->intreq & sc->intbit) 1282 break; 1283 delay(100); 1284 } 1285 if ((*sc->intreq & sc->intbit) == 0) { 1286 printf("si: DMA timeout (while polling)\n"); 1287 /* Indicate timeout as MI code would. */ 1288 sr->sr_flags |= SR_OVERDUE; 1289 } 1290 #endif 1291 return; 1292 } 1293
Indexes created Tue Sep 30 20:09:53 GMT 2025