ncr.c revision 1.10
1 /* $NetBSD: ncr.c,v 1.10 1997/10/19 20:35:15 ragge Exp $ */ 2 3 /* #define DEBUG /* */ 4 /* #define TRACE /* */ 5 /* #define POLL_MODE /* */ 6 #define USE_VMAPBUF 7 8 /* 9 * Copyright (c) 1995 David Jones, Gordon W. Ross 10 * Copyright (c) 1994 Adam Glass 11 * All rights reserved. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. The name of the authors may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 4. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by 26 * Adam Glass, David Jones, and Gordon Ross 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 29 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 30 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 33 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 37 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * This file contains only the machine-dependent parts of the 42 * Sun3 SCSI driver. (Autoconfig stuff and DMA functions.) 43 * The machine-independent parts are in ncr5380sbc.c 44 * 45 * Supported hardware includes: 46 * Sun SCSI-3 on OBIO (Sun3/50,Sun3/60) 47 * Sun SCSI-3 on VME (Sun3/160,Sun3/260) 48 * 49 * Could be made to support the Sun3/E if someone wanted to. 50 * 51 * Note: Both supported variants of the Sun SCSI-3 adapter have 52 * some really unusual "features" for this driver to deal with, 53 * generally related to the DMA engine. The OBIO variant will 54 * ignore any attempt to write the FIFO count register while the 55 * SCSI bus is in DATA_IN or DATA_OUT phase. This is dealt with 56 * by setting the FIFO count early in COMMAND or MSG_IN phase. 57 * 58 * The VME variant has a bit to enable or disable the DMA engine, 59 * but that bit also gates the interrupt line from the NCR5380! 60 * Therefore, in order to get any interrupt from the 5380, (i.e. 61 * for reselect) one must clear the DMA engine transfer count and 62 * then enable DMA. This has the further complication that you 63 * CAN NOT touch the NCR5380 while the DMA enable bit is set, so 64 * we have to turn DMA back off before we even look at the 5380. 65 * 66 * What wonderfully whacky hardware this is! 67 * 68 * Credits, history: 69 * 70 * David Jones wrote the initial version of this module, which 71 * included support for the VME adapter only. (no reselection). 72 * 73 * Gordon Ross added support for the OBIO adapter, and re-worked 74 * both the VME and OBIO code to support disconnect/reselect. 75 * (Required figuring out the hardware "features" noted above.) 76 * 77 * The autoconfiguration boilerplate came from Adam Glass. 78 * 79 * VS2000: 80 */ 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/kernel.h> 85 #include <sys/conf.h> 86 #include <sys/file.h> 87 #include <sys/stat.h> 88 #include <sys/ioctl.h> 89 #include <sys/buf.h> 90 #include <sys/proc.h> 91 #include <sys/user.h> 92 #include <sys/map.h> 93 #include <sys/device.h> 94 #include <sys/dkstat.h> 95 #include <sys/disklabel.h> 96 #include <sys/disk.h> 97 #include <sys/syslog.h> 98 99 /* #include <sys/errno.h> */ 100 101 #include <dev/scsipi/scsi_all.h> 102 #include <dev/scsipi/scsipi_all.h> 103 #include <dev/scsipi/scsipi_debug.h> 104 #include <dev/scsipi/scsiconf.h> 105 106 #include <machine/uvax.h> 107 #include <machine/ka410.h> 108 #include <machine/ka43.h> 109 #include <machine/vsbus.h> /* struct confargs */ 110 111 #include <dev/ic/ncr5380reg.h> 112 #include <dev/ic/ncr5380var.h> 113 114 #define trace(x) 115 #define debug(x) 116 117 #ifndef NCR5380_CSRBITS 118 #define NCR5380_CSRBITS \ 119 "\020\010DEND\007DREQ\006PERR\005IREQ\004MTCH\003DCON\002ATN\001ACK" 120 #endif 121 122 #ifndef NCR5380_BUSCSRBITS 123 #define NCR5380_BUSCSRBITS \ 124 "\020\010RST\007BSY\006REQ\005MSG\004C/D\003I/O\002SEL\001DBP" 125 #endif 126 127 #include "ncr.h" 128 129 #ifdef DDB 130 #define integrate 131 #else 132 #define integrate static 133 #endif 134 135 /* 136 * Transfers smaller than this are done using PIO 137 * (on assumption they're not worth DMA overhead) 138 */ 139 #define MIN_DMA_LEN 128 140 141 /* 142 * Transfers lager than 65535 bytes need to be split-up. 143 * (Some of the FIFO logic has only 16 bits counters.) 144 * Make the size an integer multiple of the page size 145 * to avoid buf/cluster remap problems. (paranoid?) 146 * 147 * bertram: VS2000 has an DMA-area which is 16KB, thus 148 * have a maximum DMA-size of 16KB... 149 */ 150 #ifdef DMA_SHARED 151 #define MAX_DMA_LEN 0x2000 /* (8 * 1024) */ 152 #define DMA_ADDR_HBYTE 0x20 153 #define DMA_ADDR_LBYTE 0x00 154 #else 155 #define MAX_DMA_LEN 0x4000 /* (16 * 1024) */ 156 #define DMA_ADDR_HBYTE 0x00 157 #define DMA_ADDR_LBYTE 0x00 158 #endif 159 160 #ifdef DEBUG 161 int si_debug = 3; 162 static int si_link_flags = 0 /* | SDEV_DB2 */ ; 163 #endif 164 165 /* 166 * This structure is used to keep track of mappedpwd DMA requests. 167 * Note: combined the UDC command block with this structure, so 168 * the array of these has to be in DVMA space. 169 */ 170 struct si_dma_handle { 171 int dh_flags; 172 #define SIDH_BUSY 1 /* This DH is in use */ 173 #define SIDH_OUT 2 /* DMA does data out (write) */ 174 #define SIDH_PHYS 4 175 #define SIDH_DONE 8 176 u_char * dh_addr; /* KVA of start of buffer */ 177 int dh_maplen; /* Length of KVA mapping. */ 178 u_char * dh_dvma; /* VA of buffer in DVMA space */ 179 int dh_xlen; 180 }; 181 182 /* 183 * The first structure member has to be the ncr5380_softc 184 * so we can just cast to go back and fourth between them. 185 */ 186 struct si_softc { 187 struct ncr5380_softc ncr_sc; 188 volatile struct si_regs *sc_regs; /* do we really need this? */ 189 190 struct si_dma_handle *sc_dma; 191 struct confargs *sc_cfargs; 192 193 int sc_xflags; /* ka410/ka43: resid, sizeof(areg) */ 194 195 char *sc_dbase; 196 int sc_dsize; 197 198 volatile char *sc_dareg; 199 volatile short *sc_dcreg; 200 volatile char *sc_ddreg; 201 volatile int sc_dflags; 202 203 #define VSDMA_LOCKED 0x80 /* */ 204 #define VSDMA_WANTED 0x40 /* */ 205 #define VSDMA_IWANTED 0x20 206 #define VSDMA_BLOCKED 0x10 207 #define VSDMA_DMABUSY 0x08 /* DMA in progress */ 208 #define VSDMA_REGBUSY 0x04 /* accessing registers */ 209 #define VSDMA_WRBUF 0x02 /* writing to bounce-buffer */ 210 #define VSDMA_RDBUF 0x01 /* reading from bounce-buffer */ 211 212 #define VSDMA_STATUS 0xF0 213 #define VSDMA_LCKTYPE 0x0F 214 215 #ifdef POLL_MODE 216 volatile u_char *intreq; 217 volatile u_char *intclr; 218 volatile u_char *intmsk; 219 volatile int intbit; 220 #endif 221 }; 222 223 extern int cold; /* enable polling while cold-flag set */ 224 225 /* Options. Interesting values are: 1,3,7 */ 226 int si_options = 3; /* bertram: 3 or 7 ??? */ 227 #define SI_ENABLE_DMA 1 /* Use DMA (maybe polled) */ 228 #define SI_DMA_INTR 2 /* DMA completion interrupts */ 229 #define SI_DO_RESELECT 4 /* Allow disconnect/reselect */ 230 231 #define DMA_DIR_IN 1 232 #define DMA_DIR_OUT 0 233 234 /* How long to wait for DMA before declaring an error. */ 235 int si_dma_intr_timo = 500; /* ticks (sec. X 100) */ 236 237 integrate char si_name[] = "ncr"; 238 integrate int si_match(); 239 integrate void si_attach(); 240 integrate int si_intr __P((void *)); 241 242 integrate void si_minphys __P((struct buf *bp)); 243 integrate void si_reset_adapter __P((struct ncr5380_softc *sc)); 244 245 void si_dma_alloc __P((struct ncr5380_softc *)); 246 void si_dma_free __P((struct ncr5380_softc *)); 247 void si_dma_poll __P((struct ncr5380_softc *)); 248 249 void si_intr_on __P((struct ncr5380_softc *)); 250 void si_intr_off __P((struct ncr5380_softc *)); 251 252 int si_dmaLockBus __P((struct ncr5380_softc *, int)); 253 int si_dmaToggleLock __P((struct ncr5380_softc *, int, int)); 254 int si_dmaReleaseBus __P((struct ncr5380_softc *, int)); 255 256 void si_dma_setup __P((struct ncr5380_softc *)); 257 void si_dma_start __P((struct ncr5380_softc *)); 258 void si_dma_eop __P((struct ncr5380_softc *)); 259 void si_dma_stop __P((struct ncr5380_softc *)); 260 261 static struct scsipi_adapter si_ops = { 262 ncr5380_scsi_cmd, /* scsi_cmd() */ 263 si_minphys, /* scsi_minphys() */ 264 NULL, /* open_target_lu() */ 265 NULL, /* close_target_lu() */ 266 }; 267 268 /* This is copied from julian's bt driver */ 269 /* "so we have a default dev struct for our link struct." */ 270 static struct scsipi_device si_dev = { 271 NULL, /* Use default error handler. */ 272 NULL, /* Use default start handler. */ 273 NULL, /* Use default async handler. */ 274 NULL, /* Use default "done" routine. */ 275 }; 276 277 278 struct cfdriver ncr_cd = { 279 NULL, si_name, DV_DULL 280 }; 281 struct cfattach ncr_ca = { 282 sizeof(struct si_softc), si_match, si_attach, 283 }; 284 285 void 286 dk_establish(p,q) 287 struct disk *p; 288 struct device *q; 289 { 290 #if 0 291 printf ("faking dk_establish()...\n"); 292 #endif 293 } 294 295 296 integrate int 297 si_match(parent, match, aux) 298 struct device *parent; 299 void *match, *aux; 300 { 301 struct cfdata *cf = match; 302 struct confargs *ca = aux; 303 volatile int *base; 304 int res; 305 306 trace(("ncr_match(0x%x, %d, %s)\n", parent, cf->cf_unit, ca->ca_name)); 307 308 if (strcmp(ca->ca_name, "ncr") && 309 strcmp(ca->ca_name, "ncr5380") && 310 strcmp(ca->ca_name, "NCR5380")) 311 return (0); 312 313 base = (void*)uvax_phys2virt(ca->ca_ioaddr); 314 printf("probing for SCSI controller at 0x%x...\n", ca->ca_ioaddr); 315 /* 316 * this is rather brute force attempt: 317 * it seems that writing -1 to the location of the ncr's registers 318 * results in 0x000000?? (8-bit registers) if ncr5380 exists and 319 * in 0xffffffff if there's no ncr5380 at this address. 320 */ 321 *base = -1; /* might be sufficient to check first reg. only */ 322 res = *base; 323 printf("result: 0x%x (%d)\n", res, res); 324 res >>= 16; 325 if (res == 0xffff) { 326 printf("no NCR5380 at 0x%x.\n", ca->ca_ioaddr); 327 return (0); 328 } 329 else if (res == 0) { 330 printf("SCSI controller found.\n"); 331 return (1); 332 } 333 printf("unexpected/strange result 0x%x during probe.\n"); 334 return (0); 335 } 336 337 integrate void 338 si_set_portid(pid,port) 339 int pid; 340 int port; 341 { 342 struct { 343 u_long :2; 344 u_long id0:3; 345 u_long id1:3; 346 u_long :26; 347 } *p; 348 349 #ifdef DEBUG 350 int *ip; 351 ip = (void*)uvax_phys2virt(KA410_SCSIPORT); 352 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 353 printf("scsi-id: (%x/%d) %d / %d\n", *ip, *ip, p->id0, p->id1); 354 #endif 355 356 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 357 switch (port) { 358 case 0: 359 p->id0 = pid; 360 printf(": scsi-id %d\n", p->id0); 361 break; 362 case 1: 363 p->id1 = pid; 364 printf(": scsi-id %d\n", p->id1); 365 break; 366 default: 367 printf("invalid port-number %d\n", port); 368 } 369 } 370 371 integrate void 372 si_attach(parent, self, aux) 373 struct device *parent, *self; 374 void *aux; 375 { 376 struct si_softc *sc = (struct si_softc *) self; 377 struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc; 378 volatile struct si_regs *regs; 379 struct confargs *ca = aux; 380 int i; 381 int *ip = aux;; 382 383 trace (("ncr_attach(0x%x, 0x%x, %s)\n", parent, self, ca->ca_name)); 384 385 /* 386 * 387 */ 388 #ifdef POLL_MODE 389 sc->intreq = (void*)uvax_phys2virt(KA410_INTREQ); 390 sc->intmsk = (void*)uvax_phys2virt(KA410_INTMSK); 391 sc->intclr = (void*)uvax_phys2virt(KA410_INTCLR); 392 sc->intbit = ca->ca_intbit; 393 #endif 394 395 sc->sc_cfargs = ca; /* needed for interrupt-setup */ 396 397 regs = (void*)uvax_phys2virt(ca->ca_ioaddr); 398 399 sc->sc_dareg = (void*)uvax_phys2virt(ca->ca_dareg); 400 sc->sc_dcreg = (void*)uvax_phys2virt(ca->ca_dcreg); 401 sc->sc_ddreg = (void*)uvax_phys2virt(ca->ca_ddreg); 402 sc->sc_dbase = (void*)uvax_phys2virt(ca->ca_dbase); 403 sc->sc_dsize = ca->ca_dsize; 404 sc->sc_dflags = 4; /* XXX */ 405 sc->sc_xflags = ca->ca_dflag; /* should/will be renamed */ 406 /* 407 * Fill in the prototype scsi_link. 408 */ 409 ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 410 ncr_sc->sc_link.adapter_softc = sc; 411 ncr_sc->sc_link.scsipi_scsi.adapter_target = ca->ca_idval; 412 ncr_sc->sc_link.adapter = &si_ops; 413 ncr_sc->sc_link.device = &si_dev; 414 ncr_sc->sc_link.type = BUS_SCSI; 415 416 si_set_portid(ca->ca_idval, ncr_sc->sc_dev.dv_unit); 417 418 /* 419 * Initialize fields used by the MI code 420 */ 421 ncr_sc->sci_r0 = (void*)®s->sci.sci_r0; 422 ncr_sc->sci_r1 = (void*)®s->sci.sci_r1; 423 ncr_sc->sci_r2 = (void*)®s->sci.sci_r2; 424 ncr_sc->sci_r3 = (void*)®s->sci.sci_r3; 425 ncr_sc->sci_r4 = (void*)®s->sci.sci_r4; 426 ncr_sc->sci_r5 = (void*)®s->sci.sci_r5; 427 ncr_sc->sci_r6 = (void*)®s->sci.sci_r6; 428 ncr_sc->sci_r7 = (void*)®s->sci.sci_r7; 429 430 /* 431 * MD function pointers used by the MI code. 432 */ 433 ncr_sc->sc_pio_out = ncr5380_pio_out; 434 ncr_sc->sc_pio_in = ncr5380_pio_in; 435 ncr_sc->sc_dma_alloc = si_dma_alloc; 436 ncr_sc->sc_dma_free = si_dma_free; 437 ncr_sc->sc_dma_poll = si_dma_poll; /* si_dma_poll not used! */ 438 ncr_sc->sc_intr_on = si_intr_on; /* vsbus_unlockDMA; */ 439 ncr_sc->sc_intr_off = si_intr_off; /* vsbus_lockDMA; */ 440 441 ncr_sc->sc_dma_setup = NULL; /* si_dma_setup not used! */ 442 ncr_sc->sc_dma_start = si_dma_start; 443 ncr_sc->sc_dma_eop = NULL; 444 ncr_sc->sc_dma_stop = si_dma_stop; 445 446 ncr_sc->sc_flags = 0; 447 if ((si_options & SI_DO_RESELECT) == 0) 448 ncr_sc->sc_no_disconnect = 0xff; 449 if ((si_options & SI_DMA_INTR) == 0) 450 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 451 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 452 453 /* 454 * Initialize fields used only here in the MD code. 455 */ 456 i = SCI_OPENINGS * sizeof(struct si_dma_handle); 457 sc->sc_dma = (struct si_dma_handle *) malloc(i); 458 if (sc->sc_dma == NULL) 459 panic("si: dvma_malloc failed\n"); 460 for (i = 0; i < SCI_OPENINGS; i++) 461 sc->sc_dma[i].dh_flags = 0; 462 463 sc->sc_regs = regs; 464 465 #ifdef DEBUG 466 if (si_debug) 467 printf("si: Set TheSoftC=%x TheRegs=%x\n", sc, regs); 468 ncr_sc->sc_link.flags |= si_link_flags; 469 #endif 470 471 /* 472 * Initialize si board itself. 473 */ 474 si_reset_adapter(ncr_sc); 475 ncr5380_init(ncr_sc); 476 ncr5380_reset_scsibus(ncr_sc); 477 config_found(self, &(ncr_sc->sc_link), scsiprint); 478 479 /* 480 * Now ready for interrupts. 481 */ 482 vsbus_intr_register(sc->sc_cfargs, si_intr, (void *)sc); 483 vsbus_intr_enable(sc->sc_cfargs); 484 } 485 486 integrate void 487 si_minphys(struct buf *bp) 488 { 489 debug(("minphys: blkno=%d, bcount=%d, data=0x%x, flags=%x\n", 490 bp->b_blkno, bp->b_bcount, bp->b_data, bp->b_flags)); 491 492 if (bp->b_bcount > MAX_DMA_LEN) { 493 #ifdef DEBUG 494 if (si_debug) { 495 printf("si_minphys len = 0x%x.\n", bp->b_bcount); 496 #ifdef DDB 497 Debugger(); 498 #endif 499 } 500 #endif 501 bp->b_bcount = MAX_DMA_LEN; 502 } 503 return (minphys(bp)); 504 } 505 506 507 #define CSR_WANT (SI_CSR_SBC_IP | SI_CSR_DMA_IP | \ 508 SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR ) 509 510 static int si_intrCount = 0; 511 static int lastCSR = 0; 512 513 integrate int 514 si_intr(arg) 515 void *arg; 516 { 517 struct ncr5380_softc *ncr_sc = arg; 518 struct si_softc *sc = arg; 519 int count, claimed; 520 521 count = ++si_intrCount; 522 trace(("%s: si-intr(%d).....\n", ncr_sc->sc_dev.dv_xname, count)); 523 524 #ifdef DEBUG 525 /* 526 * Each DMA interrupt is followed by one spurious(?) interrupt. 527 * if (ncr_sc->sc_state & NCR_WORKING == 0) we know, that the 528 * interrupt was not claimed by the higher-level routine, so that 529 * it might be save to ignore these... 530 */ 531 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 532 printf("spurious(%d): %x, %d, status=%b\n", count, 533 sc->sc_dflags, ncr_sc->sc_ncmds, 534 *ncr_sc->sci_csr, NCR5380_CSRBITS); 535 } 536 #endif 537 /* 538 * If there was a DMA operation in progress, now it's no longer 539 * active, since whatever caused the interrupt also interrupted 540 * the DMA operation. Thus accessing the registers now doesn't 541 * harm anything which is not yet broken... 542 */ 543 debug(("si_intr(status: %x, dma-count: %d)\n", 544 *ncr_sc->sci_csr, *sc->sc_dcreg)); 545 546 /* 547 * First check for DMA errors / incomplete transfers 548 * If operation was read/data-in, the copy data from buffer 549 */ 550 if (ncr_sc->sc_state & NCR_DOINGDMA) { 551 struct sci_req *sr = ncr_sc->sc_current; 552 struct si_dma_handle *dh = sr->sr_dma_hand; 553 int resid, ntrans; 554 555 resid = *sc->sc_dcreg; 556 if (resid == 1 && sc->sc_xflags) { 557 debug(("correcting resid...\n")); 558 resid = 0; 559 } 560 ntrans = dh->dh_xlen + resid; 561 if (resid == 0) { 562 if ((dh->dh_flags & SIDH_OUT) == 0) { 563 si_dmaToggleLock(ncr_sc, 564 VSDMA_DMABUSY, VSDMA_RDBUF); 565 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 566 si_dmaToggleLock(ncr_sc, 567 VSDMA_RDBUF, VSDMA_DMABUSY); 568 dh->dh_flags |= SIDH_DONE; 569 } 570 } 571 else { 572 #ifdef DEBUG 573 int csr = *ncr_sc->sci_csr; 574 printf("DMA incomplete (%d/%d) status = %b\n", 575 ntrans, resid, csr, NCR5380_CSRBITS); 576 if(csr != lastCSR) { 577 int k = (csr & ~lastCSR) | (~csr & lastCSR); 578 debug(("Changed status bits: %b\n", 579 k, NCR5380_CSRBITS)); 580 lastCSR = csr & 0xFF; 581 } 582 #endif 583 printf("DMA incomplete: ntrans=%d/%d, lock=%x\n", 584 ntrans, dh->dh_xlen, sc->sc_dflags); 585 ncr_sc->sc_state |= NCR_ABORTING; 586 } 587 588 if ((sc->sc_dflags & VSDMA_BLOCKED) == 0) { 589 printf("not blocked during DMA.\n"); 590 } 591 sc->sc_dflags &= ~VSDMA_BLOCKED; 592 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 593 } 594 if ((sc->sc_dflags & VSDMA_BLOCKED) != 0) { 595 printf("blocked while not doing DMA.\n"); 596 sc->sc_dflags &= ~VSDMA_BLOCKED; 597 } 598 599 /* 600 * Now, whatever it was, let the ncr5380sbc routine handle it... 601 */ 602 claimed = ncr5380_intr(ncr_sc); 603 #ifdef DEBUG 604 if (!claimed) { 605 printf("si_intr: spurious from SBC\n"); 606 if (si_debug & 4) { 607 Debugger(); /* XXX */ 608 } 609 } 610 #endif 611 trace(("%s: si-intr(%d) done, claimed=%d\n", 612 ncr_sc->sc_dev.dv_xname, count, claimed)); 613 return (claimed); 614 } 615 616 617 integrate void 618 si_reset_adapter(struct ncr5380_softc *ncr_sc) 619 { 620 struct si_softc *sc = (struct si_softc *)ncr_sc; 621 volatile struct si_regs *si = sc->sc_regs; 622 623 #ifdef DEBUG 624 if (si_debug) { 625 printf("si_reset_adapter\n"); 626 } 627 #endif 628 SCI_CLR_INTR(ncr_sc); 629 } 630 631 632 /***************************************************************** 633 * Common functions for DMA 634 ****************************************************************/ 635 636 /* 637 * Allocate a DMA handle and put it in sc->sc_dma. Prepare 638 * for DMA transfer. On the Sun3, this means mapping the buffer 639 * into DVMA space. dvma_mapin() flushes the cache for us. 640 */ 641 void 642 si_dma_alloc(ncr_sc) 643 struct ncr5380_softc *ncr_sc; 644 { 645 struct si_softc *sc = (struct si_softc *)ncr_sc; 646 struct sci_req *sr = ncr_sc->sc_current; 647 struct scsipi_xfer *xs = sr->sr_xs; 648 struct buf *bp = sr->sr_xs->bp; 649 struct si_dma_handle *dh; 650 int i, xlen; 651 u_long addr; 652 653 trace (("si_dma_alloc()\n")); 654 655 #ifdef DIAGNOSTIC 656 if (sr->sr_dma_hand != NULL) 657 panic("si_dma_alloc: already have DMA handle"); 658 #endif 659 660 addr = (u_long) ncr_sc->sc_dataptr; 661 debug(("addr=%x, dataptr=%x\n", addr, ncr_sc->sc_dataptr)); 662 xlen = ncr_sc->sc_datalen; 663 664 /* Make sure our caller checked sc_min_dma_len. */ 665 if (xlen < MIN_DMA_LEN) 666 panic("si_dma_alloc: xlen=0x%x\n", xlen); 667 668 /* 669 * Never attempt single transfers of more than 63k, because 670 * our count register may be only 16 bits (an OBIO adapter). 671 * This should never happen since already bounded by minphys(). 672 * XXX - Should just segment these... 673 */ 674 if (xlen > MAX_DMA_LEN) { 675 #ifdef DEBUG 676 printf("si_dma_alloc: excessive xlen=0x%x\n", xlen); 677 Debugger(); 678 #endif 679 ncr_sc->sc_datalen = xlen = MAX_DMA_LEN; 680 } 681 682 /* Find free DMA handle. Guaranteed to find one since we have 683 as many DMA handles as the driver has processes. */ 684 for (i = 0; i < SCI_OPENINGS; i++) { 685 if ((sc->sc_dma[i].dh_flags & SIDH_BUSY) == 0) 686 goto found; 687 } 688 panic("si: no free DMA handles."); 689 found: 690 691 dh = &sc->sc_dma[i]; 692 dh->dh_flags = SIDH_BUSY; 693 dh->dh_addr = (u_char*) addr; 694 dh->dh_maplen = xlen; 695 dh->dh_xlen = xlen; 696 dh->dh_dvma = 0; 697 698 /* Copy the "write" flag for convenience. */ 699 if (xs->flags & SCSI_DATA_OUT) 700 dh->dh_flags |= SIDH_OUT; 701 702 #if 1 703 /* 704 * If the buffer has the flag B_PHYS, the the address specified 705 * in the buffer is a user-space address and we need to remap 706 * this address into kernel space so that using this buffer 707 * within the interrupt routine will work. 708 * If it's already a kernel space address, we need to make sure 709 * that all pages are in-core. the mapin() routine takes care 710 * of that. 711 */ 712 if (bp && (bp->b_flags & B_PHYS)) 713 dh->dh_flags |= SIDH_PHYS; 714 #endif 715 716 if (!bp) { 717 printf("ncr.c: struct buf *bp is null-pointer.\n"); 718 dh->dh_flags = 0; 719 return; 720 } 721 if (bp->b_bcount < 0 || bp->b_bcount > MAX_DMA_LEN) { 722 printf("ncr.c: invalid bcount %d (0x%x)\n", 723 bp->b_bcount, bp->b_bcount); 724 dh->dh_flags = 0; 725 return; 726 } 727 dh->dh_dvma = bp->b_data; 728 #if 0 729 /* 730 * mapping of user-space addresses is no longer neccessary, now 731 * that the vmapbuf/vunmapbuf routines exist. Now the higher-level 732 * driver already cares for the mapping! 733 */ 734 if (bp->b_flags & B_PHYS) { 735 xdebug(("not mapping in... %x/%x %x\n", bp->b_saveaddr, 736 bp->b_data, bp->b_bcount)); 737 #ifdef USE_VMAPBUF 738 dh->dh_addr = bp->b_data; 739 dh->dh_maplen = bp->b_bcount; 740 vmapbuf(bp, bp->b_bcount); 741 dh->dh_dvma = bp->b_data; 742 #else 743 dh->dh_dvma = (u_char*)vsdma_mapin(bp); 744 #endif 745 xdebug(("addr %x, maplen %d, dvma %x, bcount %d, dir %s\n", 746 dh->dh_addr, dh->dh_maplen, dh->dh_dvma, bp->b_bcount, 747 (dh->dh_flags & SIDH_OUT ? "OUT" : "IN"))); 748 } 749 #endif 750 /* success */ 751 sr->sr_dma_hand = dh; 752 753 return; 754 } 755 756 757 void 758 si_dma_free(ncr_sc) 759 struct ncr5380_softc *ncr_sc; 760 { 761 struct si_softc *sc = (struct si_softc *)ncr_sc; 762 struct sci_req *sr = ncr_sc->sc_current; 763 struct scsipi_xfer *xs = sr->sr_xs; 764 struct buf *bp = sr->sr_xs->bp; 765 struct si_dma_handle *dh = sr->sr_dma_hand; 766 767 trace (("si_dma_free()\n")); 768 769 #ifdef DIAGNOSTIC 770 if (dh == NULL) 771 panic("si_dma_free: no DMA handle"); 772 #endif 773 774 if (ncr_sc->sc_state & NCR_DOINGDMA) 775 panic("si_dma_free: free while in progress"); 776 777 if (dh->dh_flags & SIDH_BUSY) { 778 #if 0 779 debug(("bp->b_flags=0x%x\n", bp->b_flags)); 780 if (bp->b_flags & B_PHYS) { 781 #ifdef USE_VMAPBUF 782 printf("not unmapping(%x/%x %x/%x %d/%d)...\n", 783 dh->dh_addr, dh->dh_dvma, 784 bp->b_saveaddr, bp->b_data, 785 bp->b_bcount, dh->dh_maplen); 786 /* vunmapbuf(bp, dh->dh_maplen); */ 787 printf("done.\n"); 788 #endif 789 dh->dh_dvma = 0; 790 } 791 #endif 792 dh->dh_flags = 0; 793 } 794 sr->sr_dma_hand = NULL; 795 } 796 797 798 /* 799 * REGBUSY and DMABUSY won't collide since the higher-level driver 800 * issues intr_on/intr_off before/after doing DMA. The only problem 801 * is to handle RDBUF/WRBUF wrt REGBUSY/DMABUSY 802 * 803 * There might be race-conditions, but for now we don't care for them... 804 */ 805 int 806 si_dmaLockBus(ncr_sc, lt) 807 struct ncr5380_softc *ncr_sc; 808 int lt; /* Lock-Type */ 809 { 810 struct si_softc *sc = (void*)ncr_sc; 811 int timeout = 200; /* wait .2 seconds max. */ 812 813 trace(("si_dmaLockBus(%x), cold: %d, current: %x\n", 814 lt, cold, sc->sc_dflags)); 815 816 #ifdef POLL_MODE 817 if (cold) 818 return (0); 819 #endif 820 821 if ((ncr_sc->sc_current != NULL) && (lt == VSDMA_REGBUSY)) { 822 printf("trying to use regs while sc_current is set.\n"); 823 printf("lt=%x, fl=%x, cur=%x\n", 824 lt, sc->sc_dflags, ncr_sc->sc_current); 825 } 826 if ((ncr_sc->sc_current == NULL) && (lt != VSDMA_REGBUSY)) { 827 printf("trying to use/prepare DMA without current.\n"); 828 printf("lt=%x, fl=%x, cur=%x\n", 829 lt, sc->sc_dflags, ncr_sc->sc_current); 830 } 831 832 if ((sc->sc_dflags & VSDMA_LOCKED) == 0) { 833 struct si_softc *sc = (struct si_softc *)ncr_sc; 834 sc->sc_dflags |= VSDMA_WANTED; 835 vsbus_lockDMA(sc->sc_cfargs); 836 sc->sc_dflags = VSDMA_LOCKED | lt; 837 return (0); 838 } 839 840 #if 1 841 while ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 842 debug(("busy wait(1)...\n")); 843 if (--timeout == 0) { 844 printf("timeout in busy-wait(%x %x)\n", 845 lt, sc->sc_dflags); 846 sc->sc_dflags &= ~VSDMA_LCKTYPE; 847 break; 848 } 849 delay(1000); 850 } 851 debug(("busy wait(1) done.\n")); 852 sc->sc_dflags |= lt; 853 854 #else 855 if ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 856 switch (lt) { 857 858 case VSDMA_RDBUF: 859 /* sc->sc_dflags |= VSDMA_IWANTED; */ 860 debug(("busy wait(1)...\n")); 861 while (sc->sc_dflags & 862 (VSDMA_WRBUF | VSDMA_DMABUSY)) { 863 if (--timeout == 0) { 864 printf("timeout in busy-wait(1)\n"); 865 sc->sc_dflags &= ~VSDMA_WRBUF; 866 sc->sc_dflags &= ~VSDMA_DMABUSY; 867 } 868 delay(1000); 869 } 870 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 871 debug(("busy wait(1) done.\n")); 872 sc->sc_dflags |= lt; 873 break; 874 875 case VSDMA_WRBUF: 876 /* sc->sc_dflags |= VSDMA_IWANTED; */ 877 debug(("busy wait(2)...\n")); 878 while (sc->sc_dflags & 879 (VSDMA_RDBUF | VSDMA_DMABUSY)) { 880 if (--timeout == 0) { 881 printf("timeout in busy-wait(2)\n"); 882 sc->sc_dflags &= ~VSDMA_RDBUF; 883 sc->sc_dflags &= ~VSDMA_DMABUSY; 884 } 885 delay(1000); 886 } 887 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 888 debug(("busy wait(2) done.\n")); 889 sc->sc_dflags |= lt; 890 break; 891 892 case VSDMA_DMABUSY: 893 /* sc->sc_dflags |= VSDMA_IWANTED; */ 894 debug(("busy wait(3)...\n")); 895 while (sc->sc_dflags & 896 (VSDMA_RDBUF | VSDMA_WRBUF)) { 897 if (--timeout == 0) { 898 printf("timeout in busy-wait(3)\n"); 899 sc->sc_dflags &= ~VSDMA_RDBUF; 900 sc->sc_dflags &= ~VSDMA_WRBUF; 901 } 902 delay(1000); 903 } 904 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 905 debug(("busy wait(3) done.\n")); 906 sc->sc_dflags |= lt; 907 break; 908 909 case VSDMA_REGBUSY: 910 /* sc->sc_dflags |= VSDMA_IWANTED; */ 911 debug(("busy wait(4)...\n")); 912 while (sc->sc_dflags & 913 (VSDMA_RDBUF | VSDMA_WRBUF | VSDMA_DMABUSY)) { 914 if (--timeout == 0) { 915 printf("timeout in busy-wait(4)\n"); 916 sc->sc_dflags &= ~VSDMA_RDBUF; 917 sc->sc_dflags &= ~VSDMA_WRBUF; 918 sc->sc_dflags &= ~VSDMA_DMABUSY; 919 } 920 delay(1000); 921 } 922 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 923 debug(("busy wait(4) done.\n")); 924 sc->sc_dflags |= lt; 925 break; 926 927 default: 928 printf("illegal lockType %x in si_dmaLockBus()\n"); 929 } 930 } 931 else 932 printf("already locked. (%x/%x)\n", lt, sc->sc_dflags); 933 #endif 934 if (sc->sc_dflags & lt) /* successfully locked for this type */ 935 return (0); 936 937 printf("spurious %x in si_dmaLockBus(%x)\n", lt, sc->sc_dflags); 938 } 939 940 /* 941 * the lock of this type is no longer needed. If all (internal) locks are 942 * released, release the DMA bus. 943 */ 944 int 945 si_dmaReleaseBus(ncr_sc, lt) 946 struct ncr5380_softc *ncr_sc; 947 int lt; /* Lock-Type */ 948 { 949 struct si_softc *sc = (void*)ncr_sc; 950 951 trace(("si_dmaReleaseBus(%x), cold: %d, current: %x\n", 952 lt, cold, sc->sc_dflags)); 953 954 #ifdef POLL_MODE 955 if (cold) 956 return (0); 957 #endif 958 959 if ((sc->sc_dflags & VSDMA_LCKTYPE) == lt) { 960 sc->sc_dflags &= ~lt; 961 } 962 else 963 printf("trying to release %x while flags = %x\n", lt, 964 sc->sc_dflags); 965 966 if (sc->sc_dflags == VSDMA_LOCKED) { /* no longer needed */ 967 struct si_softc *sc = (struct si_softc *)ncr_sc; 968 vsbus_unlockDMA(sc->sc_cfargs); 969 sc->sc_dflags = 0; 970 return (0); 971 } 972 } 973 974 /* 975 * Just toggle the type of lock without releasing the lock... 976 * This is usually needed before/after bcopy() to/from DMA-buffer 977 */ 978 int 979 si_dmaToggleLock(ncr_sc, lt1, lt2) 980 struct ncr5380_softc *ncr_sc; 981 int lt1, lt2; /* Lock-Type */ 982 { 983 struct si_softc *sc = (void*)ncr_sc; 984 985 #ifdef POLL_MODE 986 if (cold) 987 return (0); 988 #endif 989 990 if (((sc->sc_dflags & lt1) != 0) && 991 ((sc->sc_dflags & lt2) == 0)) { 992 sc->sc_dflags |= lt2; 993 sc->sc_dflags &= ~lt1; 994 return (0); 995 } 996 printf("cannot toggle locking from %x to %x (current = %x)\n", 997 lt1, lt2, sc->sc_dflags); 998 } 999 1000 /* 1001 * This is called when the bus is going idle, 1002 * so we want to enable the SBC interrupts. 1003 * That is controlled by the DMA enable! 1004 * Who would have guessed! 1005 * What a NASTY trick! 1006 */ 1007 void 1008 si_intr_on(ncr_sc) 1009 struct ncr5380_softc *ncr_sc; 1010 { 1011 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 1012 } 1013 1014 /* 1015 * This is called when the bus is idle and we are 1016 * about to start playing with the SBC chip. 1017 * 1018 * VS2000 note: we have four kinds of access which are mutually exclusive: 1019 * - access to the NCR5380 registers 1020 * - access to the HDC9224 registers 1021 * - access to the DMA area 1022 * - doing DMA 1023 */ 1024 void 1025 si_intr_off(ncr_sc) 1026 struct ncr5380_softc *ncr_sc; 1027 { 1028 si_dmaLockBus(ncr_sc, VSDMA_REGBUSY); 1029 } 1030 1031 /***************************************************************** 1032 * VME functions for DMA 1033 ****************************************************************/ 1034 1035 1036 /* 1037 * This function is called during the COMMAND or MSG_IN phase 1038 * that preceeds a DATA_IN or DATA_OUT phase, in case we need 1039 * to setup the DMA engine before the bus enters a DATA phase. 1040 * 1041 * XXX: The VME adapter appears to suppress SBC interrupts 1042 * when the FIFO is not empty or the FIFO count is non-zero! 1043 * 1044 * On the VME version we just clear the DMA count and address 1045 * here (to make sure it stays idle) and do the real setup 1046 * later, in dma_start. 1047 */ 1048 void 1049 si_dma_setup(ncr_sc) 1050 struct ncr5380_softc *ncr_sc; 1051 { 1052 trace (("si_dma_setup(ncr_sc) !!!\n")); 1053 1054 /* 1055 * VS2000: nothing to do ... 1056 */ 1057 } 1058 1059 1060 void 1061 si_dma_start(ncr_sc) 1062 struct ncr5380_softc *ncr_sc; 1063 { 1064 struct si_softc *sc = (struct si_softc *)ncr_sc; 1065 struct sci_req *sr = ncr_sc->sc_current; 1066 struct si_dma_handle *dh = sr->sr_dma_hand; 1067 volatile struct si_regs *si = sc->sc_regs; 1068 long data_pa; 1069 int xlen; 1070 1071 trace(("si_dma_start(%x)\n", sr->sr_dma_hand)); 1072 1073 /* 1074 * we always transfer from/to base of DMA-area, 1075 * thus the DMA-address is always the same, only size 1076 * and direction matter/differ on VS2000 1077 */ 1078 1079 debug(("ncr_sc->sc_datalen = %d\n", ncr_sc->sc_datalen)); 1080 xlen = ncr_sc->sc_datalen; 1081 dh->dh_xlen = xlen; 1082 1083 /* 1084 * VS2000 has a fixed 16KB-area where DMA is restricted to. 1085 * All DMA-addresses are relative to this base: KA410_DMA_BASE 1086 * Thus we need to copy the data into this area when writing, 1087 * or copy from this area when reading. (kind of bounce-buffer) 1088 */ 1089 1090 /* Set direction (send/recv) */ 1091 if (dh->dh_flags & SIDH_OUT) { 1092 /* 1093 * We know that we are called while intr_off (regs locked) 1094 * thus we toggle the lock from REGBUSY to WRBUF 1095 * also we set the BLOCKIT flag, so that the locking of 1096 * the DMA bus won't be released to the HDC9224... 1097 */ 1098 debug(("preparing msg-out (bcopy)\n")); 1099 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_WRBUF); 1100 bcopy(dh->dh_dvma, sc->sc_dbase, xlen); 1101 si_dmaToggleLock(ncr_sc, VSDMA_WRBUF, VSDMA_REGBUSY); 1102 *sc->sc_ddreg = DMA_DIR_OUT; 1103 } 1104 else { 1105 debug(("preparing data-in (bzero)\n")); 1106 /* bzero(sc->sc_dbase, xlen); */ 1107 *sc->sc_ddreg = DMA_DIR_IN; 1108 } 1109 sc->sc_dflags |= VSDMA_BLOCKED; 1110 1111 *sc->sc_dareg = DMA_ADDR_HBYTE; /* high byte (6 bits) */ 1112 *sc->sc_dareg = DMA_ADDR_LBYTE; /* low byte */ 1113 *sc->sc_dcreg = 0 - xlen; /* bertram XXX */ 1114 1115 #ifdef DEBUG 1116 if (si_debug & 2) { 1117 printf("si_dma_start: dh=0x%x, pa=0x%x, xlen=%d, creg=0x%x\n", 1118 dh, data_pa, xlen, *sc->sc_dcreg); 1119 } 1120 #endif 1121 1122 #ifdef POLL_MODE 1123 debug(("dma_start: cold=%d\n", cold)); 1124 if (cold) { 1125 *sc->intmsk &= ~sc->intbit; 1126 *sc->intclr = sc->intbit; 1127 } 1128 else 1129 *sc->intmsk |= sc->intbit; 1130 #endif 1131 /* 1132 * Acknowledge the phase change. (After DMA setup!) 1133 * Put the SBIC into DMA mode, and start the transfer. 1134 */ 1135 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_DMABUSY); 1136 if (dh->dh_flags & SIDH_OUT) { 1137 *ncr_sc->sci_tcmd = PHASE_DATA_OUT; 1138 SCI_CLR_INTR(ncr_sc); 1139 *ncr_sc->sci_icmd = SCI_ICMD_DATA; 1140 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1141 *ncr_sc->sci_dma_send = 0; /* start it */ 1142 } else { 1143 *ncr_sc->sci_tcmd = PHASE_DATA_IN; 1144 SCI_CLR_INTR(ncr_sc); 1145 *ncr_sc->sci_icmd = 0; 1146 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1147 *ncr_sc->sci_irecv = 0; /* start it */ 1148 } 1149 ncr_sc->sc_state |= NCR_DOINGDMA; 1150 /* 1151 * having a delay (eg. printf) here, seems to solve the problem. 1152 * Isn't that strange ???? 1153 * Maybe the higher-level driver accesses one of the registers of 1154 * the controller while DMA is in progress. Having a long enough 1155 * delay here might prevent/delay this access until DMA bus is 1156 * free again... 1157 * 1158 * The instruction ++++ printf("DMA started.\n"); ++++ 1159 * is long/slow enough, to make the SSCI driver work. Thus we 1160 * try to find a delay() long/slow enough to do the same. The 1161 * argument to this delay is relative to the transfer-count. 1162 */ 1163 delay(3*xlen/4); /* XXX solve this problem!!! XXX */ 1164 1165 #ifdef DEBUG 1166 if (si_debug & 2) { 1167 printf("si_dma_start: started, flags=0x%x\n", 1168 ncr_sc->sc_state); 1169 } 1170 #endif 1171 } 1172 1173 1174 void 1175 si_vme_dma_eop(ncr_sc) 1176 struct ncr5380_softc *ncr_sc; 1177 { 1178 trace (("si_vme_dma_eop() !!!\n")); 1179 /* Not needed - DMA was stopped prior to examining sci_csr */ 1180 } 1181 1182 /* 1183 * si_dma_stop() has now become almost a nop-routine, since DMA-buffer 1184 * has already been read within si_intr(), so there's nothing left to do. 1185 */ 1186 void 1187 si_dma_stop(ncr_sc) 1188 struct ncr5380_softc *ncr_sc; 1189 { 1190 struct si_softc *sc = (struct si_softc *)ncr_sc; 1191 struct sci_req *sr = ncr_sc->sc_current; 1192 struct si_dma_handle *dh = sr->sr_dma_hand; 1193 volatile struct si_regs *si = sc->sc_regs; 1194 int resid, ntrans; 1195 1196 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 1197 #ifdef DEBUG 1198 printf("si_dma_stop: dma not running\n"); 1199 #endif 1200 return; 1201 } 1202 ncr_sc->sc_state &= ~NCR_DOINGDMA; 1203 1204 /* Note that timeout may have set the error flag. */ 1205 if (ncr_sc->sc_state & NCR_ABORTING) { 1206 printf("si_dma_stop: timeout?\n"); 1207 goto out; 1208 } 1209 1210 /* 1211 * Now try to figure out how much actually transferred 1212 */ 1213 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1214 si_dmaToggleLock(ncr_sc, VSDMA_DMABUSY, VSDMA_REGBUSY); 1215 resid = *sc->sc_dcreg; 1216 /* 1217 * XXX: don't correct at two places !!! 1218 */ 1219 if (resid == 1 && sc->sc_xflags) { 1220 resid = 0; 1221 } 1222 ntrans = dh->dh_xlen + resid; 1223 if (resid != 0) 1224 printf("resid=%d, xlen=%d, ntrans=%d\n", 1225 resid, dh->dh_xlen, ntrans); 1226 1227 #ifdef DEBUG 1228 if (si_debug & 2) { 1229 printf("si_dma_stop: resid=0x%x ntrans=0x%x\n", 1230 resid, ntrans); 1231 } 1232 #endif 1233 1234 if (ntrans < MIN_DMA_LEN) { 1235 printf("si: fifo count: 0x%x\n", resid); 1236 ncr_sc->sc_state |= NCR_ABORTING; 1237 goto out; 1238 } 1239 if (ntrans > ncr_sc->sc_datalen) 1240 panic("si_dma_stop: excess transfer"); 1241 1242 /* 1243 * On VS2000 in case of a READ-operation, we must now copy 1244 * the buffer-contents to the destination-address! 1245 */ 1246 if ((dh->dh_flags & SIDH_OUT) == 0 && 1247 (dh->dh_flags & SIDH_DONE) == 0) { 1248 printf("DMA buffer not yet copied.\n"); 1249 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_RDBUF); 1250 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 1251 si_dmaToggleLock(ncr_sc, VSDMA_RDBUF, VSDMA_REGBUSY); 1252 } 1253 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 1254 1255 /* Adjust data pointer */ 1256 ncr_sc->sc_dataptr += ntrans; 1257 ncr_sc->sc_datalen -= ntrans; 1258 1259 out: 1260 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1261 1262 /* Put SBIC back in PIO mode. */ 1263 *ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE); 1264 *ncr_sc->sci_icmd = 0; 1265 1266 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 1267 } 1268 1269 /* 1270 * Poll (spin-wait) for DMA completion. 1271 * Called right after xx_dma_start(), and 1272 * xx_dma_stop() will be called next. 1273 */ 1274 void 1275 si_dma_poll(ncr_sc) 1276 struct ncr5380_softc *ncr_sc; 1277 { 1278 struct si_softc *sc = (struct si_softc *)ncr_sc; 1279 struct sci_req *sr = ncr_sc->sc_current; 1280 struct si_dma_handle *dh = sr->sr_dma_hand; 1281 int i, timeout; 1282 1283 if (! cold) 1284 printf("spurious call of DMA-poll ???"); 1285 1286 #ifdef POLL_MODE 1287 1288 delay(10000); 1289 trace(("si_dma_poll(%x)\n", *sc->sc_dcreg)); 1290 1291 /* 1292 * interrupt-request has been cleared by dma_start, thus 1293 * we do nothing else but wait for the intreq to reappear... 1294 */ 1295 1296 timeout = 5000; 1297 for (i=0; i<timeout; i++) { 1298 if (*sc->intreq & sc->intbit) 1299 break; 1300 delay(100); 1301 } 1302 if ((*sc->intreq & sc->intbit) == 0) { 1303 printf("si: DMA timeout (while polling)\n"); 1304 /* Indicate timeout as MI code would. */ 1305 sr->sr_flags |= SR_OVERDUE; 1306 } 1307 #endif 1308 return; 1309 } 1310
Indexes created Tue Sep 30 20:09:53 GMT 2025