ncr.c revision 1.12
1 /* $NetBSD: ncr.c,v 1.12 1998/04/13 12:17:31 ragge Exp $ */ 2 3 #define USE_VMAPBUF 4 5 /* 6 * Copyright (c) 1995 David Jones, Gordon W. Ross 7 * Copyright (c) 1994 Adam Glass 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the authors may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 4. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by 23 * Adam Glass, David Jones, and Gordon Ross 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 /* 38 * This file contains only the machine-dependent parts of the 39 * Sun3 SCSI driver. (Autoconfig stuff and DMA functions.) 40 * The machine-independent parts are in ncr5380sbc.c 41 * 42 * Supported hardware includes: 43 * Sun SCSI-3 on OBIO (Sun3/50,Sun3/60) 44 * Sun SCSI-3 on VME (Sun3/160,Sun3/260) 45 * 46 * Could be made to support the Sun3/E if someone wanted to. 47 * 48 * Note: Both supported variants of the Sun SCSI-3 adapter have 49 * some really unusual "features" for this driver to deal with, 50 * generally related to the DMA engine. The OBIO variant will 51 * ignore any attempt to write the FIFO count register while the 52 * SCSI bus is in DATA_IN or DATA_OUT phase. This is dealt with 53 * by setting the FIFO count early in COMMAND or MSG_IN phase. 54 * 55 * The VME variant has a bit to enable or disable the DMA engine, 56 * but that bit also gates the interrupt line from the NCR5380! 57 * Therefore, in order to get any interrupt from the 5380, (i.e. 58 * for reselect) one must clear the DMA engine transfer count and 59 * then enable DMA. This has the further complication that you 60 * CAN NOT touch the NCR5380 while the DMA enable bit is set, so 61 * we have to turn DMA back off before we even look at the 5380. 62 * 63 * What wonderfully whacky hardware this is! 64 * 65 * Credits, history: 66 * 67 * David Jones wrote the initial version of this module, which 68 * included support for the VME adapter only. (no reselection). 69 * 70 * Gordon Ross added support for the OBIO adapter, and re-worked 71 * both the VME and OBIO code to support disconnect/reselect. 72 * (Required figuring out the hardware "features" noted above.) 73 * 74 * The autoconfiguration boilerplate came from Adam Glass. 75 * 76 * VS2000: 77 */ 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/kernel.h> 82 #include <sys/conf.h> 83 #include <sys/file.h> 84 #include <sys/stat.h> 85 #include <sys/ioctl.h> 86 #include <sys/buf.h> 87 #include <sys/proc.h> 88 #include <sys/user.h> 89 #include <sys/map.h> 90 #include <sys/device.h> 91 #include <sys/dkstat.h> 92 #include <sys/disklabel.h> 93 #include <sys/disk.h> 94 #include <sys/syslog.h> 95 #include <sys/malloc.h> 96 97 /* #include <sys/errno.h> */ 98 99 #include <dev/scsipi/scsi_all.h> 100 #include <dev/scsipi/scsipi_all.h> 101 #include <dev/scsipi/scsipi_debug.h> 102 #include <dev/scsipi/scsiconf.h> 103 104 #include <machine/uvax.h> 105 #include <machine/ka410.h> 106 #include <machine/ka43.h> 107 #include <machine/vsbus.h> /* struct confargs */ 108 109 #include <dev/ic/ncr5380reg.h> 110 #include <dev/ic/ncr5380var.h> 111 112 #define trace(x) 113 #define debug(x) 114 115 #ifndef NCR5380_CSRBITS 116 #define NCR5380_CSRBITS \ 117 "\020\010DEND\007DREQ\006PERR\005IREQ\004MTCH\003DCON\002ATN\001ACK" 118 #endif 119 120 #ifndef NCR5380_BUSCSRBITS 121 #define NCR5380_BUSCSRBITS \ 122 "\020\010RST\007BSY\006REQ\005MSG\004C/D\003I/O\002SEL\001DBP" 123 #endif 124 125 #include "ncr.h" 126 127 #ifdef DDB 128 #define integrate 129 #else 130 #define integrate static 131 #endif 132 133 /* 134 * Transfers smaller than this are done using PIO 135 * (on assumption they're not worth DMA overhead) 136 */ 137 #define MIN_DMA_LEN 128 138 139 /* 140 * Transfers lager than 65535 bytes need to be split-up. 141 * (Some of the FIFO logic has only 16 bits counters.) 142 * Make the size an integer multiple of the page size 143 * to avoid buf/cluster remap problems. (paranoid?) 144 * 145 * bertram: VS2000 has an DMA-area which is 16KB, thus 146 * have a maximum DMA-size of 16KB... 147 */ 148 #ifdef DMA_SHARED 149 #define MAX_DMA_LEN 0x2000 /* (8 * 1024) */ 150 #define DMA_ADDR_HBYTE 0x20 151 #define DMA_ADDR_LBYTE 0x00 152 #else 153 #define MAX_DMA_LEN 0x4000 /* (16 * 1024) */ 154 #define DMA_ADDR_HBYTE 0x00 155 #define DMA_ADDR_LBYTE 0x00 156 #endif 157 158 #ifdef DEBUG 159 int si_debug = 3; 160 static int si_link_flags = 0 /* | SDEV_DB2 */ ; 161 #endif 162 163 /* 164 * This structure is used to keep track of mappedpwd DMA requests. 165 * Note: combined the UDC command block with this structure, so 166 * the array of these has to be in DVMA space. 167 */ 168 struct si_dma_handle { 169 int dh_flags; 170 #define SIDH_BUSY 1 /* This DH is in use */ 171 #define SIDH_OUT 2 /* DMA does data out (write) */ 172 #define SIDH_PHYS 4 173 #define SIDH_DONE 8 174 u_char * dh_addr; /* KVA of start of buffer */ 175 int dh_maplen; /* Length of KVA mapping. */ 176 u_char * dh_dvma; /* VA of buffer in DVMA space */ 177 int dh_xlen; 178 }; 179 180 /* 181 * The first structure member has to be the ncr5380_softc 182 * so we can just cast to go back and fourth between them. 183 */ 184 struct si_softc { 185 struct ncr5380_softc ncr_sc; 186 volatile struct si_regs *sc_regs; /* do we really need this? */ 187 188 struct si_dma_handle *sc_dma; 189 struct confargs *sc_cfargs; 190 191 int sc_xflags; /* ka410/ka43: resid, sizeof(areg) */ 192 193 char *sc_dbase; 194 int sc_dsize; 195 196 volatile char *sc_dareg; 197 volatile short *sc_dcreg; 198 volatile char *sc_ddreg; 199 volatile int sc_dflags; 200 201 #define VSDMA_LOCKED 0x80 /* */ 202 #define VSDMA_WANTED 0x40 /* */ 203 #define VSDMA_IWANTED 0x20 204 #define VSDMA_BLOCKED 0x10 205 #define VSDMA_DMABUSY 0x08 /* DMA in progress */ 206 #define VSDMA_REGBUSY 0x04 /* accessing registers */ 207 #define VSDMA_WRBUF 0x02 /* writing to bounce-buffer */ 208 #define VSDMA_RDBUF 0x01 /* reading from bounce-buffer */ 209 210 #define VSDMA_STATUS 0xF0 211 #define VSDMA_LCKTYPE 0x0F 212 213 #ifdef POLL_MODE 214 volatile u_char *intreq; 215 volatile u_char *intclr; 216 volatile u_char *intmsk; 217 volatile int intbit; 218 #endif 219 }; 220 221 extern int cold; /* enable polling while cold-flag set */ 222 223 /* Options. Interesting values are: 1,3,7 */ 224 int si_options = 3; /* bertram: 3 or 7 ??? */ 225 #define SI_ENABLE_DMA 1 /* Use DMA (maybe polled) */ 226 #define SI_DMA_INTR 2 /* DMA completion interrupts */ 227 #define SI_DO_RESELECT 4 /* Allow disconnect/reselect */ 228 229 #define DMA_DIR_IN 1 230 #define DMA_DIR_OUT 0 231 232 /* How long to wait for DMA before declaring an error. */ 233 int si_dma_intr_timo = 500; /* ticks (sec. X 100) */ 234 235 integrate char si_name[] = "ncr"; 236 integrate int si_intr __P((void *)); 237 238 integrate void si_minphys __P((struct buf *bp)); 239 integrate void si_reset_adapter __P((struct ncr5380_softc *sc)); 240 241 void si_dma_alloc __P((struct ncr5380_softc *)); 242 void si_dma_free __P((struct ncr5380_softc *)); 243 void si_dma_poll __P((struct ncr5380_softc *)); 244 245 void si_intr_on __P((struct ncr5380_softc *)); 246 void si_intr_off __P((struct ncr5380_softc *)); 247 248 int si_dmaLockBus __P((struct ncr5380_softc *, int)); 249 int si_dmaToggleLock __P((struct ncr5380_softc *, int, int)); 250 int si_dmaReleaseBus __P((struct ncr5380_softc *, int)); 251 252 void si_dma_setup __P((struct ncr5380_softc *)); 253 void si_dma_start __P((struct ncr5380_softc *)); 254 void si_dma_eop __P((struct ncr5380_softc *)); 255 void si_dma_stop __P((struct ncr5380_softc *)); 256 257 static struct scsipi_adapter si_ops = { 258 ncr5380_scsi_cmd, /* scsi_cmd() */ 259 si_minphys, /* scsi_minphys() */ 260 NULL, /* open_target_lu() */ 261 NULL, /* close_target_lu() */ 262 }; 263 264 /* This is copied from julian's bt driver */ 265 /* "so we have a default dev struct for our link struct." */ 266 static struct scsipi_device si_dev = { 267 NULL, /* Use default error handler. */ 268 NULL, /* Use default start handler. */ 269 NULL, /* Use default async handler. */ 270 NULL, /* Use default "done" routine. */ 271 }; 272 273 integrate int si_match(struct device *, struct cfdata *, void *); 274 integrate void si_attach(struct device *, struct device *, void *); 275 276 struct cfattach ncr_ca = { 277 sizeof(struct si_softc), si_match, si_attach, 278 }; 279 280 void 281 dk_establish(p,q) 282 struct disk *p; 283 struct device *q; 284 { 285 #if 0 286 printf ("faking dk_establish()...\n"); 287 #endif 288 } 289 290 291 integrate int 292 si_match(parent, match, aux) 293 struct device *parent; 294 struct cfdata *match; 295 void *aux; 296 { 297 struct confargs *ca = aux; 298 volatile int *base; 299 int res; 300 301 trace(("ncr_match(0x%x, %d, %s)\n", parent, cf->cf_unit, ca->ca_name)); 302 303 return 0; 304 if (strcmp(ca->ca_name, "ncr") && 305 strcmp(ca->ca_name, "ncr5380") && 306 strcmp(ca->ca_name, "NCR5380")) 307 return (0); 308 309 base = (void*)uvax_phys2virt(ca->ca_ioaddr); 310 printf("probing for SCSI controller at 0x%x...\n", ca->ca_ioaddr); 311 /* 312 * this is rather brute force attempt: 313 * it seems that writing -1 to the location of the ncr's registers 314 * results in 0x000000?? (8-bit registers) if ncr5380 exists and 315 * in 0xffffffff if there's no ncr5380 at this address. 316 */ 317 *base = -1; /* might be sufficient to check first reg. only */ 318 res = *base; 319 printf("result: 0x%x (%d)\n", res, res); 320 res >>= 16; 321 if (res == 0xffff) { 322 printf("no NCR5380 at 0x%x.\n", ca->ca_ioaddr); 323 return (0); 324 } 325 else if (res == 0) { 326 printf("SCSI controller found.\n"); 327 return (1); 328 } 329 printf("unexpected/strange result 0x%x during probe.\n", res); 330 return (0); 331 } 332 333 integrate void si_set_portid(int, int); 334 335 integrate void 336 si_set_portid(pid,port) 337 int pid; 338 int port; 339 { 340 struct { 341 u_long :2; 342 u_long id0:3; 343 u_long id1:3; 344 u_long :26; 345 } *p; 346 347 #ifdef DEBUG 348 int *ip; 349 ip = (void*)uvax_phys2virt(KA410_SCSIPORT); 350 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 351 printf("scsi-id: (%x/%d) %d / %d\n", *ip, *ip, p->id0, p->id1); 352 #endif 353 354 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 355 switch (port) { 356 case 0: 357 p->id0 = pid; 358 printf(": scsi-id %d\n", p->id0); 359 break; 360 case 1: 361 p->id1 = pid; 362 printf(": scsi-id %d\n", p->id1); 363 break; 364 default: 365 printf("invalid port-number %d\n", port); 366 } 367 } 368 369 integrate void 370 si_attach(parent, self, aux) 371 struct device *parent, *self; 372 void *aux; 373 { 374 struct si_softc *sc = (struct si_softc *) self; 375 struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc; 376 volatile struct si_regs *regs; 377 struct confargs *ca = aux; 378 int i; 379 380 trace (("ncr_attach(0x%x, 0x%x, %s)\n", parent, self, ca->ca_name)); 381 382 /* 383 * 384 */ 385 #ifdef POLL_MODE 386 sc->intreq = (void*)uvax_phys2virt(KA410_INTREQ); 387 sc->intmsk = (void*)uvax_phys2virt(KA410_INTMSK); 388 sc->intclr = (void*)uvax_phys2virt(KA410_INTCLR); 389 sc->intbit = ca->ca_intbit; 390 #endif 391 392 sc->sc_cfargs = ca; /* needed for interrupt-setup */ 393 394 regs = (void*)uvax_phys2virt(ca->ca_ioaddr); 395 396 sc->sc_dareg = (void*)uvax_phys2virt(ca->ca_dareg); 397 sc->sc_dcreg = (void*)uvax_phys2virt(ca->ca_dcreg); 398 sc->sc_ddreg = (void*)uvax_phys2virt(ca->ca_ddreg); 399 sc->sc_dbase = (void*)uvax_phys2virt(ca->ca_dbase); 400 sc->sc_dsize = ca->ca_dsize; 401 sc->sc_dflags = 4; /* XXX */ 402 sc->sc_xflags = ca->ca_dflag; /* should/will be renamed */ 403 /* 404 * Fill in the prototype scsi_link. 405 */ 406 ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 407 ncr_sc->sc_link.adapter_softc = sc; 408 ncr_sc->sc_link.scsipi_scsi.adapter_target = ca->ca_idval; 409 ncr_sc->sc_link.adapter = &si_ops; 410 ncr_sc->sc_link.device = &si_dev; 411 ncr_sc->sc_link.type = BUS_SCSI; 412 413 si_set_portid(ca->ca_idval, ncr_sc->sc_dev.dv_unit); 414 415 /* 416 * Initialize fields used by the MI code 417 */ 418 ncr_sc->sci_r0 = (void*)®s->sci.sci_r0; 419 ncr_sc->sci_r1 = (void*)®s->sci.sci_r1; 420 ncr_sc->sci_r2 = (void*)®s->sci.sci_r2; 421 ncr_sc->sci_r3 = (void*)®s->sci.sci_r3; 422 ncr_sc->sci_r4 = (void*)®s->sci.sci_r4; 423 ncr_sc->sci_r5 = (void*)®s->sci.sci_r5; 424 ncr_sc->sci_r6 = (void*)®s->sci.sci_r6; 425 ncr_sc->sci_r7 = (void*)®s->sci.sci_r7; 426 427 /* 428 * MD function pointers used by the MI code. 429 */ 430 ncr_sc->sc_pio_out = ncr5380_pio_out; 431 ncr_sc->sc_pio_in = ncr5380_pio_in; 432 ncr_sc->sc_dma_alloc = si_dma_alloc; 433 ncr_sc->sc_dma_free = si_dma_free; 434 ncr_sc->sc_dma_poll = si_dma_poll; /* si_dma_poll not used! */ 435 ncr_sc->sc_intr_on = si_intr_on; /* vsbus_unlockDMA; */ 436 ncr_sc->sc_intr_off = si_intr_off; /* vsbus_lockDMA; */ 437 438 ncr_sc->sc_dma_setup = NULL; /* si_dma_setup not used! */ 439 ncr_sc->sc_dma_start = si_dma_start; 440 ncr_sc->sc_dma_eop = NULL; 441 ncr_sc->sc_dma_stop = si_dma_stop; 442 443 ncr_sc->sc_flags = 0; 444 if ((si_options & SI_DO_RESELECT) == 0) 445 ncr_sc->sc_no_disconnect = 0xff; 446 if ((si_options & SI_DMA_INTR) == 0) 447 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 448 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 449 450 /* 451 * Initialize fields used only here in the MD code. 452 */ 453 i = SCI_OPENINGS * sizeof(struct si_dma_handle); 454 sc->sc_dma = (struct si_dma_handle *) malloc(i, M_DEVBUF, M_NOWAIT); 455 if (sc->sc_dma == NULL) 456 panic("si: dvma_malloc failed\n"); 457 for (i = 0; i < SCI_OPENINGS; i++) 458 sc->sc_dma[i].dh_flags = 0; 459 460 sc->sc_regs = regs; 461 462 #ifdef DEBUG 463 if (si_debug) 464 printf("si: Set TheSoftC=%p TheRegs=%p\n", sc, regs); 465 ncr_sc->sc_link.flags |= si_link_flags; 466 #endif 467 468 /* 469 * Initialize si board itself. 470 */ 471 si_reset_adapter(ncr_sc); 472 ncr5380_init(ncr_sc); 473 ncr5380_reset_scsibus(ncr_sc); 474 config_found(self, &(ncr_sc->sc_link), scsiprint); 475 476 /* 477 * Now ready for interrupts. 478 */ 479 #if 0 480 vsbus_intr_register(sc->sc_cfargs, si_intr, (void *)sc); 481 vsbus_intr_enable(sc->sc_cfargs); 482 #endif 483 } 484 485 integrate void 486 si_minphys(struct buf *bp) 487 { 488 debug(("minphys: blkno=%d, bcount=%d, data=0x%x, flags=%x\n", 489 bp->b_blkno, bp->b_bcount, bp->b_data, bp->b_flags)); 490 491 if (bp->b_bcount > MAX_DMA_LEN) { 492 #ifdef DEBUG 493 if (si_debug) { 494 printf("si_minphys len = 0x%lx.\n", bp->b_bcount); 495 #ifdef DDB 496 Debugger(); 497 #endif 498 } 499 #endif 500 bp->b_bcount = MAX_DMA_LEN; 501 } 502 return (minphys(bp)); 503 } 504 505 506 #define CSR_WANT (SI_CSR_SBC_IP | SI_CSR_DMA_IP | \ 507 SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR ) 508 509 static int si_intrCount = 0; 510 static int lastCSR = 0; 511 512 integrate int 513 si_intr(arg) 514 void *arg; 515 { 516 struct ncr5380_softc *ncr_sc = arg; 517 struct si_softc *sc = arg; 518 int count, claimed; 519 520 count = ++si_intrCount; 521 trace(("%s: si-intr(%d).....\n", ncr_sc->sc_dev.dv_xname, count)); 522 523 #ifdef DEBUG 524 /* 525 * Each DMA interrupt is followed by one spurious(?) interrupt. 526 * if (ncr_sc->sc_state & NCR_WORKING == 0) we know, that the 527 * interrupt was not claimed by the higher-level routine, so that 528 * it might be save to ignore these... 529 */ 530 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 531 printf("spurious(%d): %x, %d, status=%b\n", count, 532 sc->sc_dflags, ncr_sc->sc_ncmds, 533 *ncr_sc->sci_csr, NCR5380_CSRBITS); 534 } 535 #endif 536 /* 537 * If there was a DMA operation in progress, now it's no longer 538 * active, since whatever caused the interrupt also interrupted 539 * the DMA operation. Thus accessing the registers now doesn't 540 * harm anything which is not yet broken... 541 */ 542 debug(("si_intr(status: %x, dma-count: %d)\n", 543 *ncr_sc->sci_csr, *sc->sc_dcreg)); 544 545 /* 546 * First check for DMA errors / incomplete transfers 547 * If operation was read/data-in, the copy data from buffer 548 */ 549 if (ncr_sc->sc_state & NCR_DOINGDMA) { 550 struct sci_req *sr = ncr_sc->sc_current; 551 struct si_dma_handle *dh = sr->sr_dma_hand; 552 int resid, ntrans; 553 554 resid = *sc->sc_dcreg; 555 if (resid == 1 && sc->sc_xflags) { 556 debug(("correcting resid...\n")); 557 resid = 0; 558 } 559 ntrans = dh->dh_xlen + resid; 560 if (resid == 0) { 561 if ((dh->dh_flags & SIDH_OUT) == 0) { 562 si_dmaToggleLock(ncr_sc, 563 VSDMA_DMABUSY, VSDMA_RDBUF); 564 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 565 si_dmaToggleLock(ncr_sc, 566 VSDMA_RDBUF, VSDMA_DMABUSY); 567 dh->dh_flags |= SIDH_DONE; 568 } 569 } 570 else { 571 #ifdef DEBUG 572 int csr = *ncr_sc->sci_csr; 573 printf("DMA incomplete (%d/%d) status = %b\n", 574 ntrans, resid, csr, NCR5380_CSRBITS); 575 if(csr != lastCSR) { 576 debug(("Changed status bits: %b\n", 577 k, NCR5380_CSRBITS)); 578 lastCSR = csr & 0xFF; 579 } 580 #endif 581 printf("DMA incomplete: ntrans=%d/%d, lock=%x\n", 582 ntrans, dh->dh_xlen, sc->sc_dflags); 583 ncr_sc->sc_state |= NCR_ABORTING; 584 } 585 586 if ((sc->sc_dflags & VSDMA_BLOCKED) == 0) { 587 printf("not blocked during DMA.\n"); 588 } 589 sc->sc_dflags &= ~VSDMA_BLOCKED; 590 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 591 } 592 if ((sc->sc_dflags & VSDMA_BLOCKED) != 0) { 593 printf("blocked while not doing DMA.\n"); 594 sc->sc_dflags &= ~VSDMA_BLOCKED; 595 } 596 597 /* 598 * Now, whatever it was, let the ncr5380sbc routine handle it... 599 */ 600 claimed = ncr5380_intr(ncr_sc); 601 #ifdef DEBUG 602 if (!claimed) { 603 printf("si_intr: spurious from SBC\n"); 604 if (si_debug & 4) { 605 Debugger(); /* XXX */ 606 } 607 } 608 #endif 609 trace(("%s: si-intr(%d) done, claimed=%d\n", 610 ncr_sc->sc_dev.dv_xname, count, claimed)); 611 return (claimed); 612 } 613 614 615 integrate void 616 si_reset_adapter(struct ncr5380_softc *ncr_sc) 617 { 618 619 #ifdef DEBUG 620 if (si_debug) { 621 printf("si_reset_adapter\n"); 622 } 623 #endif 624 SCI_CLR_INTR(ncr_sc); 625 } 626 627 628 /***************************************************************** 629 * Common functions for DMA 630 ****************************************************************/ 631 632 /* 633 * Allocate a DMA handle and put it in sc->sc_dma. Prepare 634 * for DMA transfer. On the Sun3, this means mapping the buffer 635 * into DVMA space. dvma_mapin() flushes the cache for us. 636 */ 637 void 638 si_dma_alloc(ncr_sc) 639 struct ncr5380_softc *ncr_sc; 640 { 641 struct si_softc *sc = (struct si_softc *)ncr_sc; 642 struct sci_req *sr = ncr_sc->sc_current; 643 struct scsipi_xfer *xs = sr->sr_xs; 644 struct buf *bp = sr->sr_xs->bp; 645 struct si_dma_handle *dh; 646 int i, xlen; 647 u_long addr; 648 649 trace (("si_dma_alloc()\n")); 650 651 #ifdef DIAGNOSTIC 652 if (sr->sr_dma_hand != NULL) 653 panic("si_dma_alloc: already have DMA handle"); 654 #endif 655 656 addr = (u_long) ncr_sc->sc_dataptr; 657 debug(("addr=%x, dataptr=%x\n", addr, ncr_sc->sc_dataptr)); 658 xlen = ncr_sc->sc_datalen; 659 660 /* Make sure our caller checked sc_min_dma_len. */ 661 if (xlen < MIN_DMA_LEN) 662 panic("si_dma_alloc: xlen=0x%x\n", xlen); 663 664 /* 665 * Never attempt single transfers of more than 63k, because 666 * our count register may be only 16 bits (an OBIO adapter). 667 * This should never happen since already bounded by minphys(). 668 * XXX - Should just segment these... 669 */ 670 if (xlen > MAX_DMA_LEN) { 671 #ifdef DEBUG 672 printf("si_dma_alloc: excessive xlen=0x%x\n", xlen); 673 Debugger(); 674 #endif 675 ncr_sc->sc_datalen = xlen = MAX_DMA_LEN; 676 } 677 678 /* Find free DMA handle. Guaranteed to find one since we have 679 as many DMA handles as the driver has processes. */ 680 for (i = 0; i < SCI_OPENINGS; i++) { 681 if ((sc->sc_dma[i].dh_flags & SIDH_BUSY) == 0) 682 goto found; 683 } 684 panic("si: no free DMA handles."); 685 found: 686 687 dh = &sc->sc_dma[i]; 688 dh->dh_flags = SIDH_BUSY; 689 dh->dh_addr = (u_char*) addr; 690 dh->dh_maplen = xlen; 691 dh->dh_xlen = xlen; 692 dh->dh_dvma = 0; 693 694 /* Copy the "write" flag for convenience. */ 695 if (xs->flags & SCSI_DATA_OUT) 696 dh->dh_flags |= SIDH_OUT; 697 698 #if 1 699 /* 700 * If the buffer has the flag B_PHYS, the the address specified 701 * in the buffer is a user-space address and we need to remap 702 * this address into kernel space so that using this buffer 703 * within the interrupt routine will work. 704 * If it's already a kernel space address, we need to make sure 705 * that all pages are in-core. the mapin() routine takes care 706 * of that. 707 */ 708 if (bp && (bp->b_flags & B_PHYS)) 709 dh->dh_flags |= SIDH_PHYS; 710 #endif 711 712 if (!bp) { 713 printf("ncr.c: struct buf *bp is null-pointer.\n"); 714 dh->dh_flags = 0; 715 return; 716 } 717 if (bp->b_bcount < 0 || bp->b_bcount > MAX_DMA_LEN) { 718 printf("ncr.c: invalid bcount %ld (0x%lx)\n", 719 bp->b_bcount, bp->b_bcount); 720 dh->dh_flags = 0; 721 return; 722 } 723 dh->dh_dvma = bp->b_data; 724 #if 0 725 /* 726 * mapping of user-space addresses is no longer neccessary, now 727 * that the vmapbuf/vunmapbuf routines exist. Now the higher-level 728 * driver already cares for the mapping! 729 */ 730 if (bp->b_flags & B_PHYS) { 731 xdebug(("not mapping in... %x/%x %x\n", bp->b_saveaddr, 732 bp->b_data, bp->b_bcount)); 733 #ifdef USE_VMAPBUF 734 dh->dh_addr = bp->b_data; 735 dh->dh_maplen = bp->b_bcount; 736 vmapbuf(bp, bp->b_bcount); 737 dh->dh_dvma = bp->b_data; 738 #else 739 dh->dh_dvma = (u_char*)vsdma_mapin(bp); 740 #endif 741 xdebug(("addr %x, maplen %d, dvma %x, bcount %d, dir %s\n", 742 dh->dh_addr, dh->dh_maplen, dh->dh_dvma, bp->b_bcount, 743 (dh->dh_flags & SIDH_OUT ? "OUT" : "IN"))); 744 } 745 #endif 746 /* success */ 747 sr->sr_dma_hand = dh; 748 749 return; 750 } 751 752 753 void 754 si_dma_free(ncr_sc) 755 struct ncr5380_softc *ncr_sc; 756 { 757 struct sci_req *sr = ncr_sc->sc_current; 758 struct si_dma_handle *dh = sr->sr_dma_hand; 759 760 trace (("si_dma_free()\n")); 761 762 #ifdef DIAGNOSTIC 763 if (dh == NULL) 764 panic("si_dma_free: no DMA handle"); 765 #endif 766 767 if (ncr_sc->sc_state & NCR_DOINGDMA) 768 panic("si_dma_free: free while in progress"); 769 770 if (dh->dh_flags & SIDH_BUSY) { 771 #if 0 772 debug(("bp->b_flags=0x%x\n", bp->b_flags)); 773 if (bp->b_flags & B_PHYS) { 774 #ifdef USE_VMAPBUF 775 printf("not unmapping(%x/%x %x/%x %d/%d)...\n", 776 dh->dh_addr, dh->dh_dvma, 777 bp->b_saveaddr, bp->b_data, 778 bp->b_bcount, dh->dh_maplen); 779 /* vunmapbuf(bp, dh->dh_maplen); */ 780 printf("done.\n"); 781 #endif 782 dh->dh_dvma = 0; 783 } 784 #endif 785 dh->dh_flags = 0; 786 } 787 sr->sr_dma_hand = NULL; 788 } 789 790 791 /* 792 * REGBUSY and DMABUSY won't collide since the higher-level driver 793 * issues intr_on/intr_off before/after doing DMA. The only problem 794 * is to handle RDBUF/WRBUF wrt REGBUSY/DMABUSY 795 * 796 * There might be race-conditions, but for now we don't care for them... 797 */ 798 int 799 si_dmaLockBus(ncr_sc, lt) 800 struct ncr5380_softc *ncr_sc; 801 int lt; /* Lock-Type */ 802 { 803 struct si_softc *sc = (void*)ncr_sc; 804 int timeout = 200; /* wait .2 seconds max. */ 805 806 trace(("si_dmaLockBus(%x), cold: %d, current: %x\n", 807 lt, cold, sc->sc_dflags)); 808 809 #ifdef POLL_MODE 810 if (cold) 811 return (0); 812 #endif 813 814 if ((ncr_sc->sc_current != NULL) && (lt == VSDMA_REGBUSY)) { 815 printf("trying to use regs while sc_current is set.\n"); 816 printf("lt=%x, fl=%x, cur=%p\n", 817 lt, sc->sc_dflags, ncr_sc->sc_current); 818 } 819 if ((ncr_sc->sc_current == NULL) && (lt != VSDMA_REGBUSY)) { 820 printf("trying to use/prepare DMA without current.\n"); 821 printf("lt=%x, fl=%x, cur=%p\n", 822 lt, sc->sc_dflags, ncr_sc->sc_current); 823 } 824 825 if ((sc->sc_dflags & VSDMA_LOCKED) == 0) { 826 struct si_softc *sc = (struct si_softc *)ncr_sc; 827 sc->sc_dflags |= VSDMA_WANTED; 828 vsbus_lockDMA(sc->sc_cfargs); 829 sc->sc_dflags = VSDMA_LOCKED | lt; 830 return (0); 831 } 832 833 #if 1 834 while ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 835 debug(("busy wait(1)...\n")); 836 if (--timeout == 0) { 837 printf("timeout in busy-wait(%x %x)\n", 838 lt, sc->sc_dflags); 839 sc->sc_dflags &= ~VSDMA_LCKTYPE; 840 break; 841 } 842 delay(1000); 843 } 844 debug(("busy wait(1) done.\n")); 845 sc->sc_dflags |= lt; 846 847 #else 848 if ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 849 switch (lt) { 850 851 case VSDMA_RDBUF: 852 /* sc->sc_dflags |= VSDMA_IWANTED; */ 853 debug(("busy wait(1)...\n")); 854 while (sc->sc_dflags & 855 (VSDMA_WRBUF | VSDMA_DMABUSY)) { 856 if (--timeout == 0) { 857 printf("timeout in busy-wait(1)\n"); 858 sc->sc_dflags &= ~VSDMA_WRBUF; 859 sc->sc_dflags &= ~VSDMA_DMABUSY; 860 } 861 delay(1000); 862 } 863 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 864 debug(("busy wait(1) done.\n")); 865 sc->sc_dflags |= lt; 866 break; 867 868 case VSDMA_WRBUF: 869 /* sc->sc_dflags |= VSDMA_IWANTED; */ 870 debug(("busy wait(2)...\n")); 871 while (sc->sc_dflags & 872 (VSDMA_RDBUF | VSDMA_DMABUSY)) { 873 if (--timeout == 0) { 874 printf("timeout in busy-wait(2)\n"); 875 sc->sc_dflags &= ~VSDMA_RDBUF; 876 sc->sc_dflags &= ~VSDMA_DMABUSY; 877 } 878 delay(1000); 879 } 880 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 881 debug(("busy wait(2) done.\n")); 882 sc->sc_dflags |= lt; 883 break; 884 885 case VSDMA_DMABUSY: 886 /* sc->sc_dflags |= VSDMA_IWANTED; */ 887 debug(("busy wait(3)...\n")); 888 while (sc->sc_dflags & 889 (VSDMA_RDBUF | VSDMA_WRBUF)) { 890 if (--timeout == 0) { 891 printf("timeout in busy-wait(3)\n"); 892 sc->sc_dflags &= ~VSDMA_RDBUF; 893 sc->sc_dflags &= ~VSDMA_WRBUF; 894 } 895 delay(1000); 896 } 897 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 898 debug(("busy wait(3) done.\n")); 899 sc->sc_dflags |= lt; 900 break; 901 902 case VSDMA_REGBUSY: 903 /* sc->sc_dflags |= VSDMA_IWANTED; */ 904 debug(("busy wait(4)...\n")); 905 while (sc->sc_dflags & 906 (VSDMA_RDBUF | VSDMA_WRBUF | VSDMA_DMABUSY)) { 907 if (--timeout == 0) { 908 printf("timeout in busy-wait(4)\n"); 909 sc->sc_dflags &= ~VSDMA_RDBUF; 910 sc->sc_dflags &= ~VSDMA_WRBUF; 911 sc->sc_dflags &= ~VSDMA_DMABUSY; 912 } 913 delay(1000); 914 } 915 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 916 debug(("busy wait(4) done.\n")); 917 sc->sc_dflags |= lt; 918 break; 919 920 default: 921 printf("illegal lockType %x in si_dmaLockBus()\n"); 922 } 923 } 924 else 925 printf("already locked. (%x/%x)\n", lt, sc->sc_dflags); 926 #endif 927 if (sc->sc_dflags & lt) /* successfully locked for this type */ 928 return (0); 929 930 printf("spurious %x in si_dmaLockBus(%x)\n", lt, sc->sc_dflags); 931 return 0; 932 } 933 934 /* 935 * the lock of this type is no longer needed. If all (internal) locks are 936 * released, release the DMA bus. 937 */ 938 int 939 si_dmaReleaseBus(ncr_sc, lt) 940 struct ncr5380_softc *ncr_sc; 941 int lt; /* Lock-Type */ 942 { 943 struct si_softc *sc = (void*)ncr_sc; 944 945 trace(("si_dmaReleaseBus(%x), cold: %d, current: %x\n", 946 lt, cold, sc->sc_dflags)); 947 948 #ifdef POLL_MODE 949 if (cold) 950 return (0); 951 #endif 952 953 if ((sc->sc_dflags & VSDMA_LCKTYPE) == lt) { 954 sc->sc_dflags &= ~lt; 955 } 956 else 957 printf("trying to release %x while flags = %x\n", lt, 958 sc->sc_dflags); 959 960 if (sc->sc_dflags == VSDMA_LOCKED) { /* no longer needed */ 961 struct si_softc *sc = (struct si_softc *)ncr_sc; 962 vsbus_unlockDMA(sc->sc_cfargs); 963 sc->sc_dflags = 0; 964 } 965 return 0; 966 } 967 968 /* 969 * Just toggle the type of lock without releasing the lock... 970 * This is usually needed before/after bcopy() to/from DMA-buffer 971 */ 972 int 973 si_dmaToggleLock(ncr_sc, lt1, lt2) 974 struct ncr5380_softc *ncr_sc; 975 int lt1, lt2; /* Lock-Type */ 976 { 977 struct si_softc *sc = (void*)ncr_sc; 978 979 #ifdef POLL_MODE 980 if (cold) 981 return (0); 982 #endif 983 984 if (((sc->sc_dflags & lt1) != 0) && 985 ((sc->sc_dflags & lt2) == 0)) { 986 sc->sc_dflags |= lt2; 987 sc->sc_dflags &= ~lt1; 988 return (0); 989 } 990 printf("cannot toggle locking from %x to %x (current = %x)\n", 991 lt1, lt2, sc->sc_dflags); 992 return 0; 993 } 994 995 /* 996 * This is called when the bus is going idle, 997 * so we want to enable the SBC interrupts. 998 * That is controlled by the DMA enable! 999 * Who would have guessed! 1000 * What a NASTY trick! 1001 */ 1002 void 1003 si_intr_on(ncr_sc) 1004 struct ncr5380_softc *ncr_sc; 1005 { 1006 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 1007 } 1008 1009 /* 1010 * This is called when the bus is idle and we are 1011 * about to start playing with the SBC chip. 1012 * 1013 * VS2000 note: we have four kinds of access which are mutually exclusive: 1014 * - access to the NCR5380 registers 1015 * - access to the HDC9224 registers 1016 * - access to the DMA area 1017 * - doing DMA 1018 */ 1019 void 1020 si_intr_off(ncr_sc) 1021 struct ncr5380_softc *ncr_sc; 1022 { 1023 si_dmaLockBus(ncr_sc, VSDMA_REGBUSY); 1024 } 1025 1026 /***************************************************************** 1027 * VME functions for DMA 1028 ****************************************************************/ 1029 1030 1031 /* 1032 * This function is called during the COMMAND or MSG_IN phase 1033 * that preceeds a DATA_IN or DATA_OUT phase, in case we need 1034 * to setup the DMA engine before the bus enters a DATA phase. 1035 * 1036 * XXX: The VME adapter appears to suppress SBC interrupts 1037 * when the FIFO is not empty or the FIFO count is non-zero! 1038 * 1039 * On the VME version we just clear the DMA count and address 1040 * here (to make sure it stays idle) and do the real setup 1041 * later, in dma_start. 1042 */ 1043 void 1044 si_dma_setup(ncr_sc) 1045 struct ncr5380_softc *ncr_sc; 1046 { 1047 trace (("si_dma_setup(ncr_sc) !!!\n")); 1048 1049 /* 1050 * VS2000: nothing to do ... 1051 */ 1052 } 1053 1054 1055 void 1056 si_dma_start(ncr_sc) 1057 struct ncr5380_softc *ncr_sc; 1058 { 1059 struct si_softc *sc = (struct si_softc *)ncr_sc; 1060 struct sci_req *sr = ncr_sc->sc_current; 1061 struct si_dma_handle *dh = sr->sr_dma_hand; 1062 int xlen; 1063 1064 trace(("si_dma_start(%x)\n", sr->sr_dma_hand)); 1065 1066 /* 1067 * we always transfer from/to base of DMA-area, 1068 * thus the DMA-address is always the same, only size 1069 * and direction matter/differ on VS2000 1070 */ 1071 1072 debug(("ncr_sc->sc_datalen = %d\n", ncr_sc->sc_datalen)); 1073 xlen = ncr_sc->sc_datalen; 1074 dh->dh_xlen = xlen; 1075 1076 /* 1077 * VS2000 has a fixed 16KB-area where DMA is restricted to. 1078 * All DMA-addresses are relative to this base: KA410_DMA_BASE 1079 * Thus we need to copy the data into this area when writing, 1080 * or copy from this area when reading. (kind of bounce-buffer) 1081 */ 1082 1083 /* Set direction (send/recv) */ 1084 if (dh->dh_flags & SIDH_OUT) { 1085 /* 1086 * We know that we are called while intr_off (regs locked) 1087 * thus we toggle the lock from REGBUSY to WRBUF 1088 * also we set the BLOCKIT flag, so that the locking of 1089 * the DMA bus won't be released to the HDC9224... 1090 */ 1091 debug(("preparing msg-out (bcopy)\n")); 1092 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_WRBUF); 1093 bcopy(dh->dh_dvma, sc->sc_dbase, xlen); 1094 si_dmaToggleLock(ncr_sc, VSDMA_WRBUF, VSDMA_REGBUSY); 1095 *sc->sc_ddreg = DMA_DIR_OUT; 1096 } 1097 else { 1098 debug(("preparing data-in (bzero)\n")); 1099 /* bzero(sc->sc_dbase, xlen); */ 1100 *sc->sc_ddreg = DMA_DIR_IN; 1101 } 1102 sc->sc_dflags |= VSDMA_BLOCKED; 1103 1104 *sc->sc_dareg = DMA_ADDR_HBYTE; /* high byte (6 bits) */ 1105 *sc->sc_dareg = DMA_ADDR_LBYTE; /* low byte */ 1106 *sc->sc_dcreg = 0 - xlen; /* bertram XXX */ 1107 1108 #ifdef DEBUG 1109 if (si_debug & 2) { 1110 printf("si_dma_start: dh=%p, xlen=%d, creg=0x%x\n", 1111 dh, xlen, *sc->sc_dcreg); 1112 } 1113 #endif 1114 1115 #ifdef POLL_MODE 1116 debug(("dma_start: cold=%d\n", cold)); 1117 if (cold) { 1118 *sc->intmsk &= ~sc->intbit; 1119 *sc->intclr = sc->intbit; 1120 } 1121 else 1122 *sc->intmsk |= sc->intbit; 1123 #endif 1124 /* 1125 * Acknowledge the phase change. (After DMA setup!) 1126 * Put the SBIC into DMA mode, and start the transfer. 1127 */ 1128 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_DMABUSY); 1129 if (dh->dh_flags & SIDH_OUT) { 1130 *ncr_sc->sci_tcmd = PHASE_DATA_OUT; 1131 SCI_CLR_INTR(ncr_sc); 1132 *ncr_sc->sci_icmd = SCI_ICMD_DATA; 1133 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1134 *ncr_sc->sci_dma_send = 0; /* start it */ 1135 } else { 1136 *ncr_sc->sci_tcmd = PHASE_DATA_IN; 1137 SCI_CLR_INTR(ncr_sc); 1138 *ncr_sc->sci_icmd = 0; 1139 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1140 *ncr_sc->sci_irecv = 0; /* start it */ 1141 } 1142 ncr_sc->sc_state |= NCR_DOINGDMA; 1143 /* 1144 * having a delay (eg. printf) here, seems to solve the problem. 1145 * Isn't that strange ???? 1146 * Maybe the higher-level driver accesses one of the registers of 1147 * the controller while DMA is in progress. Having a long enough 1148 * delay here might prevent/delay this access until DMA bus is 1149 * free again... 1150 * 1151 * The instruction ++++ printf("DMA started.\n"); ++++ 1152 * is long/slow enough, to make the SSCI driver work. Thus we 1153 * try to find a delay() long/slow enough to do the same. The 1154 * argument to this delay is relative to the transfer-count. 1155 */ 1156 delay(3*xlen/4); /* XXX solve this problem!!! XXX */ 1157 1158 #ifdef DEBUG 1159 if (si_debug & 2) { 1160 printf("si_dma_start: started, flags=0x%x\n", 1161 ncr_sc->sc_state); 1162 } 1163 #endif 1164 } 1165 1166 #if 0 1167 void si_vme_dma_eop(struct ncr5380_softc *); 1168 1169 void 1170 si_vme_dma_eop(ncr_sc) 1171 struct ncr5380_softc *ncr_sc; 1172 { 1173 trace (("si_vme_dma_eop() !!!\n")); 1174 /* Not needed - DMA was stopped prior to examining sci_csr */ 1175 } 1176 #endif 1177 1178 /* 1179 * si_dma_stop() has now become almost a nop-routine, since DMA-buffer 1180 * has already been read within si_intr(), so there's nothing left to do. 1181 */ 1182 void 1183 si_dma_stop(ncr_sc) 1184 struct ncr5380_softc *ncr_sc; 1185 { 1186 struct si_softc *sc = (struct si_softc *)ncr_sc; 1187 struct sci_req *sr = ncr_sc->sc_current; 1188 struct si_dma_handle *dh = sr->sr_dma_hand; 1189 int resid, ntrans; 1190 1191 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 1192 #ifdef DEBUG 1193 printf("si_dma_stop: dma not running\n"); 1194 #endif 1195 return; 1196 } 1197 ncr_sc->sc_state &= ~NCR_DOINGDMA; 1198 1199 /* Note that timeout may have set the error flag. */ 1200 if (ncr_sc->sc_state & NCR_ABORTING) { 1201 printf("si_dma_stop: timeout?\n"); 1202 goto out; 1203 } 1204 1205 /* 1206 * Now try to figure out how much actually transferred 1207 */ 1208 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1209 si_dmaToggleLock(ncr_sc, VSDMA_DMABUSY, VSDMA_REGBUSY); 1210 resid = *sc->sc_dcreg; 1211 /* 1212 * XXX: don't correct at two places !!! 1213 */ 1214 if (resid == 1 && sc->sc_xflags) { 1215 resid = 0; 1216 } 1217 ntrans = dh->dh_xlen + resid; 1218 if (resid != 0) 1219 printf("resid=%d, xlen=%d, ntrans=%d\n", 1220 resid, dh->dh_xlen, ntrans); 1221 1222 #ifdef DEBUG 1223 if (si_debug & 2) { 1224 printf("si_dma_stop: resid=0x%x ntrans=0x%x\n", 1225 resid, ntrans); 1226 } 1227 #endif 1228 1229 if (ntrans < MIN_DMA_LEN) { 1230 printf("si: fifo count: 0x%x\n", resid); 1231 ncr_sc->sc_state |= NCR_ABORTING; 1232 goto out; 1233 } 1234 if (ntrans > ncr_sc->sc_datalen) 1235 panic("si_dma_stop: excess transfer"); 1236 1237 /* 1238 * On VS2000 in case of a READ-operation, we must now copy 1239 * the buffer-contents to the destination-address! 1240 */ 1241 if ((dh->dh_flags & SIDH_OUT) == 0 && 1242 (dh->dh_flags & SIDH_DONE) == 0) { 1243 printf("DMA buffer not yet copied.\n"); 1244 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_RDBUF); 1245 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 1246 si_dmaToggleLock(ncr_sc, VSDMA_RDBUF, VSDMA_REGBUSY); 1247 } 1248 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 1249 1250 /* Adjust data pointer */ 1251 ncr_sc->sc_dataptr += ntrans; 1252 ncr_sc->sc_datalen -= ntrans; 1253 1254 out: 1255 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1256 1257 /* Put SBIC back in PIO mode. */ 1258 *ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE); 1259 *ncr_sc->sci_icmd = 0; 1260 1261 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 1262 } 1263 1264 /* 1265 * Poll (spin-wait) for DMA completion. 1266 * Called right after xx_dma_start(), and 1267 * xx_dma_stop() will be called next. 1268 */ 1269 void 1270 si_dma_poll(ncr_sc) 1271 struct ncr5380_softc *ncr_sc; 1272 { 1273 #ifdef POLL_MODE 1274 struct sci_req *sr = ncr_sc->sc_current; 1275 struct si_softc *sc = (struct si_softc *)ncr_sc; 1276 struct si_dma_handle *dh = sr->sr_dma_hand; 1277 int i, timeout; 1278 #endif 1279 1280 if (! cold) 1281 printf("spurious call of DMA-poll ???"); 1282 1283 #ifdef POLL_MODE 1284 1285 delay(10000); 1286 trace(("si_dma_poll(%x)\n", *sc->sc_dcreg)); 1287 1288 /* 1289 * interrupt-request has been cleared by dma_start, thus 1290 * we do nothing else but wait for the intreq to reappear... 1291 */ 1292 1293 timeout = 5000; 1294 for (i=0; i<timeout; i++) { 1295 if (*sc->intreq & sc->intbit) 1296 break; 1297 delay(100); 1298 } 1299 if ((*sc->intreq & sc->intbit) == 0) { 1300 printf("si: DMA timeout (while polling)\n"); 1301 /* Indicate timeout as MI code would. */ 1302 sr->sr_flags |= SR_OVERDUE; 1303 } 1304 #endif 1305 return; 1306 } 1307
Indexes created Wed Oct 01 07:09:59 GMT 2025