ncr.c revision 1.15
1 /* $NetBSD: ncr.c,v 1.15 1998/11/19 21:50:02 thorpej Exp $ */ 2 3 #define USE_VMAPBUF 4 5 /* 6 * Copyright (c) 1995 David Jones, Gordon W. Ross 7 * Copyright (c) 1994 Adam Glass 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the authors may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 4. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by 23 * Adam Glass, David Jones, and Gordon Ross 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 /* 38 * This file contains only the machine-dependent parts of the 39 * Sun3 SCSI driver. (Autoconfig stuff and DMA functions.) 40 * The machine-independent parts are in ncr5380sbc.c 41 * 42 * Supported hardware includes: 43 * Sun SCSI-3 on OBIO (Sun3/50,Sun3/60) 44 * Sun SCSI-3 on VME (Sun3/160,Sun3/260) 45 * 46 * Could be made to support the Sun3/E if someone wanted to. 47 * 48 * Note: Both supported variants of the Sun SCSI-3 adapter have 49 * some really unusual "features" for this driver to deal with, 50 * generally related to the DMA engine. The OBIO variant will 51 * ignore any attempt to write the FIFO count register while the 52 * SCSI bus is in DATA_IN or DATA_OUT phase. This is dealt with 53 * by setting the FIFO count early in COMMAND or MSG_IN phase. 54 * 55 * The VME variant has a bit to enable or disable the DMA engine, 56 * but that bit also gates the interrupt line from the NCR5380! 57 * Therefore, in order to get any interrupt from the 5380, (i.e. 58 * for reselect) one must clear the DMA engine transfer count and 59 * then enable DMA. This has the further complication that you 60 * CAN NOT touch the NCR5380 while the DMA enable bit is set, so 61 * we have to turn DMA back off before we even look at the 5380. 62 * 63 * What wonderfully whacky hardware this is! 64 * 65 * Credits, history: 66 * 67 * David Jones wrote the initial version of this module, which 68 * included support for the VME adapter only. (no reselection). 69 * 70 * Gordon Ross added support for the OBIO adapter, and re-worked 71 * both the VME and OBIO code to support disconnect/reselect. 72 * (Required figuring out the hardware "features" noted above.) 73 * 74 * The autoconfiguration boilerplate came from Adam Glass. 75 * 76 * VS2000: 77 */ 78 #include "opt_ddb.h" 79 80 #include <sys/param.h> 81 #include <sys/systm.h> 82 #include <sys/kernel.h> 83 #include <sys/conf.h> 84 #include <sys/file.h> 85 #include <sys/stat.h> 86 #include <sys/ioctl.h> 87 #include <sys/buf.h> 88 #include <sys/proc.h> 89 #include <sys/user.h> 90 #include <sys/map.h> 91 #include <sys/device.h> 92 #include <sys/dkstat.h> 93 #include <sys/disklabel.h> 94 #include <sys/disk.h> 95 #include <sys/syslog.h> 96 #include <sys/malloc.h> 97 98 /* #include <sys/errno.h> */ 99 100 #include <dev/scsipi/scsi_all.h> 101 #include <dev/scsipi/scsipi_all.h> 102 #include <dev/scsipi/scsipi_debug.h> 103 #include <dev/scsipi/scsiconf.h> 104 105 #include <machine/uvax.h> 106 #include <machine/ka410.h> 107 #include <machine/ka43.h> 108 #include <machine/vsbus.h> /* struct confargs */ 109 110 #include <dev/ic/ncr5380reg.h> 111 #include <dev/ic/ncr5380var.h> 112 113 #define trace(x) 114 #define debug(x) 115 116 #ifndef NCR5380_CSRBITS 117 #define NCR5380_CSRBITS \ 118 "\020\010DEND\007DREQ\006PERR\005IREQ\004MTCH\003DCON\002ATN\001ACK" 119 #endif 120 121 #ifndef NCR5380_BUSCSRBITS 122 #define NCR5380_BUSCSRBITS \ 123 "\020\010RST\007BSY\006REQ\005MSG\004C/D\003I/O\002SEL\001DBP" 124 #endif 125 126 #include "ncr.h" 127 128 #ifdef DDB 129 #define integrate 130 #else 131 #define integrate static 132 #endif 133 134 /* 135 * Transfers smaller than this are done using PIO 136 * (on assumption they're not worth DMA overhead) 137 */ 138 #define MIN_DMA_LEN 128 139 140 /* 141 * Transfers lager than 65535 bytes need to be split-up. 142 * (Some of the FIFO logic has only 16 bits counters.) 143 * Make the size an integer multiple of the page size 144 * to avoid buf/cluster remap problems. (paranoid?) 145 * 146 * bertram: VS2000 has an DMA-area which is 16KB, thus 147 * have a maximum DMA-size of 16KB... 148 */ 149 #ifdef DMA_SHARED 150 #define MAX_DMA_LEN 0x2000 /* (8 * 1024) */ 151 #define DMA_ADDR_HBYTE 0x20 152 #define DMA_ADDR_LBYTE 0x00 153 #else 154 #define MAX_DMA_LEN 0x4000 /* (16 * 1024) */ 155 #define DMA_ADDR_HBYTE 0x00 156 #define DMA_ADDR_LBYTE 0x00 157 #endif 158 159 #ifdef DEBUG 160 int si_debug = 3; 161 static int si_link_flags = 0 /* | SDEV_DB2 */ ; 162 #endif 163 164 /* 165 * This structure is used to keep track of mappedpwd DMA requests. 166 * Note: combined the UDC command block with this structure, so 167 * the array of these has to be in DVMA space. 168 */ 169 struct si_dma_handle { 170 int dh_flags; 171 #define SIDH_BUSY 1 /* This DH is in use */ 172 #define SIDH_OUT 2 /* DMA does data out (write) */ 173 #define SIDH_PHYS 4 174 #define SIDH_DONE 8 175 u_char * dh_addr; /* KVA of start of buffer */ 176 int dh_maplen; /* Length of KVA mapping. */ 177 u_char * dh_dvma; /* VA of buffer in DVMA space */ 178 int dh_xlen; 179 }; 180 181 /* 182 * The first structure member has to be the ncr5380_softc 183 * so we can just cast to go back and fourth between them. 184 */ 185 struct si_softc { 186 struct ncr5380_softc ncr_sc; 187 volatile struct si_regs *sc_regs; /* do we really need this? */ 188 189 struct si_dma_handle *sc_dma; 190 struct confargs *sc_cfargs; 191 192 int sc_xflags; /* ka410/ka43: resid, sizeof(areg) */ 193 194 char *sc_dbase; 195 int sc_dsize; 196 197 volatile char *sc_dareg; 198 volatile short *sc_dcreg; 199 volatile char *sc_ddreg; 200 volatile int sc_dflags; 201 202 #define VSDMA_LOCKED 0x80 /* */ 203 #define VSDMA_WANTED 0x40 /* */ 204 #define VSDMA_IWANTED 0x20 205 #define VSDMA_BLOCKED 0x10 206 #define VSDMA_DMABUSY 0x08 /* DMA in progress */ 207 #define VSDMA_REGBUSY 0x04 /* accessing registers */ 208 #define VSDMA_WRBUF 0x02 /* writing to bounce-buffer */ 209 #define VSDMA_RDBUF 0x01 /* reading from bounce-buffer */ 210 211 #define VSDMA_STATUS 0xF0 212 #define VSDMA_LCKTYPE 0x0F 213 214 #ifdef POLL_MODE 215 volatile u_char *intreq; 216 volatile u_char *intclr; 217 volatile u_char *intmsk; 218 volatile int intbit; 219 #endif 220 }; 221 222 extern int cold; /* enable polling while cold-flag set */ 223 224 /* Options. Interesting values are: 1,3,7 */ 225 int si_options = 3; /* bertram: 3 or 7 ??? */ 226 #define SI_ENABLE_DMA 1 /* Use DMA (maybe polled) */ 227 #define SI_DMA_INTR 2 /* DMA completion interrupts */ 228 #define SI_DO_RESELECT 4 /* Allow disconnect/reselect */ 229 230 #define DMA_DIR_IN 1 231 #define DMA_DIR_OUT 0 232 233 /* How long to wait for DMA before declaring an error. */ 234 int si_dma_intr_timo = 500; /* ticks (sec. X 100) */ 235 236 integrate char si_name[] = "ncr"; 237 integrate int si_intr __P((void *)); 238 239 integrate void si_minphys __P((struct buf *bp)); 240 integrate void si_reset_adapter __P((struct ncr5380_softc *sc)); 241 242 void si_dma_alloc __P((struct ncr5380_softc *)); 243 void si_dma_free __P((struct ncr5380_softc *)); 244 void si_dma_poll __P((struct ncr5380_softc *)); 245 246 void si_intr_on __P((struct ncr5380_softc *)); 247 void si_intr_off __P((struct ncr5380_softc *)); 248 249 int si_dmaLockBus __P((struct ncr5380_softc *, int)); 250 int si_dmaToggleLock __P((struct ncr5380_softc *, int, int)); 251 int si_dmaReleaseBus __P((struct ncr5380_softc *, int)); 252 253 void si_dma_setup __P((struct ncr5380_softc *)); 254 void si_dma_start __P((struct ncr5380_softc *)); 255 void si_dma_eop __P((struct ncr5380_softc *)); 256 void si_dma_stop __P((struct ncr5380_softc *)); 257 258 /* This is copied from julian's bt driver */ 259 /* "so we have a default dev struct for our link struct." */ 260 static struct scsipi_device si_dev = { 261 NULL, /* Use default error handler. */ 262 NULL, /* Use default start handler. */ 263 NULL, /* Use default async handler. */ 264 NULL, /* Use default "done" routine. */ 265 }; 266 267 integrate int si_match(struct device *, struct cfdata *, void *); 268 integrate void si_attach(struct device *, struct device *, void *); 269 270 struct cfattach ncr_ca = { 271 sizeof(struct si_softc), si_match, si_attach, 272 }; 273 274 void 275 dk_establish(p,q) 276 struct disk *p; 277 struct device *q; 278 { 279 #if 0 280 printf ("faking dk_establish()...\n"); 281 #endif 282 } 283 284 285 integrate int 286 si_match(parent, match, aux) 287 struct device *parent; 288 struct cfdata *match; 289 void *aux; 290 { 291 struct confargs *ca = aux; 292 volatile int *base; 293 int res; 294 295 trace(("ncr_match(0x%x, %d, %s)\n", parent, cf->cf_unit, ca->ca_name)); 296 297 return 0; 298 if (strcmp(ca->ca_name, "ncr") && 299 strcmp(ca->ca_name, "ncr5380") && 300 strcmp(ca->ca_name, "NCR5380")) 301 return (0); 302 303 base = (void*)uvax_phys2virt(ca->ca_ioaddr); 304 printf("probing for SCSI controller at 0x%x...\n", ca->ca_ioaddr); 305 /* 306 * this is rather brute force attempt: 307 * it seems that writing -1 to the location of the ncr's registers 308 * results in 0x000000?? (8-bit registers) if ncr5380 exists and 309 * in 0xffffffff if there's no ncr5380 at this address. 310 */ 311 *base = -1; /* might be sufficient to check first reg. only */ 312 res = *base; 313 printf("result: 0x%x (%d)\n", res, res); 314 res >>= 16; 315 if (res == 0xffff) { 316 printf("no NCR5380 at 0x%x.\n", ca->ca_ioaddr); 317 return (0); 318 } 319 else if (res == 0) { 320 printf("SCSI controller found.\n"); 321 return (1); 322 } 323 printf("unexpected/strange result 0x%x during probe.\n", res); 324 return (0); 325 } 326 327 integrate void si_set_portid(int, int); 328 329 integrate void 330 si_set_portid(pid,port) 331 int pid; 332 int port; 333 { 334 struct { 335 u_long :2; 336 u_long id0:3; 337 u_long id1:3; 338 u_long :26; 339 } *p; 340 341 #ifdef DEBUG 342 int *ip; 343 ip = (void*)uvax_phys2virt(KA410_SCSIPORT); 344 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 345 printf("scsi-id: (%x/%d) %d / %d\n", *ip, *ip, p->id0, p->id1); 346 #endif 347 348 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 349 switch (port) { 350 case 0: 351 p->id0 = pid; 352 printf(": scsi-id %d\n", p->id0); 353 break; 354 case 1: 355 p->id1 = pid; 356 printf(": scsi-id %d\n", p->id1); 357 break; 358 default: 359 printf("invalid port-number %d\n", port); 360 } 361 } 362 363 integrate void 364 si_attach(parent, self, aux) 365 struct device *parent, *self; 366 void *aux; 367 { 368 struct si_softc *sc = (struct si_softc *) self; 369 struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc; 370 volatile struct si_regs *regs; 371 struct confargs *ca = aux; 372 int i; 373 374 trace (("ncr_attach(0x%x, 0x%x, %s)\n", parent, self, ca->ca_name)); 375 376 /* 377 * 378 */ 379 #ifdef POLL_MODE 380 sc->intreq = (void*)uvax_phys2virt(KA410_INTREQ); 381 sc->intmsk = (void*)uvax_phys2virt(KA410_INTMSK); 382 sc->intclr = (void*)uvax_phys2virt(KA410_INTCLR); 383 sc->intbit = ca->ca_intbit; 384 #endif 385 386 sc->sc_cfargs = ca; /* needed for interrupt-setup */ 387 388 regs = (void*)uvax_phys2virt(ca->ca_ioaddr); 389 390 sc->sc_dareg = (void*)uvax_phys2virt(ca->ca_dareg); 391 sc->sc_dcreg = (void*)uvax_phys2virt(ca->ca_dcreg); 392 sc->sc_ddreg = (void*)uvax_phys2virt(ca->ca_ddreg); 393 sc->sc_dbase = (void*)uvax_phys2virt(ca->ca_dbase); 394 sc->sc_dsize = ca->ca_dsize; 395 sc->sc_dflags = 4; /* XXX */ 396 sc->sc_xflags = ca->ca_dflag; /* should/will be renamed */ 397 398 /* 399 * Fill in the adapter. 400 */ 401 ncr_sc->sc_adapter.scsipi_cmd = ncr5380_scsi_cmd; 402 ncr_sc->sc_adapter.scsipi_minphys = si_minphys; 403 404 /* 405 * Fill in the prototype scsi_link. 406 */ 407 ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 408 ncr_sc->sc_link.adapter_softc = sc; 409 ncr_sc->sc_link.scsipi_scsi.adapter_target = ca->ca_idval; 410 ncr_sc->sc_link.adapter = &ncr_sc->sc_adapter; 411 ncr_sc->sc_link.device = &si_dev; 412 ncr_sc->sc_link.type = BUS_SCSI; 413 414 si_set_portid(ca->ca_idval, ncr_sc->sc_dev.dv_unit); 415 416 /* 417 * Initialize fields used by the MI code 418 */ 419 ncr_sc->sci_r0 = (void*)®s->sci.sci_r0; 420 ncr_sc->sci_r1 = (void*)®s->sci.sci_r1; 421 ncr_sc->sci_r2 = (void*)®s->sci.sci_r2; 422 ncr_sc->sci_r3 = (void*)®s->sci.sci_r3; 423 ncr_sc->sci_r4 = (void*)®s->sci.sci_r4; 424 ncr_sc->sci_r5 = (void*)®s->sci.sci_r5; 425 ncr_sc->sci_r6 = (void*)®s->sci.sci_r6; 426 ncr_sc->sci_r7 = (void*)®s->sci.sci_r7; 427 428 /* 429 * MD function pointers used by the MI code. 430 */ 431 ncr_sc->sc_pio_out = ncr5380_pio_out; 432 ncr_sc->sc_pio_in = ncr5380_pio_in; 433 ncr_sc->sc_dma_alloc = si_dma_alloc; 434 ncr_sc->sc_dma_free = si_dma_free; 435 ncr_sc->sc_dma_poll = si_dma_poll; /* si_dma_poll not used! */ 436 ncr_sc->sc_intr_on = si_intr_on; /* vsbus_unlockDMA; */ 437 ncr_sc->sc_intr_off = si_intr_off; /* vsbus_lockDMA; */ 438 439 ncr_sc->sc_dma_setup = NULL; /* si_dma_setup not used! */ 440 ncr_sc->sc_dma_start = si_dma_start; 441 ncr_sc->sc_dma_eop = NULL; 442 ncr_sc->sc_dma_stop = si_dma_stop; 443 444 ncr_sc->sc_flags = 0; 445 if ((si_options & SI_DO_RESELECT) == 0) 446 ncr_sc->sc_no_disconnect = 0xff; 447 if ((si_options & SI_DMA_INTR) == 0) 448 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 449 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 450 451 /* 452 * Initialize fields used only here in the MD code. 453 */ 454 i = SCI_OPENINGS * sizeof(struct si_dma_handle); 455 sc->sc_dma = (struct si_dma_handle *) malloc(i, M_DEVBUF, M_NOWAIT); 456 if (sc->sc_dma == NULL) 457 panic("si: dvma_malloc failed\n"); 458 for (i = 0; i < SCI_OPENINGS; i++) 459 sc->sc_dma[i].dh_flags = 0; 460 461 sc->sc_regs = regs; 462 463 #ifdef DEBUG 464 if (si_debug) 465 printf("si: Set TheSoftC=%p TheRegs=%p\n", sc, regs); 466 ncr_sc->sc_link.flags |= si_link_flags; 467 #endif 468 469 /* 470 * Initialize si board itself. 471 */ 472 si_reset_adapter(ncr_sc); 473 ncr5380_init(ncr_sc); 474 ncr5380_reset_scsibus(ncr_sc); 475 config_found(self, &(ncr_sc->sc_link), scsiprint); 476 477 /* 478 * Now ready for interrupts. 479 */ 480 #if 0 481 vsbus_intr_register(sc->sc_cfargs, si_intr, (void *)sc); 482 vsbus_intr_enable(sc->sc_cfargs); 483 #endif 484 } 485 486 integrate void 487 si_minphys(struct buf *bp) 488 { 489 debug(("minphys: blkno=%d, bcount=%d, data=0x%x, flags=%x\n", 490 bp->b_blkno, bp->b_bcount, bp->b_data, bp->b_flags)); 491 492 if (bp->b_bcount > MAX_DMA_LEN) { 493 #ifdef DEBUG 494 if (si_debug) { 495 printf("si_minphys len = 0x%lx.\n", bp->b_bcount); 496 #ifdef DDB 497 Debugger(); 498 #endif 499 } 500 #endif 501 bp->b_bcount = MAX_DMA_LEN; 502 } 503 return (minphys(bp)); 504 } 505 506 507 #define CSR_WANT (SI_CSR_SBC_IP | SI_CSR_DMA_IP | \ 508 SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR ) 509 510 static int si_intrCount = 0; 511 static int lastCSR = 0; 512 513 integrate int 514 si_intr(arg) 515 void *arg; 516 { 517 struct ncr5380_softc *ncr_sc = arg; 518 struct si_softc *sc = arg; 519 int count, claimed; 520 521 count = ++si_intrCount; 522 trace(("%s: si-intr(%d).....\n", ncr_sc->sc_dev.dv_xname, count)); 523 524 #ifdef DEBUG 525 /* 526 * Each DMA interrupt is followed by one spurious(?) interrupt. 527 * if (ncr_sc->sc_state & NCR_WORKING == 0) we know, that the 528 * interrupt was not claimed by the higher-level routine, so that 529 * it might be save to ignore these... 530 */ 531 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 532 printf("spurious(%d): %x, %d, status=%b\n", count, 533 sc->sc_dflags, ncr_sc->sc_ncmds, 534 *ncr_sc->sci_csr, NCR5380_CSRBITS); 535 } 536 #endif 537 /* 538 * If there was a DMA operation in progress, now it's no longer 539 * active, since whatever caused the interrupt also interrupted 540 * the DMA operation. Thus accessing the registers now doesn't 541 * harm anything which is not yet broken... 542 */ 543 debug(("si_intr(status: %x, dma-count: %d)\n", 544 *ncr_sc->sci_csr, *sc->sc_dcreg)); 545 546 /* 547 * First check for DMA errors / incomplete transfers 548 * If operation was read/data-in, the copy data from buffer 549 */ 550 if (ncr_sc->sc_state & NCR_DOINGDMA) { 551 struct sci_req *sr = ncr_sc->sc_current; 552 struct si_dma_handle *dh = sr->sr_dma_hand; 553 int resid, ntrans; 554 555 resid = *sc->sc_dcreg; 556 if (resid == 1 && sc->sc_xflags) { 557 debug(("correcting resid...\n")); 558 resid = 0; 559 } 560 ntrans = dh->dh_xlen + resid; 561 if (resid == 0) { 562 if ((dh->dh_flags & SIDH_OUT) == 0) { 563 si_dmaToggleLock(ncr_sc, 564 VSDMA_DMABUSY, VSDMA_RDBUF); 565 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 566 si_dmaToggleLock(ncr_sc, 567 VSDMA_RDBUF, VSDMA_DMABUSY); 568 dh->dh_flags |= SIDH_DONE; 569 } 570 } 571 else { 572 #ifdef DEBUG 573 int csr = *ncr_sc->sci_csr; 574 printf("DMA incomplete (%d/%d) status = %b\n", 575 ntrans, resid, csr, NCR5380_CSRBITS); 576 if(csr != lastCSR) { 577 debug(("Changed status bits: %b\n", 578 k, NCR5380_CSRBITS)); 579 lastCSR = csr & 0xFF; 580 } 581 #endif 582 printf("DMA incomplete: ntrans=%d/%d, lock=%x\n", 583 ntrans, dh->dh_xlen, sc->sc_dflags); 584 ncr_sc->sc_state |= NCR_ABORTING; 585 } 586 587 if ((sc->sc_dflags & VSDMA_BLOCKED) == 0) { 588 printf("not blocked during DMA.\n"); 589 } 590 sc->sc_dflags &= ~VSDMA_BLOCKED; 591 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 592 } 593 if ((sc->sc_dflags & VSDMA_BLOCKED) != 0) { 594 printf("blocked while not doing DMA.\n"); 595 sc->sc_dflags &= ~VSDMA_BLOCKED; 596 } 597 598 /* 599 * Now, whatever it was, let the ncr5380sbc routine handle it... 600 */ 601 claimed = ncr5380_intr(ncr_sc); 602 #ifdef DEBUG 603 if (!claimed) { 604 printf("si_intr: spurious from SBC\n"); 605 if (si_debug & 4) { 606 Debugger(); /* XXX */ 607 } 608 } 609 #endif 610 trace(("%s: si-intr(%d) done, claimed=%d\n", 611 ncr_sc->sc_dev.dv_xname, count, claimed)); 612 return (claimed); 613 } 614 615 616 integrate void 617 si_reset_adapter(struct ncr5380_softc *ncr_sc) 618 { 619 620 #ifdef DEBUG 621 if (si_debug) { 622 printf("si_reset_adapter\n"); 623 } 624 #endif 625 SCI_CLR_INTR(ncr_sc); 626 } 627 628 629 /***************************************************************** 630 * Common functions for DMA 631 ****************************************************************/ 632 633 /* 634 * Allocate a DMA handle and put it in sc->sc_dma. Prepare 635 * for DMA transfer. On the Sun3, this means mapping the buffer 636 * into DVMA space. dvma_mapin() flushes the cache for us. 637 */ 638 void 639 si_dma_alloc(ncr_sc) 640 struct ncr5380_softc *ncr_sc; 641 { 642 struct si_softc *sc = (struct si_softc *)ncr_sc; 643 struct sci_req *sr = ncr_sc->sc_current; 644 struct scsipi_xfer *xs = sr->sr_xs; 645 struct buf *bp = sr->sr_xs->bp; 646 struct si_dma_handle *dh; 647 int i, xlen; 648 u_long addr; 649 650 trace (("si_dma_alloc()\n")); 651 652 #ifdef DIAGNOSTIC 653 if (sr->sr_dma_hand != NULL) 654 panic("si_dma_alloc: already have DMA handle"); 655 #endif 656 657 addr = (u_long) ncr_sc->sc_dataptr; 658 debug(("addr=%x, dataptr=%x\n", addr, ncr_sc->sc_dataptr)); 659 xlen = ncr_sc->sc_datalen; 660 661 /* Make sure our caller checked sc_min_dma_len. */ 662 if (xlen < MIN_DMA_LEN) 663 panic("si_dma_alloc: xlen=0x%x\n", xlen); 664 665 /* 666 * Never attempt single transfers of more than 63k, because 667 * our count register may be only 16 bits (an OBIO adapter). 668 * This should never happen since already bounded by minphys(). 669 * XXX - Should just segment these... 670 */ 671 if (xlen > MAX_DMA_LEN) { 672 #ifdef DEBUG 673 printf("si_dma_alloc: excessive xlen=0x%x\n", xlen); 674 Debugger(); 675 #endif 676 ncr_sc->sc_datalen = xlen = MAX_DMA_LEN; 677 } 678 679 /* Find free DMA handle. Guaranteed to find one since we have 680 as many DMA handles as the driver has processes. */ 681 for (i = 0; i < SCI_OPENINGS; i++) { 682 if ((sc->sc_dma[i].dh_flags & SIDH_BUSY) == 0) 683 goto found; 684 } 685 panic("si: no free DMA handles."); 686 found: 687 688 dh = &sc->sc_dma[i]; 689 dh->dh_flags = SIDH_BUSY; 690 dh->dh_addr = (u_char*) addr; 691 dh->dh_maplen = xlen; 692 dh->dh_xlen = xlen; 693 dh->dh_dvma = 0; 694 695 /* Copy the "write" flag for convenience. */ 696 if (xs->flags & SCSI_DATA_OUT) 697 dh->dh_flags |= SIDH_OUT; 698 699 #if 1 700 /* 701 * If the buffer has the flag B_PHYS, the the address specified 702 * in the buffer is a user-space address and we need to remap 703 * this address into kernel space so that using this buffer 704 * within the interrupt routine will work. 705 * If it's already a kernel space address, we need to make sure 706 * that all pages are in-core. the mapin() routine takes care 707 * of that. 708 */ 709 if (bp && (bp->b_flags & B_PHYS)) 710 dh->dh_flags |= SIDH_PHYS; 711 #endif 712 713 if (!bp) { 714 printf("ncr.c: struct buf *bp is null-pointer.\n"); 715 dh->dh_flags = 0; 716 return; 717 } 718 if (bp->b_bcount < 0 || bp->b_bcount > MAX_DMA_LEN) { 719 printf("ncr.c: invalid bcount %ld (0x%lx)\n", 720 bp->b_bcount, bp->b_bcount); 721 dh->dh_flags = 0; 722 return; 723 } 724 dh->dh_dvma = bp->b_data; 725 #if 0 726 /* 727 * mapping of user-space addresses is no longer neccessary, now 728 * that the vmapbuf/vunmapbuf routines exist. Now the higher-level 729 * driver already cares for the mapping! 730 */ 731 if (bp->b_flags & B_PHYS) { 732 xdebug(("not mapping in... %x/%x %x\n", bp->b_saveaddr, 733 bp->b_data, bp->b_bcount)); 734 #ifdef USE_VMAPBUF 735 dh->dh_addr = bp->b_data; 736 dh->dh_maplen = bp->b_bcount; 737 vmapbuf(bp, bp->b_bcount); 738 dh->dh_dvma = bp->b_data; 739 #else 740 dh->dh_dvma = (u_char*)vsdma_mapin(bp); 741 #endif 742 xdebug(("addr %x, maplen %d, dvma %x, bcount %d, dir %s\n", 743 dh->dh_addr, dh->dh_maplen, dh->dh_dvma, bp->b_bcount, 744 (dh->dh_flags & SIDH_OUT ? "OUT" : "IN"))); 745 } 746 #endif 747 /* success */ 748 sr->sr_dma_hand = dh; 749 750 return; 751 } 752 753 754 void 755 si_dma_free(ncr_sc) 756 struct ncr5380_softc *ncr_sc; 757 { 758 struct sci_req *sr = ncr_sc->sc_current; 759 struct si_dma_handle *dh = sr->sr_dma_hand; 760 761 trace (("si_dma_free()\n")); 762 763 #ifdef DIAGNOSTIC 764 if (dh == NULL) 765 panic("si_dma_free: no DMA handle"); 766 #endif 767 768 if (ncr_sc->sc_state & NCR_DOINGDMA) 769 panic("si_dma_free: free while in progress"); 770 771 if (dh->dh_flags & SIDH_BUSY) { 772 #if 0 773 debug(("bp->b_flags=0x%x\n", bp->b_flags)); 774 if (bp->b_flags & B_PHYS) { 775 #ifdef USE_VMAPBUF 776 printf("not unmapping(%x/%x %x/%x %d/%d)...\n", 777 dh->dh_addr, dh->dh_dvma, 778 bp->b_saveaddr, bp->b_data, 779 bp->b_bcount, dh->dh_maplen); 780 /* vunmapbuf(bp, dh->dh_maplen); */ 781 printf("done.\n"); 782 #endif 783 dh->dh_dvma = 0; 784 } 785 #endif 786 dh->dh_flags = 0; 787 } 788 sr->sr_dma_hand = NULL; 789 } 790 791 792 /* 793 * REGBUSY and DMABUSY won't collide since the higher-level driver 794 * issues intr_on/intr_off before/after doing DMA. The only problem 795 * is to handle RDBUF/WRBUF wrt REGBUSY/DMABUSY 796 * 797 * There might be race-conditions, but for now we don't care for them... 798 */ 799 int 800 si_dmaLockBus(ncr_sc, lt) 801 struct ncr5380_softc *ncr_sc; 802 int lt; /* Lock-Type */ 803 { 804 struct si_softc *sc = (void*)ncr_sc; 805 int timeout = 200; /* wait .2 seconds max. */ 806 807 trace(("si_dmaLockBus(%x), cold: %d, current: %x\n", 808 lt, cold, sc->sc_dflags)); 809 810 #ifdef POLL_MODE 811 if (cold) 812 return (0); 813 #endif 814 815 if ((ncr_sc->sc_current != NULL) && (lt == VSDMA_REGBUSY)) { 816 printf("trying to use regs while sc_current is set.\n"); 817 printf("lt=%x, fl=%x, cur=%p\n", 818 lt, sc->sc_dflags, ncr_sc->sc_current); 819 } 820 if ((ncr_sc->sc_current == NULL) && (lt != VSDMA_REGBUSY)) { 821 printf("trying to use/prepare DMA without current.\n"); 822 printf("lt=%x, fl=%x, cur=%p\n", 823 lt, sc->sc_dflags, ncr_sc->sc_current); 824 } 825 826 if ((sc->sc_dflags & VSDMA_LOCKED) == 0) { 827 struct si_softc *sc = (struct si_softc *)ncr_sc; 828 sc->sc_dflags |= VSDMA_WANTED; 829 vsbus_lockDMA(sc->sc_cfargs); 830 sc->sc_dflags = VSDMA_LOCKED | lt; 831 return (0); 832 } 833 834 #if 1 835 while ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 836 debug(("busy wait(1)...\n")); 837 if (--timeout == 0) { 838 printf("timeout in busy-wait(%x %x)\n", 839 lt, sc->sc_dflags); 840 sc->sc_dflags &= ~VSDMA_LCKTYPE; 841 break; 842 } 843 delay(1000); 844 } 845 debug(("busy wait(1) done.\n")); 846 sc->sc_dflags |= lt; 847 848 #else 849 if ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 850 switch (lt) { 851 852 case VSDMA_RDBUF: 853 /* sc->sc_dflags |= VSDMA_IWANTED; */ 854 debug(("busy wait(1)...\n")); 855 while (sc->sc_dflags & 856 (VSDMA_WRBUF | VSDMA_DMABUSY)) { 857 if (--timeout == 0) { 858 printf("timeout in busy-wait(1)\n"); 859 sc->sc_dflags &= ~VSDMA_WRBUF; 860 sc->sc_dflags &= ~VSDMA_DMABUSY; 861 } 862 delay(1000); 863 } 864 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 865 debug(("busy wait(1) done.\n")); 866 sc->sc_dflags |= lt; 867 break; 868 869 case VSDMA_WRBUF: 870 /* sc->sc_dflags |= VSDMA_IWANTED; */ 871 debug(("busy wait(2)...\n")); 872 while (sc->sc_dflags & 873 (VSDMA_RDBUF | VSDMA_DMABUSY)) { 874 if (--timeout == 0) { 875 printf("timeout in busy-wait(2)\n"); 876 sc->sc_dflags &= ~VSDMA_RDBUF; 877 sc->sc_dflags &= ~VSDMA_DMABUSY; 878 } 879 delay(1000); 880 } 881 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 882 debug(("busy wait(2) done.\n")); 883 sc->sc_dflags |= lt; 884 break; 885 886 case VSDMA_DMABUSY: 887 /* sc->sc_dflags |= VSDMA_IWANTED; */ 888 debug(("busy wait(3)...\n")); 889 while (sc->sc_dflags & 890 (VSDMA_RDBUF | VSDMA_WRBUF)) { 891 if (--timeout == 0) { 892 printf("timeout in busy-wait(3)\n"); 893 sc->sc_dflags &= ~VSDMA_RDBUF; 894 sc->sc_dflags &= ~VSDMA_WRBUF; 895 } 896 delay(1000); 897 } 898 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 899 debug(("busy wait(3) done.\n")); 900 sc->sc_dflags |= lt; 901 break; 902 903 case VSDMA_REGBUSY: 904 /* sc->sc_dflags |= VSDMA_IWANTED; */ 905 debug(("busy wait(4)...\n")); 906 while (sc->sc_dflags & 907 (VSDMA_RDBUF | VSDMA_WRBUF | VSDMA_DMABUSY)) { 908 if (--timeout == 0) { 909 printf("timeout in busy-wait(4)\n"); 910 sc->sc_dflags &= ~VSDMA_RDBUF; 911 sc->sc_dflags &= ~VSDMA_WRBUF; 912 sc->sc_dflags &= ~VSDMA_DMABUSY; 913 } 914 delay(1000); 915 } 916 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 917 debug(("busy wait(4) done.\n")); 918 sc->sc_dflags |= lt; 919 break; 920 921 default: 922 printf("illegal lockType %x in si_dmaLockBus()\n"); 923 } 924 } 925 else 926 printf("already locked. (%x/%x)\n", lt, sc->sc_dflags); 927 #endif 928 if (sc->sc_dflags & lt) /* successfully locked for this type */ 929 return (0); 930 931 printf("spurious %x in si_dmaLockBus(%x)\n", lt, sc->sc_dflags); 932 return 0; 933 } 934 935 /* 936 * the lock of this type is no longer needed. If all (internal) locks are 937 * released, release the DMA bus. 938 */ 939 int 940 si_dmaReleaseBus(ncr_sc, lt) 941 struct ncr5380_softc *ncr_sc; 942 int lt; /* Lock-Type */ 943 { 944 struct si_softc *sc = (void*)ncr_sc; 945 946 trace(("si_dmaReleaseBus(%x), cold: %d, current: %x\n", 947 lt, cold, sc->sc_dflags)); 948 949 #ifdef POLL_MODE 950 if (cold) 951 return (0); 952 #endif 953 954 if ((sc->sc_dflags & VSDMA_LCKTYPE) == lt) { 955 sc->sc_dflags &= ~lt; 956 } 957 else 958 printf("trying to release %x while flags = %x\n", lt, 959 sc->sc_dflags); 960 961 if (sc->sc_dflags == VSDMA_LOCKED) { /* no longer needed */ 962 struct si_softc *sc = (struct si_softc *)ncr_sc; 963 vsbus_unlockDMA(sc->sc_cfargs); 964 sc->sc_dflags = 0; 965 } 966 return 0; 967 } 968 969 /* 970 * Just toggle the type of lock without releasing the lock... 971 * This is usually needed before/after bcopy() to/from DMA-buffer 972 */ 973 int 974 si_dmaToggleLock(ncr_sc, lt1, lt2) 975 struct ncr5380_softc *ncr_sc; 976 int lt1, lt2; /* Lock-Type */ 977 { 978 struct si_softc *sc = (void*)ncr_sc; 979 980 #ifdef POLL_MODE 981 if (cold) 982 return (0); 983 #endif 984 985 if (((sc->sc_dflags & lt1) != 0) && 986 ((sc->sc_dflags & lt2) == 0)) { 987 sc->sc_dflags |= lt2; 988 sc->sc_dflags &= ~lt1; 989 return (0); 990 } 991 printf("cannot toggle locking from %x to %x (current = %x)\n", 992 lt1, lt2, sc->sc_dflags); 993 return 0; 994 } 995 996 /* 997 * This is called when the bus is going idle, 998 * so we want to enable the SBC interrupts. 999 * That is controlled by the DMA enable! 1000 * Who would have guessed! 1001 * What a NASTY trick! 1002 */ 1003 void 1004 si_intr_on(ncr_sc) 1005 struct ncr5380_softc *ncr_sc; 1006 { 1007 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 1008 } 1009 1010 /* 1011 * This is called when the bus is idle and we are 1012 * about to start playing with the SBC chip. 1013 * 1014 * VS2000 note: we have four kinds of access which are mutually exclusive: 1015 * - access to the NCR5380 registers 1016 * - access to the HDC9224 registers 1017 * - access to the DMA area 1018 * - doing DMA 1019 */ 1020 void 1021 si_intr_off(ncr_sc) 1022 struct ncr5380_softc *ncr_sc; 1023 { 1024 si_dmaLockBus(ncr_sc, VSDMA_REGBUSY); 1025 } 1026 1027 /***************************************************************** 1028 * VME functions for DMA 1029 ****************************************************************/ 1030 1031 1032 /* 1033 * This function is called during the COMMAND or MSG_IN phase 1034 * that preceeds a DATA_IN or DATA_OUT phase, in case we need 1035 * to setup the DMA engine before the bus enters a DATA phase. 1036 * 1037 * XXX: The VME adapter appears to suppress SBC interrupts 1038 * when the FIFO is not empty or the FIFO count is non-zero! 1039 * 1040 * On the VME version we just clear the DMA count and address 1041 * here (to make sure it stays idle) and do the real setup 1042 * later, in dma_start. 1043 */ 1044 void 1045 si_dma_setup(ncr_sc) 1046 struct ncr5380_softc *ncr_sc; 1047 { 1048 trace (("si_dma_setup(ncr_sc) !!!\n")); 1049 1050 /* 1051 * VS2000: nothing to do ... 1052 */ 1053 } 1054 1055 1056 void 1057 si_dma_start(ncr_sc) 1058 struct ncr5380_softc *ncr_sc; 1059 { 1060 struct si_softc *sc = (struct si_softc *)ncr_sc; 1061 struct sci_req *sr = ncr_sc->sc_current; 1062 struct si_dma_handle *dh = sr->sr_dma_hand; 1063 int xlen; 1064 1065 trace(("si_dma_start(%x)\n", sr->sr_dma_hand)); 1066 1067 /* 1068 * we always transfer from/to base of DMA-area, 1069 * thus the DMA-address is always the same, only size 1070 * and direction matter/differ on VS2000 1071 */ 1072 1073 debug(("ncr_sc->sc_datalen = %d\n", ncr_sc->sc_datalen)); 1074 xlen = ncr_sc->sc_datalen; 1075 dh->dh_xlen = xlen; 1076 1077 /* 1078 * VS2000 has a fixed 16KB-area where DMA is restricted to. 1079 * All DMA-addresses are relative to this base: KA410_DMA_BASE 1080 * Thus we need to copy the data into this area when writing, 1081 * or copy from this area when reading. (kind of bounce-buffer) 1082 */ 1083 1084 /* Set direction (send/recv) */ 1085 if (dh->dh_flags & SIDH_OUT) { 1086 /* 1087 * We know that we are called while intr_off (regs locked) 1088 * thus we toggle the lock from REGBUSY to WRBUF 1089 * also we set the BLOCKIT flag, so that the locking of 1090 * the DMA bus won't be released to the HDC9224... 1091 */ 1092 debug(("preparing msg-out (bcopy)\n")); 1093 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_WRBUF); 1094 bcopy(dh->dh_dvma, sc->sc_dbase, xlen); 1095 si_dmaToggleLock(ncr_sc, VSDMA_WRBUF, VSDMA_REGBUSY); 1096 *sc->sc_ddreg = DMA_DIR_OUT; 1097 } 1098 else { 1099 debug(("preparing data-in (bzero)\n")); 1100 /* bzero(sc->sc_dbase, xlen); */ 1101 *sc->sc_ddreg = DMA_DIR_IN; 1102 } 1103 sc->sc_dflags |= VSDMA_BLOCKED; 1104 1105 *sc->sc_dareg = DMA_ADDR_HBYTE; /* high byte (6 bits) */ 1106 *sc->sc_dareg = DMA_ADDR_LBYTE; /* low byte */ 1107 *sc->sc_dcreg = 0 - xlen; /* bertram XXX */ 1108 1109 #ifdef DEBUG 1110 if (si_debug & 2) { 1111 printf("si_dma_start: dh=%p, xlen=%d, creg=0x%x\n", 1112 dh, xlen, *sc->sc_dcreg); 1113 } 1114 #endif 1115 1116 #ifdef POLL_MODE 1117 debug(("dma_start: cold=%d\n", cold)); 1118 if (cold) { 1119 *sc->intmsk &= ~sc->intbit; 1120 *sc->intclr = sc->intbit; 1121 } 1122 else 1123 *sc->intmsk |= sc->intbit; 1124 #endif 1125 /* 1126 * Acknowledge the phase change. (After DMA setup!) 1127 * Put the SBIC into DMA mode, and start the transfer. 1128 */ 1129 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_DMABUSY); 1130 if (dh->dh_flags & SIDH_OUT) { 1131 *ncr_sc->sci_tcmd = PHASE_DATA_OUT; 1132 SCI_CLR_INTR(ncr_sc); 1133 *ncr_sc->sci_icmd = SCI_ICMD_DATA; 1134 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1135 *ncr_sc->sci_dma_send = 0; /* start it */ 1136 } else { 1137 *ncr_sc->sci_tcmd = PHASE_DATA_IN; 1138 SCI_CLR_INTR(ncr_sc); 1139 *ncr_sc->sci_icmd = 0; 1140 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1141 *ncr_sc->sci_irecv = 0; /* start it */ 1142 } 1143 ncr_sc->sc_state |= NCR_DOINGDMA; 1144 /* 1145 * having a delay (eg. printf) here, seems to solve the problem. 1146 * Isn't that strange ???? 1147 * Maybe the higher-level driver accesses one of the registers of 1148 * the controller while DMA is in progress. Having a long enough 1149 * delay here might prevent/delay this access until DMA bus is 1150 * free again... 1151 * 1152 * The instruction ++++ printf("DMA started.\n"); ++++ 1153 * is long/slow enough, to make the SSCI driver work. Thus we 1154 * try to find a delay() long/slow enough to do the same. The 1155 * argument to this delay is relative to the transfer-count. 1156 */ 1157 delay(3*xlen/4); /* XXX solve this problem!!! XXX */ 1158 1159 #ifdef DEBUG 1160 if (si_debug & 2) { 1161 printf("si_dma_start: started, flags=0x%x\n", 1162 ncr_sc->sc_state); 1163 } 1164 #endif 1165 } 1166 1167 #if 0 1168 void si_vme_dma_eop(struct ncr5380_softc *); 1169 1170 void 1171 si_vme_dma_eop(ncr_sc) 1172 struct ncr5380_softc *ncr_sc; 1173 { 1174 trace (("si_vme_dma_eop() !!!\n")); 1175 /* Not needed - DMA was stopped prior to examining sci_csr */ 1176 } 1177 #endif 1178 1179 /* 1180 * si_dma_stop() has now become almost a nop-routine, since DMA-buffer 1181 * has already been read within si_intr(), so there's nothing left to do. 1182 */ 1183 void 1184 si_dma_stop(ncr_sc) 1185 struct ncr5380_softc *ncr_sc; 1186 { 1187 struct si_softc *sc = (struct si_softc *)ncr_sc; 1188 struct sci_req *sr = ncr_sc->sc_current; 1189 struct si_dma_handle *dh = sr->sr_dma_hand; 1190 int resid, ntrans; 1191 1192 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 1193 #ifdef DEBUG 1194 printf("si_dma_stop: dma not running\n"); 1195 #endif 1196 return; 1197 } 1198 ncr_sc->sc_state &= ~NCR_DOINGDMA; 1199 1200 /* Note that timeout may have set the error flag. */ 1201 if (ncr_sc->sc_state & NCR_ABORTING) { 1202 printf("si_dma_stop: timeout?\n"); 1203 goto out; 1204 } 1205 1206 /* 1207 * Now try to figure out how much actually transferred 1208 */ 1209 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1210 si_dmaToggleLock(ncr_sc, VSDMA_DMABUSY, VSDMA_REGBUSY); 1211 resid = *sc->sc_dcreg; 1212 /* 1213 * XXX: don't correct at two places !!! 1214 */ 1215 if (resid == 1 && sc->sc_xflags) { 1216 resid = 0; 1217 } 1218 ntrans = dh->dh_xlen + resid; 1219 if (resid != 0) 1220 printf("resid=%d, xlen=%d, ntrans=%d\n", 1221 resid, dh->dh_xlen, ntrans); 1222 1223 #ifdef DEBUG 1224 if (si_debug & 2) { 1225 printf("si_dma_stop: resid=0x%x ntrans=0x%x\n", 1226 resid, ntrans); 1227 } 1228 #endif 1229 1230 if (ntrans < MIN_DMA_LEN) { 1231 printf("si: fifo count: 0x%x\n", resid); 1232 ncr_sc->sc_state |= NCR_ABORTING; 1233 goto out; 1234 } 1235 if (ntrans > ncr_sc->sc_datalen) 1236 panic("si_dma_stop: excess transfer"); 1237 1238 /* 1239 * On VS2000 in case of a READ-operation, we must now copy 1240 * the buffer-contents to the destination-address! 1241 */ 1242 if ((dh->dh_flags & SIDH_OUT) == 0 && 1243 (dh->dh_flags & SIDH_DONE) == 0) { 1244 printf("DMA buffer not yet copied.\n"); 1245 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_RDBUF); 1246 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 1247 si_dmaToggleLock(ncr_sc, VSDMA_RDBUF, VSDMA_REGBUSY); 1248 } 1249 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 1250 1251 /* Adjust data pointer */ 1252 ncr_sc->sc_dataptr += ntrans; 1253 ncr_sc->sc_datalen -= ntrans; 1254 1255 out: 1256 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1257 1258 /* Put SBIC back in PIO mode. */ 1259 *ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE); 1260 *ncr_sc->sci_icmd = 0; 1261 1262 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 1263 } 1264 1265 /* 1266 * Poll (spin-wait) for DMA completion. 1267 * Called right after xx_dma_start(), and 1268 * xx_dma_stop() will be called next. 1269 */ 1270 void 1271 si_dma_poll(ncr_sc) 1272 struct ncr5380_softc *ncr_sc; 1273 { 1274 #ifdef POLL_MODE 1275 struct sci_req *sr = ncr_sc->sc_current; 1276 struct si_softc *sc = (struct si_softc *)ncr_sc; 1277 struct si_dma_handle *dh = sr->sr_dma_hand; 1278 int i, timeout; 1279 #endif 1280 1281 if (! cold) 1282 printf("spurious call of DMA-poll ???"); 1283 1284 #ifdef POLL_MODE 1285 1286 delay(10000); 1287 trace(("si_dma_poll(%x)\n", *sc->sc_dcreg)); 1288 1289 /* 1290 * interrupt-request has been cleared by dma_start, thus 1291 * we do nothing else but wait for the intreq to reappear... 1292 */ 1293 1294 timeout = 5000; 1295 for (i=0; i<timeout; i++) { 1296 if (*sc->intreq & sc->intbit) 1297 break; 1298 delay(100); 1299 } 1300 if ((*sc->intreq & sc->intbit) == 0) { 1301 printf("si: DMA timeout (while polling)\n"); 1302 /* Indicate timeout as MI code would. */ 1303 sr->sr_flags |= SR_OVERDUE; 1304 } 1305 #endif 1306 return; 1307 } 1308
Indexes created Tue Sep 30 20:09:53 GMT 2025