ncr.c revision 1.5
1 /* $NetBSD: ncr.c,v 1.5 1996/10/13 03:36:14 christos Exp $ */ 2 3 /* #define DEBUG /* */ 4 /* #define TRACE /* */ 5 /* #define POLL_MODE /* */ 6 #define USE_VMAPBUF 7 8 /* 9 * Copyright (c) 1995 David Jones, Gordon W. Ross 10 * Copyright (c) 1994 Adam Glass 11 * All rights reserved. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. The name of the authors may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 4. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by 26 * Adam Glass, David Jones, and Gordon Ross 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 29 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 30 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 33 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 37 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * This file contains only the machine-dependent parts of the 42 * Sun3 SCSI driver. (Autoconfig stuff and DMA functions.) 43 * The machine-independent parts are in ncr5380sbc.c 44 * 45 * Supported hardware includes: 46 * Sun SCSI-3 on OBIO (Sun3/50,Sun3/60) 47 * Sun SCSI-3 on VME (Sun3/160,Sun3/260) 48 * 49 * Could be made to support the Sun3/E if someone wanted to. 50 * 51 * Note: Both supported variants of the Sun SCSI-3 adapter have 52 * some really unusual "features" for this driver to deal with, 53 * generally related to the DMA engine. The OBIO variant will 54 * ignore any attempt to write the FIFO count register while the 55 * SCSI bus is in DATA_IN or DATA_OUT phase. This is dealt with 56 * by setting the FIFO count early in COMMAND or MSG_IN phase. 57 * 58 * The VME variant has a bit to enable or disable the DMA engine, 59 * but that bit also gates the interrupt line from the NCR5380! 60 * Therefore, in order to get any interrupt from the 5380, (i.e. 61 * for reselect) one must clear the DMA engine transfer count and 62 * then enable DMA. This has the further complication that you 63 * CAN NOT touch the NCR5380 while the DMA enable bit is set, so 64 * we have to turn DMA back off before we even look at the 5380. 65 * 66 * What wonderfully whacky hardware this is! 67 * 68 * Credits, history: 69 * 70 * David Jones wrote the initial version of this module, which 71 * included support for the VME adapter only. (no reselection). 72 * 73 * Gordon Ross added support for the OBIO adapter, and re-worked 74 * both the VME and OBIO code to support disconnect/reselect. 75 * (Required figuring out the hardware "features" noted above.) 76 * 77 * The autoconfiguration boilerplate came from Adam Glass. 78 * 79 * VS2000: 80 */ 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/kernel.h> 85 #include <sys/conf.h> 86 #include <sys/file.h> 87 #include <sys/stat.h> 88 #include <sys/ioctl.h> 89 #include <sys/buf.h> 90 #include <sys/proc.h> 91 #include <sys/user.h> 92 #include <sys/map.h> 93 #include <sys/device.h> 94 #include <sys/dkstat.h> 95 #include <sys/disklabel.h> 96 #include <sys/disk.h> 97 #include <sys/syslog.h> 98 99 /* #include <sys/errno.h> */ 100 101 #include <scsi/scsi_all.h> 102 #include <scsi/scsi_debug.h> 103 #include <scsi/scsiconf.h> 104 105 #include <machine/uvax.h> 106 #include <machine/ka410.h> 107 #include <machine/ka43.h> 108 #include <machine/vsbus.h> /* struct confargs */ 109 110 #include <dev/ic/ncr5380reg.h> 111 #include <dev/ic/ncr5380var.h> 112 113 #define trace(x) 114 #define debug(x) 115 116 #ifndef NCR5380_CSRBITS 117 #define NCR5380_CSRBITS \ 118 "\020\010DEND\007DREQ\006PERR\005IREQ\004MTCH\003DCON\002ATN\001ACK" 119 #endif 120 121 #ifndef NCR5380_BUSCSRBITS 122 #define NCR5380_BUSCSRBITS \ 123 "\020\010RST\007BSY\006REQ\005MSG\004C/D\003I/O\002SEL\001DBP" 124 #endif 125 126 #include "ncr.h" 127 128 #ifdef DDB 129 #define integrate 130 #else 131 #define integrate static 132 #endif 133 134 /* 135 * Transfers smaller than this are done using PIO 136 * (on assumption they're not worth DMA overhead) 137 */ 138 #define MIN_DMA_LEN 128 139 140 /* 141 * Transfers lager than 65535 bytes need to be split-up. 142 * (Some of the FIFO logic has only 16 bits counters.) 143 * Make the size an integer multiple of the page size 144 * to avoid buf/cluster remap problems. (paranoid?) 145 * 146 * bertram: VS2000 has an DMA-area which is 16KB, thus 147 * have a maximum DMA-size of 16KB... 148 */ 149 #ifdef DMA_SHARED 150 #define MAX_DMA_LEN 0x2000 /* (8 * 1024) */ 151 #define DMA_ADDR_HBYTE 0x20 152 #define DMA_ADDR_LBYTE 0x00 153 #else 154 #define MAX_DMA_LEN 0x4000 /* (16 * 1024) */ 155 #define DMA_ADDR_HBYTE 0x00 156 #define DMA_ADDR_LBYTE 0x00 157 #endif 158 159 #ifdef DEBUG 160 int si_debug = 3; 161 static int si_link_flags = 0 /* | SDEV_DB2 */ ; 162 #endif 163 164 /* 165 * This structure is used to keep track of mappedpwd DMA requests. 166 * Note: combined the UDC command block with this structure, so 167 * the array of these has to be in DVMA space. 168 */ 169 struct si_dma_handle { 170 int dh_flags; 171 #define SIDH_BUSY 1 /* This DH is in use */ 172 #define SIDH_OUT 2 /* DMA does data out (write) */ 173 #define SIDH_PHYS 4 174 #define SIDH_DONE 8 175 u_char * dh_addr; /* KVA of start of buffer */ 176 int dh_maplen; /* Length of KVA mapping. */ 177 u_char * dh_dvma; /* VA of buffer in DVMA space */ 178 int dh_xlen; 179 }; 180 181 /* 182 * The first structure member has to be the ncr5380_softc 183 * so we can just cast to go back and fourth between them. 184 */ 185 struct si_softc { 186 struct ncr5380_softc ncr_sc; 187 volatile struct si_regs *sc_regs; /* do we really need this? */ 188 189 struct si_dma_handle *sc_dma; 190 struct confargs *sc_cfargs; 191 192 int sc_xflags; /* ka410/ka43: resid, sizeof(areg) */ 193 194 char *sc_dbase; 195 int sc_dsize; 196 197 volatile char *sc_dareg; 198 volatile short *sc_dcreg; 199 volatile char *sc_ddreg; 200 volatile int sc_dflags; 201 202 #define VSDMA_LOCKED 0x80 /* */ 203 #define VSDMA_WANTED 0x40 /* */ 204 #define VSDMA_IWANTED 0x20 205 #define VSDMA_BLOCKED 0x10 206 #define VSDMA_DMABUSY 0x08 /* DMA in progress */ 207 #define VSDMA_REGBUSY 0x04 /* accessing registers */ 208 #define VSDMA_WRBUF 0x02 /* writing to bounce-buffer */ 209 #define VSDMA_RDBUF 0x01 /* reading from bounce-buffer */ 210 211 #define VSDMA_STATUS 0xF0 212 #define VSDMA_LCKTYPE 0x0F 213 214 #ifdef POLL_MODE 215 volatile u_char *intreq; 216 volatile u_char *intclr; 217 volatile u_char *intmsk; 218 volatile int intbit; 219 #endif 220 }; 221 222 extern int cold; /* enable polling while cold-flag set */ 223 224 /* Options. Interesting values are: 1,3,7 */ 225 int si_options = 3; /* bertram: 3 or 7 ??? */ 226 #define SI_ENABLE_DMA 1 /* Use DMA (maybe polled) */ 227 #define SI_DMA_INTR 2 /* DMA completion interrupts */ 228 #define SI_DO_RESELECT 4 /* Allow disconnect/reselect */ 229 230 #define DMA_DIR_IN 1 231 #define DMA_DIR_OUT 0 232 233 /* How long to wait for DMA before declaring an error. */ 234 int si_dma_intr_timo = 500; /* ticks (sec. X 100) */ 235 236 integrate char si_name[] = "ncr"; 237 integrate int si_match(); 238 integrate void si_attach(); 239 integrate int si_intr __P((void *)); 240 241 integrate void si_minphys __P((struct buf *bp)); 242 integrate void si_reset_adapter __P((struct ncr5380_softc *sc)); 243 244 void si_dma_alloc __P((struct ncr5380_softc *)); 245 void si_dma_free __P((struct ncr5380_softc *)); 246 void si_dma_poll __P((struct ncr5380_softc *)); 247 248 void si_intr_on __P((struct ncr5380_softc *)); 249 void si_intr_off __P((struct ncr5380_softc *)); 250 251 int si_dmaLockBus __P((struct ncr5380_softc *, int)); 252 int si_dmaToggleLock __P((struct ncr5380_softc *, int, int)); 253 int si_dmaReleaseBus __P((struct ncr5380_softc *, int)); 254 255 void si_dma_setup __P((struct ncr5380_softc *)); 256 void si_dma_start __P((struct ncr5380_softc *)); 257 void si_dma_eop __P((struct ncr5380_softc *)); 258 void si_dma_stop __P((struct ncr5380_softc *)); 259 260 static struct scsi_adapter si_ops = { 261 ncr5380_scsi_cmd, /* scsi_cmd() */ 262 si_minphys, /* scsi_minphys() */ 263 NULL, /* open_target_lu() */ 264 NULL, /* close_target_lu() */ 265 }; 266 267 /* This is copied from julian's bt driver */ 268 /* "so we have a default dev struct for our link struct." */ 269 static struct scsi_device si_dev = { 270 NULL, /* Use default error handler. */ 271 NULL, /* Use default start handler. */ 272 NULL, /* Use default async handler. */ 273 NULL, /* Use default "done" routine. */ 274 }; 275 276 277 struct cfdriver ncr_cd = { 278 NULL, si_name, DV_DULL 279 }; 280 struct cfattach ncr_ca = { 281 sizeof(struct si_softc), si_match, si_attach, 282 }; 283 284 void 285 dk_establish(p,q) 286 struct disk *p; 287 struct device *q; 288 { 289 #if 0 290 printf ("faking dk_establish()...\n"); 291 #endif 292 } 293 294 295 integrate int 296 si_match(parent, match, aux) 297 struct device *parent; 298 void *match, *aux; 299 { 300 struct cfdata *cf = match; 301 struct confargs *ca = aux; 302 303 trace(("ncr_match(0x%x, %d, %s)\n", parent, cf->cf_unit, ca->ca_name)); 304 305 if (strcmp(ca->ca_name, "ncr") && 306 strcmp(ca->ca_name, "ncr5380") && 307 strcmp(ca->ca_name, "NCR5380")) 308 return (0); 309 310 /* 311 * we just define it being there ... 312 */ 313 return (1); 314 } 315 316 integrate void 317 si_set_portid(pid,port) 318 int pid; 319 int port; 320 { 321 struct { 322 u_long :2; 323 u_long id0:3; 324 u_long id1:3; 325 u_long :26; 326 } *p; 327 328 #ifdef DEBUG 329 int *ip; 330 ip = (void*)uvax_phys2virt(KA410_SCSIPORT); 331 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 332 printf("scsi-id: (%x/%d) %d / %d\n", *ip, *ip, p->id0, p->id1); 333 #endif 334 335 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 336 switch (port) { 337 case 0: 338 p->id0 = pid; 339 printf(": scsi-id %d\n", p->id0); 340 break; 341 case 1: 342 p->id1 = pid; 343 printf(": scsi-id %d\n", p->id1); 344 break; 345 default: 346 printf("invalid port-number %d\n", port); 347 } 348 } 349 350 integrate void 351 si_attach(parent, self, aux) 352 struct device *parent, *self; 353 void *aux; 354 { 355 struct si_softc *sc = (struct si_softc *) self; 356 struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc; 357 volatile struct si_regs *regs; 358 struct confargs *ca = aux; 359 int i; 360 int *ip = aux;; 361 362 trace (("ncr_attach(0x%x, 0x%x, %s)\n", parent, self, ca->ca_name)); 363 364 /* 365 * 366 */ 367 #ifdef POLL_MODE 368 sc->intreq = (void*)uvax_phys2virt(KA410_INTREQ); 369 sc->intmsk = (void*)uvax_phys2virt(KA410_INTMSK); 370 sc->intclr = (void*)uvax_phys2virt(KA410_INTCLR); 371 sc->intbit = ca->ca_intbit; 372 #endif 373 374 sc->sc_cfargs = ca; /* needed for interrupt-setup */ 375 376 regs = (void*)uvax_phys2virt(ca->ca_ioaddr); 377 378 sc->sc_dareg = (void*)uvax_phys2virt(ca->ca_dareg); 379 sc->sc_dcreg = (void*)uvax_phys2virt(ca->ca_dcreg); 380 sc->sc_ddreg = (void*)uvax_phys2virt(ca->ca_ddreg); 381 sc->sc_dbase = (void*)uvax_phys2virt(ca->ca_dbase); 382 sc->sc_dsize = ca->ca_dsize; 383 sc->sc_dflags = 4; /* XXX */ 384 sc->sc_xflags = ca->ca_dflag; /* should/will be renamed */ 385 /* 386 * Fill in the prototype scsi_link. 387 */ 388 ncr_sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE; 389 ncr_sc->sc_link.adapter_softc = sc; 390 ncr_sc->sc_link.adapter_target = ca->ca_idval; 391 ncr_sc->sc_link.adapter = &si_ops; 392 ncr_sc->sc_link.device = &si_dev; 393 394 si_set_portid(ca->ca_idval, ncr_sc->sc_dev.dv_unit); 395 396 /* 397 * Initialize fields used by the MI code 398 */ 399 ncr_sc->sci_r0 = (void*)®s->sci.sci_r0; 400 ncr_sc->sci_r1 = (void*)®s->sci.sci_r1; 401 ncr_sc->sci_r2 = (void*)®s->sci.sci_r2; 402 ncr_sc->sci_r3 = (void*)®s->sci.sci_r3; 403 ncr_sc->sci_r4 = (void*)®s->sci.sci_r4; 404 ncr_sc->sci_r5 = (void*)®s->sci.sci_r5; 405 ncr_sc->sci_r6 = (void*)®s->sci.sci_r6; 406 ncr_sc->sci_r7 = (void*)®s->sci.sci_r7; 407 408 /* 409 * MD function pointers used by the MI code. 410 */ 411 ncr_sc->sc_pio_out = ncr5380_pio_out; 412 ncr_sc->sc_pio_in = ncr5380_pio_in; 413 ncr_sc->sc_dma_alloc = si_dma_alloc; 414 ncr_sc->sc_dma_free = si_dma_free; 415 ncr_sc->sc_dma_poll = si_dma_poll; /* si_dma_poll not used! */ 416 ncr_sc->sc_intr_on = si_intr_on; /* vsbus_unlockDMA; */ 417 ncr_sc->sc_intr_off = si_intr_off; /* vsbus_lockDMA; */ 418 419 ncr_sc->sc_dma_setup = NULL; /* si_dma_setup not used! */ 420 ncr_sc->sc_dma_start = si_dma_start; 421 ncr_sc->sc_dma_eop = NULL; 422 ncr_sc->sc_dma_stop = si_dma_stop; 423 424 ncr_sc->sc_flags = 0; 425 if (si_options & SI_DO_RESELECT) 426 ncr_sc->sc_flags |= NCR5380_PERMIT_RESELECT; 427 if ((si_options & SI_DMA_INTR) == 0) 428 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 429 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 430 431 /* 432 * Initialize fields used only here in the MD code. 433 */ 434 i = SCI_OPENINGS * sizeof(struct si_dma_handle); 435 sc->sc_dma = (struct si_dma_handle *) malloc(i); 436 if (sc->sc_dma == NULL) 437 panic("si: dvma_malloc failed\n"); 438 for (i = 0; i < SCI_OPENINGS; i++) 439 sc->sc_dma[i].dh_flags = 0; 440 441 sc->sc_regs = regs; 442 443 #ifdef DEBUG 444 if (si_debug) 445 printf("si: Set TheSoftC=%x TheRegs=%x\n", sc, regs); 446 ncr_sc->sc_link.flags |= si_link_flags; 447 #endif 448 449 /* 450 * Initialize si board itself. 451 */ 452 si_reset_adapter(ncr_sc); 453 ncr5380_init(ncr_sc); 454 ncr5380_reset_scsibus(ncr_sc); 455 config_found(self, &(ncr_sc->sc_link), scsiprint); 456 457 /* 458 * Now ready for interrupts. 459 */ 460 vsbus_intr_register(sc->sc_cfargs, si_intr, (void *)sc); 461 vsbus_intr_enable(sc->sc_cfargs); 462 } 463 464 integrate void 465 si_minphys(struct buf *bp) 466 { 467 debug(("minphys: blkno=%d, bcount=%d, data=0x%x, flags=%x\n", 468 bp->b_blkno, bp->b_bcount, bp->b_data, bp->b_flags)); 469 470 if (bp->b_bcount > MAX_DMA_LEN) { 471 #ifdef DEBUG 472 if (si_debug) { 473 printf("si_minphys len = 0x%x.\n", bp->b_bcount); 474 Debugger(); 475 } 476 #endif 477 bp->b_bcount = MAX_DMA_LEN; 478 } 479 return (minphys(bp)); 480 } 481 482 483 #define CSR_WANT (SI_CSR_SBC_IP | SI_CSR_DMA_IP | \ 484 SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR ) 485 486 static int si_intrCount = 0; 487 static int lastCSR = 0; 488 489 integrate int 490 si_intr(arg) 491 void *arg; 492 { 493 struct ncr5380_softc *ncr_sc = arg; 494 struct si_softc *sc = arg; 495 int count, claimed; 496 497 count = ++si_intrCount; 498 trace(("%s: si-intr(%d).....\n", ncr_sc->sc_dev.dv_xname, count)); 499 500 #ifdef DEBUG 501 /* 502 * Each DMA interrupt is followed by one spurious(?) interrupt. 503 * if (ncr_sc->sc_state & NCR_WORKING == 0) we know, that the 504 * interrupt was not claimed by the higher-level routine, so that 505 * it might be save to ignore these... 506 */ 507 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 508 printf("spurious(%d): %x, %d, status=%b\n", count, 509 sc->sc_dflags, ncr_sc->sc_ncmds, 510 *ncr_sc->sci_csr, NCR5380_CSRBITS); 511 } 512 #endif 513 /* 514 * If there was a DMA operation in progress, now it's no longer 515 * active, since whatever caused the interrupt also interrupted 516 * the DMA operation. Thus accessing the registers now doesn't 517 * harm anything which is not yet broken... 518 */ 519 debug(("si_intr(status: %x, dma-count: %d)\n", 520 *ncr_sc->sci_csr, *sc->sc_dcreg)); 521 522 /* 523 * First check for DMA errors / incomplete transfers 524 * If operation was read/data-in, the copy data from buffer 525 */ 526 if (ncr_sc->sc_state & NCR_DOINGDMA) { 527 struct sci_req *sr = ncr_sc->sc_current; 528 struct si_dma_handle *dh = sr->sr_dma_hand; 529 int resid, ntrans; 530 531 resid = *sc->sc_dcreg; 532 if (resid == 1 && sc->sc_xflags) { 533 debug(("correcting resid...\n")); 534 resid = 0; 535 } 536 ntrans = dh->dh_xlen + resid; 537 if (resid == 0) { 538 if ((dh->dh_flags & SIDH_OUT) == 0) { 539 si_dmaToggleLock(ncr_sc, 540 VSDMA_DMABUSY, VSDMA_RDBUF); 541 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 542 si_dmaToggleLock(ncr_sc, 543 VSDMA_RDBUF, VSDMA_DMABUSY); 544 dh->dh_flags |= SIDH_DONE; 545 } 546 } 547 else { 548 #ifdef DEBUG 549 int csr = *ncr_sc->sci_csr; 550 printf("DMA incomplete (%d/%d) status = %b\n", 551 ntrans, resid, csr, NCR5380_CSRBITS); 552 if(csr != lastCSR) { 553 int k = (csr & ~lastCSR) | (~csr & lastCSR); 554 debug(("Changed status bits: %b\n", 555 k, NCR5380_CSRBITS)); 556 lastCSR = csr & 0xFF; 557 } 558 #endif 559 printf("DMA incomplete: ntrans=%d/%d, lock=%x\n", 560 ntrans, dh->dh_xlen, sc->sc_dflags); 561 ncr_sc->sc_state |= NCR_ABORTING; 562 } 563 564 if ((sc->sc_dflags & VSDMA_BLOCKED) == 0) { 565 printf("not blocked during DMA.\n"); 566 } 567 sc->sc_dflags &= ~VSDMA_BLOCKED; 568 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 569 } 570 if ((sc->sc_dflags & VSDMA_BLOCKED) != 0) { 571 printf("blocked while not doing DMA.\n"); 572 sc->sc_dflags &= ~VSDMA_BLOCKED; 573 } 574 575 /* 576 * Now, whatever it was, let the ncr5380sbc routine handle it... 577 */ 578 claimed = ncr5380_intr(ncr_sc); 579 #ifdef DEBUG 580 if (!claimed) { 581 printf("si_intr: spurious from SBC\n"); 582 if (si_debug & 4) { 583 Debugger(); /* XXX */ 584 } 585 } 586 #endif 587 trace(("%s: si-intr(%d) done, claimed=%d\n", 588 ncr_sc->sc_dev.dv_xname, count, claimed)); 589 return (claimed); 590 } 591 592 593 integrate void 594 si_reset_adapter(struct ncr5380_softc *ncr_sc) 595 { 596 struct si_softc *sc = (struct si_softc *)ncr_sc; 597 volatile struct si_regs *si = sc->sc_regs; 598 599 #ifdef DEBUG 600 if (si_debug) { 601 printf("si_reset_adapter\n"); 602 } 603 #endif 604 SCI_CLR_INTR(ncr_sc); 605 } 606 607 608 /***************************************************************** 609 * Common functions for DMA 610 ****************************************************************/ 611 612 /* 613 * Allocate a DMA handle and put it in sc->sc_dma. Prepare 614 * for DMA transfer. On the Sun3, this means mapping the buffer 615 * into DVMA space. dvma_mapin() flushes the cache for us. 616 */ 617 void 618 si_dma_alloc(ncr_sc) 619 struct ncr5380_softc *ncr_sc; 620 { 621 struct si_softc *sc = (struct si_softc *)ncr_sc; 622 struct sci_req *sr = ncr_sc->sc_current; 623 struct scsi_xfer *xs = sr->sr_xs; 624 struct buf *bp = sr->sr_xs->bp; 625 struct si_dma_handle *dh; 626 int i, xlen; 627 u_long addr; 628 629 trace (("si_dma_alloc()\n")); 630 631 #ifdef DIAGNOSTIC 632 if (sr->sr_dma_hand != NULL) 633 panic("si_dma_alloc: already have DMA handle"); 634 #endif 635 636 addr = (u_long) ncr_sc->sc_dataptr; 637 debug(("addr=%x, dataptr=%x\n", addr, ncr_sc->sc_dataptr)); 638 xlen = ncr_sc->sc_datalen; 639 640 /* Make sure our caller checked sc_min_dma_len. */ 641 if (xlen < MIN_DMA_LEN) 642 panic("si_dma_alloc: xlen=0x%x\n", xlen); 643 644 /* 645 * Never attempt single transfers of more than 63k, because 646 * our count register may be only 16 bits (an OBIO adapter). 647 * This should never happen since already bounded by minphys(). 648 * XXX - Should just segment these... 649 */ 650 if (xlen > MAX_DMA_LEN) { 651 printf("si_dma_alloc: excessive xlen=0x%x\n", xlen); 652 Debugger(); 653 ncr_sc->sc_datalen = xlen = MAX_DMA_LEN; 654 } 655 656 /* Find free DMA handle. Guaranteed to find one since we have 657 as many DMA handles as the driver has processes. */ 658 for (i = 0; i < SCI_OPENINGS; i++) { 659 if ((sc->sc_dma[i].dh_flags & SIDH_BUSY) == 0) 660 goto found; 661 } 662 panic("si: no free DMA handles."); 663 found: 664 665 dh = &sc->sc_dma[i]; 666 dh->dh_flags = SIDH_BUSY; 667 dh->dh_addr = (u_char*) addr; 668 dh->dh_maplen = xlen; 669 dh->dh_xlen = xlen; 670 dh->dh_dvma = 0; 671 672 /* Copy the "write" flag for convenience. */ 673 if (xs->flags & SCSI_DATA_OUT) 674 dh->dh_flags |= SIDH_OUT; 675 676 #if 1 677 /* 678 * If the buffer has the flag B_PHYS, the the address specified 679 * in the buffer is a user-space address and we need to remap 680 * this address into kernel space so that using this buffer 681 * within the interrupt routine will work. 682 * If it's already a kernel space address, we need to make sure 683 * that all pages are in-core. the mapin() routine takes care 684 * of that. 685 */ 686 if (bp && (bp->b_flags & B_PHYS)) 687 dh->dh_flags |= SIDH_PHYS; 688 #endif 689 690 if (!bp) { 691 printf("ncr.c: struct buf *bp is null-pointer.\n"); 692 dh->dh_flags = 0; 693 return; 694 } 695 if (bp->b_bcount < 0 || bp->b_bcount > MAX_DMA_LEN) { 696 printf("ncr.c: invalid bcount %d (0x%x)\n", 697 bp->b_bcount, bp->b_bcount); 698 dh->dh_flags = 0; 699 return; 700 } 701 dh->dh_dvma = bp->b_data; 702 #if 0 703 /* 704 * mapping of user-space addresses is no longer neccessary, now 705 * that the vmapbuf/vunmapbuf routines exist. Now the higher-level 706 * driver already cares for the mapping! 707 */ 708 if (bp->b_flags & B_PHYS) { 709 xdebug(("not mapping in... %x/%x %x\n", bp->b_saveaddr, 710 bp->b_data, bp->b_bcount)); 711 #ifdef USE_VMAPBUF 712 dh->dh_addr = bp->b_data; 713 dh->dh_maplen = bp->b_bcount; 714 vmapbuf(bp, bp->b_bcount); 715 dh->dh_dvma = bp->b_data; 716 #else 717 dh->dh_dvma = (u_char*)vsdma_mapin(bp); 718 #endif 719 xdebug(("addr %x, maplen %d, dvma %x, bcount %d, dir %s\n", 720 dh->dh_addr, dh->dh_maplen, dh->dh_dvma, bp->b_bcount, 721 (dh->dh_flags & SIDH_OUT ? "OUT" : "IN"))); 722 } 723 #endif 724 /* success */ 725 sr->sr_dma_hand = dh; 726 727 return; 728 } 729 730 731 void 732 si_dma_free(ncr_sc) 733 struct ncr5380_softc *ncr_sc; 734 { 735 struct si_softc *sc = (struct si_softc *)ncr_sc; 736 struct sci_req *sr = ncr_sc->sc_current; 737 struct scsi_xfer *xs = sr->sr_xs; 738 struct buf *bp = sr->sr_xs->bp; 739 struct si_dma_handle *dh = sr->sr_dma_hand; 740 741 trace (("si_dma_free()\n")); 742 743 #ifdef DIAGNOSTIC 744 if (dh == NULL) 745 panic("si_dma_free: no DMA handle"); 746 #endif 747 748 if (ncr_sc->sc_state & NCR_DOINGDMA) 749 panic("si_dma_free: free while in progress"); 750 751 if (dh->dh_flags & SIDH_BUSY) { 752 #if 0 753 debug(("bp->b_flags=0x%x\n", bp->b_flags)); 754 if (bp->b_flags & B_PHYS) { 755 #ifdef USE_VMAPBUF 756 printf("not unmapping(%x/%x %x/%x %d/%d)...\n", 757 dh->dh_addr, dh->dh_dvma, 758 bp->b_saveaddr, bp->b_data, 759 bp->b_bcount, dh->dh_maplen); 760 /* vunmapbuf(bp, dh->dh_maplen); */ 761 printf("done.\n"); 762 #endif 763 dh->dh_dvma = 0; 764 } 765 #endif 766 dh->dh_flags = 0; 767 } 768 sr->sr_dma_hand = NULL; 769 } 770 771 772 /* 773 * REGBUSY and DMABUSY won't collide since the higher-level driver 774 * issues intr_on/intr_off before/after doing DMA. The only problem 775 * is to handle RDBUF/WRBUF wrt REGBUSY/DMABUSY 776 * 777 * There might be race-conditions, but for now we don't care for them... 778 */ 779 int 780 si_dmaLockBus(ncr_sc, lt) 781 struct ncr5380_softc *ncr_sc; 782 int lt; /* Lock-Type */ 783 { 784 struct si_softc *sc = (void*)ncr_sc; 785 int timeout = 200; /* wait .2 seconds max. */ 786 787 trace(("si_dmaLockBus(%x), cold: %d, current: %x\n", 788 lt, cold, sc->sc_dflags)); 789 790 #ifdef POLL_MODE 791 if (cold) 792 return (0); 793 #endif 794 795 if ((ncr_sc->sc_current != NULL) && (lt == VSDMA_REGBUSY)) { 796 printf("trying to use regs while sc_current is set.\n"); 797 printf("lt=%x, fl=%x, cur=%x\n", 798 lt, sc->sc_dflags, ncr_sc->sc_current); 799 } 800 if ((ncr_sc->sc_current == NULL) && (lt != VSDMA_REGBUSY)) { 801 printf("trying to use/prepare DMA without current.\n"); 802 printf("lt=%x, fl=%x, cur=%x\n", 803 lt, sc->sc_dflags, ncr_sc->sc_current); 804 } 805 806 if ((sc->sc_dflags & VSDMA_LOCKED) == 0) { 807 struct si_softc *sc = (struct si_softc *)ncr_sc; 808 sc->sc_dflags |= VSDMA_WANTED; 809 vsbus_lockDMA(sc->sc_cfargs); 810 sc->sc_dflags = VSDMA_LOCKED | lt; 811 return (0); 812 } 813 814 #if 1 815 while ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 816 debug(("busy wait(1)...\n")); 817 if (--timeout == 0) { 818 printf("timeout in busy-wait(%x %x)\n", 819 lt, sc->sc_dflags); 820 sc->sc_dflags &= ~VSDMA_LCKTYPE; 821 break; 822 } 823 delay(1000); 824 } 825 debug(("busy wait(1) done.\n")); 826 sc->sc_dflags |= lt; 827 828 #else 829 if ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 830 switch (lt) { 831 832 case VSDMA_RDBUF: 833 /* sc->sc_dflags |= VSDMA_IWANTED; */ 834 debug(("busy wait(1)...\n")); 835 while (sc->sc_dflags & 836 (VSDMA_WRBUF | VSDMA_DMABUSY)) { 837 if (--timeout == 0) { 838 printf("timeout in busy-wait(1)\n"); 839 sc->sc_dflags &= ~VSDMA_WRBUF; 840 sc->sc_dflags &= ~VSDMA_DMABUSY; 841 } 842 delay(1000); 843 } 844 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 845 debug(("busy wait(1) done.\n")); 846 sc->sc_dflags |= lt; 847 break; 848 849 case VSDMA_WRBUF: 850 /* sc->sc_dflags |= VSDMA_IWANTED; */ 851 debug(("busy wait(2)...\n")); 852 while (sc->sc_dflags & 853 (VSDMA_RDBUF | VSDMA_DMABUSY)) { 854 if (--timeout == 0) { 855 printf("timeout in busy-wait(2)\n"); 856 sc->sc_dflags &= ~VSDMA_RDBUF; 857 sc->sc_dflags &= ~VSDMA_DMABUSY; 858 } 859 delay(1000); 860 } 861 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 862 debug(("busy wait(2) done.\n")); 863 sc->sc_dflags |= lt; 864 break; 865 866 case VSDMA_DMABUSY: 867 /* sc->sc_dflags |= VSDMA_IWANTED; */ 868 debug(("busy wait(3)...\n")); 869 while (sc->sc_dflags & 870 (VSDMA_RDBUF | VSDMA_WRBUF)) { 871 if (--timeout == 0) { 872 printf("timeout in busy-wait(3)\n"); 873 sc->sc_dflags &= ~VSDMA_RDBUF; 874 sc->sc_dflags &= ~VSDMA_WRBUF; 875 } 876 delay(1000); 877 } 878 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 879 debug(("busy wait(3) done.\n")); 880 sc->sc_dflags |= lt; 881 break; 882 883 case VSDMA_REGBUSY: 884 /* sc->sc_dflags |= VSDMA_IWANTED; */ 885 debug(("busy wait(4)...\n")); 886 while (sc->sc_dflags & 887 (VSDMA_RDBUF | VSDMA_WRBUF | VSDMA_DMABUSY)) { 888 if (--timeout == 0) { 889 printf("timeout in busy-wait(4)\n"); 890 sc->sc_dflags &= ~VSDMA_RDBUF; 891 sc->sc_dflags &= ~VSDMA_WRBUF; 892 sc->sc_dflags &= ~VSDMA_DMABUSY; 893 } 894 delay(1000); 895 } 896 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 897 debug(("busy wait(4) done.\n")); 898 sc->sc_dflags |= lt; 899 break; 900 901 default: 902 printf("illegal lockType %x in si_dmaLockBus()\n"); 903 } 904 } 905 else 906 printf("already locked. (%x/%x)\n", lt, sc->sc_dflags); 907 #endif 908 if (sc->sc_dflags & lt) /* successfully locked for this type */ 909 return (0); 910 911 printf("spurious %x in si_dmaLockBus(%x)\n", lt, sc->sc_dflags); 912 } 913 914 /* 915 * the lock of this type is no longer needed. If all (internal) locks are 916 * released, release the DMA bus. 917 */ 918 int 919 si_dmaReleaseBus(ncr_sc, lt) 920 struct ncr5380_softc *ncr_sc; 921 int lt; /* Lock-Type */ 922 { 923 struct si_softc *sc = (void*)ncr_sc; 924 925 trace(("si_dmaReleaseBus(%x), cold: %d, current: %x\n", 926 lt, cold, sc->sc_dflags)); 927 928 #ifdef POLL_MODE 929 if (cold) 930 return (0); 931 #endif 932 933 if ((sc->sc_dflags & VSDMA_LCKTYPE) == lt) { 934 sc->sc_dflags &= ~lt; 935 } 936 else 937 printf("trying to release %x while flags = %x\n", lt, 938 sc->sc_dflags); 939 940 if (sc->sc_dflags == VSDMA_LOCKED) { /* no longer needed */ 941 struct si_softc *sc = (struct si_softc *)ncr_sc; 942 vsbus_unlockDMA(sc->sc_cfargs); 943 sc->sc_dflags = 0; 944 return (0); 945 } 946 } 947 948 /* 949 * Just toggle the type of lock without releasing the lock... 950 * This is usually needed before/after bcopy() to/from DMA-buffer 951 */ 952 int 953 si_dmaToggleLock(ncr_sc, lt1, lt2) 954 struct ncr5380_softc *ncr_sc; 955 int lt1, lt2; /* Lock-Type */ 956 { 957 struct si_softc *sc = (void*)ncr_sc; 958 959 #ifdef POLL_MODE 960 if (cold) 961 return (0); 962 #endif 963 964 if (((sc->sc_dflags & lt1) != 0) && 965 ((sc->sc_dflags & lt2) == 0)) { 966 sc->sc_dflags |= lt2; 967 sc->sc_dflags &= ~lt1; 968 return (0); 969 } 970 printf("cannot toggle locking from %x to %x (current = %x)\n", 971 lt1, lt2, sc->sc_dflags); 972 } 973 974 /* 975 * This is called when the bus is going idle, 976 * so we want to enable the SBC interrupts. 977 * That is controlled by the DMA enable! 978 * Who would have guessed! 979 * What a NASTY trick! 980 */ 981 void 982 si_intr_on(ncr_sc) 983 struct ncr5380_softc *ncr_sc; 984 { 985 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 986 } 987 988 /* 989 * This is called when the bus is idle and we are 990 * about to start playing with the SBC chip. 991 * 992 * VS2000 note: we have four kinds of access which are mutually exclusive: 993 * - access to the NCR5380 registers 994 * - access to the HDC9224 registers 995 * - access to the DMA area 996 * - doing DMA 997 */ 998 void 999 si_intr_off(ncr_sc) 1000 struct ncr5380_softc *ncr_sc; 1001 { 1002 si_dmaLockBus(ncr_sc, VSDMA_REGBUSY); 1003 } 1004 1005 /***************************************************************** 1006 * VME functions for DMA 1007 ****************************************************************/ 1008 1009 1010 /* 1011 * This function is called during the COMMAND or MSG_IN phase 1012 * that preceeds a DATA_IN or DATA_OUT phase, in case we need 1013 * to setup the DMA engine before the bus enters a DATA phase. 1014 * 1015 * XXX: The VME adapter appears to suppress SBC interrupts 1016 * when the FIFO is not empty or the FIFO count is non-zero! 1017 * 1018 * On the VME version we just clear the DMA count and address 1019 * here (to make sure it stays idle) and do the real setup 1020 * later, in dma_start. 1021 */ 1022 void 1023 si_dma_setup(ncr_sc) 1024 struct ncr5380_softc *ncr_sc; 1025 { 1026 trace (("si_dma_setup(ncr_sc) !!!\n")); 1027 1028 /* 1029 * VS2000: nothing to do ... 1030 */ 1031 } 1032 1033 1034 void 1035 si_dma_start(ncr_sc) 1036 struct ncr5380_softc *ncr_sc; 1037 { 1038 struct si_softc *sc = (struct si_softc *)ncr_sc; 1039 struct sci_req *sr = ncr_sc->sc_current; 1040 struct si_dma_handle *dh = sr->sr_dma_hand; 1041 volatile struct si_regs *si = sc->sc_regs; 1042 long data_pa; 1043 int xlen; 1044 1045 trace(("si_dma_start(%x)\n", sr->sr_dma_hand)); 1046 1047 /* 1048 * we always transfer from/to base of DMA-area, 1049 * thus the DMA-address is always the same, only size 1050 * and direction matter/differ on VS2000 1051 */ 1052 1053 debug(("ncr_sc->sc_datalen = %d\n", ncr_sc->sc_datalen)); 1054 xlen = ncr_sc->sc_datalen; 1055 dh->dh_xlen = xlen; 1056 1057 /* 1058 * VS2000 has a fixed 16KB-area where DMA is restricted to. 1059 * All DMA-addresses are relative to this base: KA410_DMA_BASE 1060 * Thus we need to copy the data into this area when writing, 1061 * or copy from this area when reading. (kind of bounce-buffer) 1062 */ 1063 1064 /* Set direction (send/recv) */ 1065 if (dh->dh_flags & SIDH_OUT) { 1066 /* 1067 * We know that we are called while intr_off (regs locked) 1068 * thus we toggle the lock from REGBUSY to WRBUF 1069 * also we set the BLOCKIT flag, so that the locking of 1070 * the DMA bus won't be released to the HDC9224... 1071 */ 1072 debug(("preparing msg-out (bcopy)\n")); 1073 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_WRBUF); 1074 bcopy(dh->dh_dvma, sc->sc_dbase, xlen); 1075 si_dmaToggleLock(ncr_sc, VSDMA_WRBUF, VSDMA_REGBUSY); 1076 *sc->sc_ddreg = DMA_DIR_OUT; 1077 } 1078 else { 1079 debug(("preparing data-in (bzero)\n")); 1080 /* bzero(sc->sc_dbase, xlen); */ 1081 *sc->sc_ddreg = DMA_DIR_IN; 1082 } 1083 sc->sc_dflags |= VSDMA_BLOCKED; 1084 1085 *sc->sc_dareg = DMA_ADDR_HBYTE; /* high byte (6 bits) */ 1086 *sc->sc_dareg = DMA_ADDR_LBYTE; /* low byte */ 1087 *sc->sc_dcreg = 0 - xlen; /* bertram XXX */ 1088 1089 #ifdef DEBUG 1090 if (si_debug & 2) { 1091 printf("si_dma_start: dh=0x%x, pa=0x%x, xlen=%d, creg=0x%x\n", 1092 dh, data_pa, xlen, *sc->sc_dcreg); 1093 } 1094 #endif 1095 1096 #ifdef POLL_MODE 1097 debug(("dma_start: cold=%d\n", cold)); 1098 if (cold) { 1099 *sc->intmsk &= ~sc->intbit; 1100 *sc->intclr = sc->intbit; 1101 } 1102 else 1103 *sc->intmsk |= sc->intbit; 1104 #endif 1105 /* 1106 * Acknowledge the phase change. (After DMA setup!) 1107 * Put the SBIC into DMA mode, and start the transfer. 1108 */ 1109 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_DMABUSY); 1110 if (dh->dh_flags & SIDH_OUT) { 1111 *ncr_sc->sci_tcmd = PHASE_DATA_OUT; 1112 SCI_CLR_INTR(ncr_sc); 1113 *ncr_sc->sci_icmd = SCI_ICMD_DATA; 1114 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1115 *ncr_sc->sci_dma_send = 0; /* start it */ 1116 } else { 1117 *ncr_sc->sci_tcmd = PHASE_DATA_IN; 1118 SCI_CLR_INTR(ncr_sc); 1119 *ncr_sc->sci_icmd = 0; 1120 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1121 *ncr_sc->sci_irecv = 0; /* start it */ 1122 } 1123 ncr_sc->sc_state |= NCR_DOINGDMA; 1124 /* 1125 * having a delay (eg. printf) here, seems to solve the problem. 1126 * Isn't that strange ???? 1127 * Maybe the higher-level driver accesses one of the registers of 1128 * the controller while DMA is in progress. Having a long enough 1129 * delay here might prevent/delay this access until DMA bus is 1130 * free again... 1131 * 1132 * The instruction ++++ printf("DMA started.\n"); ++++ 1133 * is long/slow enough, to make the SSCI driver work. Thus we 1134 * try to find a delay() long/slow enough to do the same. The 1135 * argument to this delay is relative to the transfer-count. 1136 */ 1137 delay(3*xlen/4); /* XXX solve this problem!!! XXX */ 1138 1139 #ifdef DEBUG 1140 if (si_debug & 2) { 1141 printf("si_dma_start: started, flags=0x%x\n", 1142 ncr_sc->sc_state); 1143 } 1144 #endif 1145 } 1146 1147 1148 void 1149 si_vme_dma_eop(ncr_sc) 1150 struct ncr5380_softc *ncr_sc; 1151 { 1152 trace (("si_vme_dma_eop() !!!\n")); 1153 /* Not needed - DMA was stopped prior to examining sci_csr */ 1154 } 1155 1156 /* 1157 * si_dma_stop() has now become almost a nop-routine, since DMA-buffer 1158 * has already been read within si_intr(), so there's nothing left to do. 1159 */ 1160 void 1161 si_dma_stop(ncr_sc) 1162 struct ncr5380_softc *ncr_sc; 1163 { 1164 struct si_softc *sc = (struct si_softc *)ncr_sc; 1165 struct sci_req *sr = ncr_sc->sc_current; 1166 struct si_dma_handle *dh = sr->sr_dma_hand; 1167 volatile struct si_regs *si = sc->sc_regs; 1168 int resid, ntrans; 1169 1170 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 1171 #ifdef DEBUG 1172 printf("si_dma_stop: dma not running\n"); 1173 #endif 1174 return; 1175 } 1176 ncr_sc->sc_state &= ~NCR_DOINGDMA; 1177 1178 /* Note that timeout may have set the error flag. */ 1179 if (ncr_sc->sc_state & NCR_ABORTING) { 1180 printf("si_dma_stop: timeout?\n"); 1181 goto out; 1182 } 1183 1184 /* 1185 * Now try to figure out how much actually transferred 1186 */ 1187 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1188 si_dmaToggleLock(ncr_sc, VSDMA_DMABUSY, VSDMA_REGBUSY); 1189 resid = *sc->sc_dcreg; 1190 /* 1191 * XXX: don't correct at two places !!! 1192 */ 1193 if (resid == 1 && sc->sc_xflags) { 1194 resid = 0; 1195 } 1196 ntrans = dh->dh_xlen + resid; 1197 if (resid != 0) 1198 printf("resid=%d, xlen=%d, ntrans=%d\n", 1199 resid, dh->dh_xlen, ntrans); 1200 1201 #ifdef DEBUG 1202 if (si_debug & 2) { 1203 printf("si_dma_stop: resid=0x%x ntrans=0x%x\n", 1204 resid, ntrans); 1205 } 1206 #endif 1207 1208 if (ntrans < MIN_DMA_LEN) { 1209 printf("si: fifo count: 0x%x\n", resid); 1210 ncr_sc->sc_state |= NCR_ABORTING; 1211 goto out; 1212 } 1213 if (ntrans > ncr_sc->sc_datalen) 1214 panic("si_dma_stop: excess transfer"); 1215 1216 /* 1217 * On VS2000 in case of a READ-operation, we must now copy 1218 * the buffer-contents to the destination-address! 1219 */ 1220 if ((dh->dh_flags & SIDH_OUT) == 0 && 1221 (dh->dh_flags & SIDH_DONE) == 0) { 1222 printf("DMA buffer not yet copied.\n"); 1223 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_RDBUF); 1224 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 1225 si_dmaToggleLock(ncr_sc, VSDMA_RDBUF, VSDMA_REGBUSY); 1226 } 1227 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 1228 1229 /* Adjust data pointer */ 1230 ncr_sc->sc_dataptr += ntrans; 1231 ncr_sc->sc_datalen -= ntrans; 1232 1233 out: 1234 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1235 1236 /* Put SBIC back in PIO mode. */ 1237 *ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE); 1238 *ncr_sc->sci_icmd = 0; 1239 1240 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 1241 } 1242 1243 /* 1244 * Poll (spin-wait) for DMA completion. 1245 * Called right after xx_dma_start(), and 1246 * xx_dma_stop() will be called next. 1247 */ 1248 void 1249 si_dma_poll(ncr_sc) 1250 struct ncr5380_softc *ncr_sc; 1251 { 1252 struct si_softc *sc = (struct si_softc *)ncr_sc; 1253 struct sci_req *sr = ncr_sc->sc_current; 1254 struct si_dma_handle *dh = sr->sr_dma_hand; 1255 int i, timeout; 1256 1257 if (! cold) 1258 printf("spurious call of DMA-poll ???"); 1259 1260 #ifdef POLL_MODE 1261 1262 delay(10000); 1263 trace(("si_dma_poll(%x)\n", *sc->sc_dcreg)); 1264 1265 /* 1266 * interrupt-request has been cleared by dma_start, thus 1267 * we do nothing else but wait for the intreq to reappear... 1268 */ 1269 1270 timeout = 5000; 1271 for (i=0; i<timeout; i++) { 1272 if (*sc->intreq & sc->intbit) 1273 break; 1274 delay(100); 1275 } 1276 if ((*sc->intreq & sc->intbit) == 0) { 1277 printf("si: DMA timeout (while polling)\n"); 1278 /* Indicate timeout as MI code would. */ 1279 sr->sr_flags |= SR_OVERDUE; 1280 } 1281 #endif 1282 return; 1283 } 1284
Indexes created Tue Sep 30 20:09:53 GMT 2025