ncr.c revision 1.9
1 /* $NetBSD: ncr.c,v 1.9 1997/08/27 11:24:34 bouyer Exp $ */ 2 3 /* #define DEBUG /* */ 4 /* #define TRACE /* */ 5 /* #define POLL_MODE /* */ 6 #define USE_VMAPBUF 7 8 /* 9 * Copyright (c) 1995 David Jones, Gordon W. Ross 10 * Copyright (c) 1994 Adam Glass 11 * All rights reserved. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. The name of the authors may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 4. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by 26 * Adam Glass, David Jones, and Gordon Ross 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 29 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 30 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 33 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 37 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * This file contains only the machine-dependent parts of the 42 * Sun3 SCSI driver. (Autoconfig stuff and DMA functions.) 43 * The machine-independent parts are in ncr5380sbc.c 44 * 45 * Supported hardware includes: 46 * Sun SCSI-3 on OBIO (Sun3/50,Sun3/60) 47 * Sun SCSI-3 on VME (Sun3/160,Sun3/260) 48 * 49 * Could be made to support the Sun3/E if someone wanted to. 50 * 51 * Note: Both supported variants of the Sun SCSI-3 adapter have 52 * some really unusual "features" for this driver to deal with, 53 * generally related to the DMA engine. The OBIO variant will 54 * ignore any attempt to write the FIFO count register while the 55 * SCSI bus is in DATA_IN or DATA_OUT phase. This is dealt with 56 * by setting the FIFO count early in COMMAND or MSG_IN phase. 57 * 58 * The VME variant has a bit to enable or disable the DMA engine, 59 * but that bit also gates the interrupt line from the NCR5380! 60 * Therefore, in order to get any interrupt from the 5380, (i.e. 61 * for reselect) one must clear the DMA engine transfer count and 62 * then enable DMA. This has the further complication that you 63 * CAN NOT touch the NCR5380 while the DMA enable bit is set, so 64 * we have to turn DMA back off before we even look at the 5380. 65 * 66 * What wonderfully whacky hardware this is! 67 * 68 * Credits, history: 69 * 70 * David Jones wrote the initial version of this module, which 71 * included support for the VME adapter only. (no reselection). 72 * 73 * Gordon Ross added support for the OBIO adapter, and re-worked 74 * both the VME and OBIO code to support disconnect/reselect. 75 * (Required figuring out the hardware "features" noted above.) 76 * 77 * The autoconfiguration boilerplate came from Adam Glass. 78 * 79 * VS2000: 80 */ 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/kernel.h> 85 #include <sys/conf.h> 86 #include <sys/file.h> 87 #include <sys/stat.h> 88 #include <sys/ioctl.h> 89 #include <sys/buf.h> 90 #include <sys/proc.h> 91 #include <sys/user.h> 92 #include <sys/map.h> 93 #include <sys/device.h> 94 #include <sys/dkstat.h> 95 #include <sys/disklabel.h> 96 #include <sys/disk.h> 97 #include <sys/syslog.h> 98 99 /* #include <sys/errno.h> */ 100 101 #include <dev/scsipi/scsi_all.h> 102 #include <dev/scsipi/scsipi_all.h> 103 #include <dev/scsipi/scsipi_debug.h> 104 #include <dev/scsipi/scsiconf.h> 105 106 #include <machine/uvax.h> 107 #include <machine/ka410.h> 108 #include <machine/ka43.h> 109 #include <machine/vsbus.h> /* struct confargs */ 110 111 #include <dev/ic/ncr5380reg.h> 112 #include <dev/ic/ncr5380var.h> 113 114 #define trace(x) 115 #define debug(x) 116 117 #ifndef NCR5380_CSRBITS 118 #define NCR5380_CSRBITS \ 119 "\020\010DEND\007DREQ\006PERR\005IREQ\004MTCH\003DCON\002ATN\001ACK" 120 #endif 121 122 #ifndef NCR5380_BUSCSRBITS 123 #define NCR5380_BUSCSRBITS \ 124 "\020\010RST\007BSY\006REQ\005MSG\004C/D\003I/O\002SEL\001DBP" 125 #endif 126 127 #include "ncr.h" 128 129 #ifdef DDB 130 #define integrate 131 #else 132 #define integrate static 133 #endif 134 135 /* 136 * Transfers smaller than this are done using PIO 137 * (on assumption they're not worth DMA overhead) 138 */ 139 #define MIN_DMA_LEN 128 140 141 /* 142 * Transfers lager than 65535 bytes need to be split-up. 143 * (Some of the FIFO logic has only 16 bits counters.) 144 * Make the size an integer multiple of the page size 145 * to avoid buf/cluster remap problems. (paranoid?) 146 * 147 * bertram: VS2000 has an DMA-area which is 16KB, thus 148 * have a maximum DMA-size of 16KB... 149 */ 150 #ifdef DMA_SHARED 151 #define MAX_DMA_LEN 0x2000 /* (8 * 1024) */ 152 #define DMA_ADDR_HBYTE 0x20 153 #define DMA_ADDR_LBYTE 0x00 154 #else 155 #define MAX_DMA_LEN 0x4000 /* (16 * 1024) */ 156 #define DMA_ADDR_HBYTE 0x00 157 #define DMA_ADDR_LBYTE 0x00 158 #endif 159 160 #ifdef DEBUG 161 int si_debug = 3; 162 static int si_link_flags = 0 /* | SDEV_DB2 */ ; 163 #endif 164 165 /* 166 * This structure is used to keep track of mappedpwd DMA requests. 167 * Note: combined the UDC command block with this structure, so 168 * the array of these has to be in DVMA space. 169 */ 170 struct si_dma_handle { 171 int dh_flags; 172 #define SIDH_BUSY 1 /* This DH is in use */ 173 #define SIDH_OUT 2 /* DMA does data out (write) */ 174 #define SIDH_PHYS 4 175 #define SIDH_DONE 8 176 u_char * dh_addr; /* KVA of start of buffer */ 177 int dh_maplen; /* Length of KVA mapping. */ 178 u_char * dh_dvma; /* VA of buffer in DVMA space */ 179 int dh_xlen; 180 }; 181 182 /* 183 * The first structure member has to be the ncr5380_softc 184 * so we can just cast to go back and fourth between them. 185 */ 186 struct si_softc { 187 struct ncr5380_softc ncr_sc; 188 volatile struct si_regs *sc_regs; /* do we really need this? */ 189 190 struct si_dma_handle *sc_dma; 191 struct confargs *sc_cfargs; 192 193 int sc_xflags; /* ka410/ka43: resid, sizeof(areg) */ 194 195 char *sc_dbase; 196 int sc_dsize; 197 198 volatile char *sc_dareg; 199 volatile short *sc_dcreg; 200 volatile char *sc_ddreg; 201 volatile int sc_dflags; 202 203 #define VSDMA_LOCKED 0x80 /* */ 204 #define VSDMA_WANTED 0x40 /* */ 205 #define VSDMA_IWANTED 0x20 206 #define VSDMA_BLOCKED 0x10 207 #define VSDMA_DMABUSY 0x08 /* DMA in progress */ 208 #define VSDMA_REGBUSY 0x04 /* accessing registers */ 209 #define VSDMA_WRBUF 0x02 /* writing to bounce-buffer */ 210 #define VSDMA_RDBUF 0x01 /* reading from bounce-buffer */ 211 212 #define VSDMA_STATUS 0xF0 213 #define VSDMA_LCKTYPE 0x0F 214 215 #ifdef POLL_MODE 216 volatile u_char *intreq; 217 volatile u_char *intclr; 218 volatile u_char *intmsk; 219 volatile int intbit; 220 #endif 221 }; 222 223 extern int cold; /* enable polling while cold-flag set */ 224 225 /* Options. Interesting values are: 1,3,7 */ 226 int si_options = 3; /* bertram: 3 or 7 ??? */ 227 #define SI_ENABLE_DMA 1 /* Use DMA (maybe polled) */ 228 #define SI_DMA_INTR 2 /* DMA completion interrupts */ 229 #define SI_DO_RESELECT 4 /* Allow disconnect/reselect */ 230 231 #define DMA_DIR_IN 1 232 #define DMA_DIR_OUT 0 233 234 /* How long to wait for DMA before declaring an error. */ 235 int si_dma_intr_timo = 500; /* ticks (sec. X 100) */ 236 237 integrate char si_name[] = "ncr"; 238 integrate int si_match(); 239 integrate void si_attach(); 240 integrate int si_intr __P((void *)); 241 242 integrate void si_minphys __P((struct buf *bp)); 243 integrate void si_reset_adapter __P((struct ncr5380_softc *sc)); 244 245 void si_dma_alloc __P((struct ncr5380_softc *)); 246 void si_dma_free __P((struct ncr5380_softc *)); 247 void si_dma_poll __P((struct ncr5380_softc *)); 248 249 void si_intr_on __P((struct ncr5380_softc *)); 250 void si_intr_off __P((struct ncr5380_softc *)); 251 252 int si_dmaLockBus __P((struct ncr5380_softc *, int)); 253 int si_dmaToggleLock __P((struct ncr5380_softc *, int, int)); 254 int si_dmaReleaseBus __P((struct ncr5380_softc *, int)); 255 256 void si_dma_setup __P((struct ncr5380_softc *)); 257 void si_dma_start __P((struct ncr5380_softc *)); 258 void si_dma_eop __P((struct ncr5380_softc *)); 259 void si_dma_stop __P((struct ncr5380_softc *)); 260 261 static struct scsipi_adapter si_ops = { 262 ncr5380_scsi_cmd, /* scsi_cmd() */ 263 si_minphys, /* scsi_minphys() */ 264 NULL, /* open_target_lu() */ 265 NULL, /* close_target_lu() */ 266 }; 267 268 /* This is copied from julian's bt driver */ 269 /* "so we have a default dev struct for our link struct." */ 270 static struct scsipi_device si_dev = { 271 NULL, /* Use default error handler. */ 272 NULL, /* Use default start handler. */ 273 NULL, /* Use default async handler. */ 274 NULL, /* Use default "done" routine. */ 275 }; 276 277 278 struct cfdriver ncr_cd = { 279 NULL, si_name, DV_DULL 280 }; 281 struct cfattach ncr_ca = { 282 sizeof(struct si_softc), si_match, si_attach, 283 }; 284 285 void 286 dk_establish(p,q) 287 struct disk *p; 288 struct device *q; 289 { 290 #if 0 291 printf ("faking dk_establish()...\n"); 292 #endif 293 } 294 295 296 integrate int 297 si_match(parent, match, aux) 298 struct device *parent; 299 void *match, *aux; 300 { 301 struct cfdata *cf = match; 302 struct confargs *ca = aux; 303 304 trace(("ncr_match(0x%x, %d, %s)\n", parent, cf->cf_unit, ca->ca_name)); 305 306 if (strcmp(ca->ca_name, "ncr") && 307 strcmp(ca->ca_name, "ncr5380") && 308 strcmp(ca->ca_name, "NCR5380")) 309 return (0); 310 311 /* 312 * we just define it being there ... 313 */ 314 return (1); 315 } 316 317 integrate void 318 si_set_portid(pid,port) 319 int pid; 320 int port; 321 { 322 struct { 323 u_long :2; 324 u_long id0:3; 325 u_long id1:3; 326 u_long :26; 327 } *p; 328 329 #ifdef DEBUG 330 int *ip; 331 ip = (void*)uvax_phys2virt(KA410_SCSIPORT); 332 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 333 printf("scsi-id: (%x/%d) %d / %d\n", *ip, *ip, p->id0, p->id1); 334 #endif 335 336 p = (void*)uvax_phys2virt(KA410_SCSIPORT); 337 switch (port) { 338 case 0: 339 p->id0 = pid; 340 printf(": scsi-id %d\n", p->id0); 341 break; 342 case 1: 343 p->id1 = pid; 344 printf(": scsi-id %d\n", p->id1); 345 break; 346 default: 347 printf("invalid port-number %d\n", port); 348 } 349 } 350 351 integrate void 352 si_attach(parent, self, aux) 353 struct device *parent, *self; 354 void *aux; 355 { 356 struct si_softc *sc = (struct si_softc *) self; 357 struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc; 358 volatile struct si_regs *regs; 359 struct confargs *ca = aux; 360 int i; 361 int *ip = aux;; 362 363 trace (("ncr_attach(0x%x, 0x%x, %s)\n", parent, self, ca->ca_name)); 364 365 /* 366 * 367 */ 368 #ifdef POLL_MODE 369 sc->intreq = (void*)uvax_phys2virt(KA410_INTREQ); 370 sc->intmsk = (void*)uvax_phys2virt(KA410_INTMSK); 371 sc->intclr = (void*)uvax_phys2virt(KA410_INTCLR); 372 sc->intbit = ca->ca_intbit; 373 #endif 374 375 sc->sc_cfargs = ca; /* needed for interrupt-setup */ 376 377 regs = (void*)uvax_phys2virt(ca->ca_ioaddr); 378 379 sc->sc_dareg = (void*)uvax_phys2virt(ca->ca_dareg); 380 sc->sc_dcreg = (void*)uvax_phys2virt(ca->ca_dcreg); 381 sc->sc_ddreg = (void*)uvax_phys2virt(ca->ca_ddreg); 382 sc->sc_dbase = (void*)uvax_phys2virt(ca->ca_dbase); 383 sc->sc_dsize = ca->ca_dsize; 384 sc->sc_dflags = 4; /* XXX */ 385 sc->sc_xflags = ca->ca_dflag; /* should/will be renamed */ 386 /* 387 * Fill in the prototype scsi_link. 388 */ 389 ncr_sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 390 ncr_sc->sc_link.adapter_softc = sc; 391 ncr_sc->sc_link.scsipi_scsi.adapter_target = ca->ca_idval; 392 ncr_sc->sc_link.adapter = &si_ops; 393 ncr_sc->sc_link.device = &si_dev; 394 ncr_sc->sc_link.type = BUS_SCSI; 395 396 si_set_portid(ca->ca_idval, ncr_sc->sc_dev.dv_unit); 397 398 /* 399 * Initialize fields used by the MI code 400 */ 401 ncr_sc->sci_r0 = (void*)®s->sci.sci_r0; 402 ncr_sc->sci_r1 = (void*)®s->sci.sci_r1; 403 ncr_sc->sci_r2 = (void*)®s->sci.sci_r2; 404 ncr_sc->sci_r3 = (void*)®s->sci.sci_r3; 405 ncr_sc->sci_r4 = (void*)®s->sci.sci_r4; 406 ncr_sc->sci_r5 = (void*)®s->sci.sci_r5; 407 ncr_sc->sci_r6 = (void*)®s->sci.sci_r6; 408 ncr_sc->sci_r7 = (void*)®s->sci.sci_r7; 409 410 /* 411 * MD function pointers used by the MI code. 412 */ 413 ncr_sc->sc_pio_out = ncr5380_pio_out; 414 ncr_sc->sc_pio_in = ncr5380_pio_in; 415 ncr_sc->sc_dma_alloc = si_dma_alloc; 416 ncr_sc->sc_dma_free = si_dma_free; 417 ncr_sc->sc_dma_poll = si_dma_poll; /* si_dma_poll not used! */ 418 ncr_sc->sc_intr_on = si_intr_on; /* vsbus_unlockDMA; */ 419 ncr_sc->sc_intr_off = si_intr_off; /* vsbus_lockDMA; */ 420 421 ncr_sc->sc_dma_setup = NULL; /* si_dma_setup not used! */ 422 ncr_sc->sc_dma_start = si_dma_start; 423 ncr_sc->sc_dma_eop = NULL; 424 ncr_sc->sc_dma_stop = si_dma_stop; 425 426 ncr_sc->sc_flags = 0; 427 if ((si_options & SI_DO_RESELECT) == 0) 428 ncr_sc->sc_no_disconnect = 0xff; 429 if ((si_options & SI_DMA_INTR) == 0) 430 ncr_sc->sc_flags |= NCR5380_FORCE_POLLING; 431 ncr_sc->sc_min_dma_len = MIN_DMA_LEN; 432 433 /* 434 * Initialize fields used only here in the MD code. 435 */ 436 i = SCI_OPENINGS * sizeof(struct si_dma_handle); 437 sc->sc_dma = (struct si_dma_handle *) malloc(i); 438 if (sc->sc_dma == NULL) 439 panic("si: dvma_malloc failed\n"); 440 for (i = 0; i < SCI_OPENINGS; i++) 441 sc->sc_dma[i].dh_flags = 0; 442 443 sc->sc_regs = regs; 444 445 #ifdef DEBUG 446 if (si_debug) 447 printf("si: Set TheSoftC=%x TheRegs=%x\n", sc, regs); 448 ncr_sc->sc_link.flags |= si_link_flags; 449 #endif 450 451 /* 452 * Initialize si board itself. 453 */ 454 si_reset_adapter(ncr_sc); 455 ncr5380_init(ncr_sc); 456 ncr5380_reset_scsibus(ncr_sc); 457 config_found(self, &(ncr_sc->sc_link), scsiprint); 458 459 /* 460 * Now ready for interrupts. 461 */ 462 vsbus_intr_register(sc->sc_cfargs, si_intr, (void *)sc); 463 vsbus_intr_enable(sc->sc_cfargs); 464 } 465 466 integrate void 467 si_minphys(struct buf *bp) 468 { 469 debug(("minphys: blkno=%d, bcount=%d, data=0x%x, flags=%x\n", 470 bp->b_blkno, bp->b_bcount, bp->b_data, bp->b_flags)); 471 472 if (bp->b_bcount > MAX_DMA_LEN) { 473 #ifdef DEBUG 474 if (si_debug) { 475 printf("si_minphys len = 0x%x.\n", bp->b_bcount); 476 #ifdef DDB 477 Debugger(); 478 #endif 479 } 480 #endif 481 bp->b_bcount = MAX_DMA_LEN; 482 } 483 return (minphys(bp)); 484 } 485 486 487 #define CSR_WANT (SI_CSR_SBC_IP | SI_CSR_DMA_IP | \ 488 SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR ) 489 490 static int si_intrCount = 0; 491 static int lastCSR = 0; 492 493 integrate int 494 si_intr(arg) 495 void *arg; 496 { 497 struct ncr5380_softc *ncr_sc = arg; 498 struct si_softc *sc = arg; 499 int count, claimed; 500 501 count = ++si_intrCount; 502 trace(("%s: si-intr(%d).....\n", ncr_sc->sc_dev.dv_xname, count)); 503 504 #ifdef DEBUG 505 /* 506 * Each DMA interrupt is followed by one spurious(?) interrupt. 507 * if (ncr_sc->sc_state & NCR_WORKING == 0) we know, that the 508 * interrupt was not claimed by the higher-level routine, so that 509 * it might be save to ignore these... 510 */ 511 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 512 printf("spurious(%d): %x, %d, status=%b\n", count, 513 sc->sc_dflags, ncr_sc->sc_ncmds, 514 *ncr_sc->sci_csr, NCR5380_CSRBITS); 515 } 516 #endif 517 /* 518 * If there was a DMA operation in progress, now it's no longer 519 * active, since whatever caused the interrupt also interrupted 520 * the DMA operation. Thus accessing the registers now doesn't 521 * harm anything which is not yet broken... 522 */ 523 debug(("si_intr(status: %x, dma-count: %d)\n", 524 *ncr_sc->sci_csr, *sc->sc_dcreg)); 525 526 /* 527 * First check for DMA errors / incomplete transfers 528 * If operation was read/data-in, the copy data from buffer 529 */ 530 if (ncr_sc->sc_state & NCR_DOINGDMA) { 531 struct sci_req *sr = ncr_sc->sc_current; 532 struct si_dma_handle *dh = sr->sr_dma_hand; 533 int resid, ntrans; 534 535 resid = *sc->sc_dcreg; 536 if (resid == 1 && sc->sc_xflags) { 537 debug(("correcting resid...\n")); 538 resid = 0; 539 } 540 ntrans = dh->dh_xlen + resid; 541 if (resid == 0) { 542 if ((dh->dh_flags & SIDH_OUT) == 0) { 543 si_dmaToggleLock(ncr_sc, 544 VSDMA_DMABUSY, VSDMA_RDBUF); 545 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 546 si_dmaToggleLock(ncr_sc, 547 VSDMA_RDBUF, VSDMA_DMABUSY); 548 dh->dh_flags |= SIDH_DONE; 549 } 550 } 551 else { 552 #ifdef DEBUG 553 int csr = *ncr_sc->sci_csr; 554 printf("DMA incomplete (%d/%d) status = %b\n", 555 ntrans, resid, csr, NCR5380_CSRBITS); 556 if(csr != lastCSR) { 557 int k = (csr & ~lastCSR) | (~csr & lastCSR); 558 debug(("Changed status bits: %b\n", 559 k, NCR5380_CSRBITS)); 560 lastCSR = csr & 0xFF; 561 } 562 #endif 563 printf("DMA incomplete: ntrans=%d/%d, lock=%x\n", 564 ntrans, dh->dh_xlen, sc->sc_dflags); 565 ncr_sc->sc_state |= NCR_ABORTING; 566 } 567 568 if ((sc->sc_dflags & VSDMA_BLOCKED) == 0) { 569 printf("not blocked during DMA.\n"); 570 } 571 sc->sc_dflags &= ~VSDMA_BLOCKED; 572 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 573 } 574 if ((sc->sc_dflags & VSDMA_BLOCKED) != 0) { 575 printf("blocked while not doing DMA.\n"); 576 sc->sc_dflags &= ~VSDMA_BLOCKED; 577 } 578 579 /* 580 * Now, whatever it was, let the ncr5380sbc routine handle it... 581 */ 582 claimed = ncr5380_intr(ncr_sc); 583 #ifdef DEBUG 584 if (!claimed) { 585 printf("si_intr: spurious from SBC\n"); 586 if (si_debug & 4) { 587 Debugger(); /* XXX */ 588 } 589 } 590 #endif 591 trace(("%s: si-intr(%d) done, claimed=%d\n", 592 ncr_sc->sc_dev.dv_xname, count, claimed)); 593 return (claimed); 594 } 595 596 597 integrate void 598 si_reset_adapter(struct ncr5380_softc *ncr_sc) 599 { 600 struct si_softc *sc = (struct si_softc *)ncr_sc; 601 volatile struct si_regs *si = sc->sc_regs; 602 603 #ifdef DEBUG 604 if (si_debug) { 605 printf("si_reset_adapter\n"); 606 } 607 #endif 608 SCI_CLR_INTR(ncr_sc); 609 } 610 611 612 /***************************************************************** 613 * Common functions for DMA 614 ****************************************************************/ 615 616 /* 617 * Allocate a DMA handle and put it in sc->sc_dma. Prepare 618 * for DMA transfer. On the Sun3, this means mapping the buffer 619 * into DVMA space. dvma_mapin() flushes the cache for us. 620 */ 621 void 622 si_dma_alloc(ncr_sc) 623 struct ncr5380_softc *ncr_sc; 624 { 625 struct si_softc *sc = (struct si_softc *)ncr_sc; 626 struct sci_req *sr = ncr_sc->sc_current; 627 struct scsipi_xfer *xs = sr->sr_xs; 628 struct buf *bp = sr->sr_xs->bp; 629 struct si_dma_handle *dh; 630 int i, xlen; 631 u_long addr; 632 633 trace (("si_dma_alloc()\n")); 634 635 #ifdef DIAGNOSTIC 636 if (sr->sr_dma_hand != NULL) 637 panic("si_dma_alloc: already have DMA handle"); 638 #endif 639 640 addr = (u_long) ncr_sc->sc_dataptr; 641 debug(("addr=%x, dataptr=%x\n", addr, ncr_sc->sc_dataptr)); 642 xlen = ncr_sc->sc_datalen; 643 644 /* Make sure our caller checked sc_min_dma_len. */ 645 if (xlen < MIN_DMA_LEN) 646 panic("si_dma_alloc: xlen=0x%x\n", xlen); 647 648 /* 649 * Never attempt single transfers of more than 63k, because 650 * our count register may be only 16 bits (an OBIO adapter). 651 * This should never happen since already bounded by minphys(). 652 * XXX - Should just segment these... 653 */ 654 if (xlen > MAX_DMA_LEN) { 655 #ifdef DEBUG 656 printf("si_dma_alloc: excessive xlen=0x%x\n", xlen); 657 Debugger(); 658 #endif 659 ncr_sc->sc_datalen = xlen = MAX_DMA_LEN; 660 } 661 662 /* Find free DMA handle. Guaranteed to find one since we have 663 as many DMA handles as the driver has processes. */ 664 for (i = 0; i < SCI_OPENINGS; i++) { 665 if ((sc->sc_dma[i].dh_flags & SIDH_BUSY) == 0) 666 goto found; 667 } 668 panic("si: no free DMA handles."); 669 found: 670 671 dh = &sc->sc_dma[i]; 672 dh->dh_flags = SIDH_BUSY; 673 dh->dh_addr = (u_char*) addr; 674 dh->dh_maplen = xlen; 675 dh->dh_xlen = xlen; 676 dh->dh_dvma = 0; 677 678 /* Copy the "write" flag for convenience. */ 679 if (xs->flags & SCSI_DATA_OUT) 680 dh->dh_flags |= SIDH_OUT; 681 682 #if 1 683 /* 684 * If the buffer has the flag B_PHYS, the the address specified 685 * in the buffer is a user-space address and we need to remap 686 * this address into kernel space so that using this buffer 687 * within the interrupt routine will work. 688 * If it's already a kernel space address, we need to make sure 689 * that all pages are in-core. the mapin() routine takes care 690 * of that. 691 */ 692 if (bp && (bp->b_flags & B_PHYS)) 693 dh->dh_flags |= SIDH_PHYS; 694 #endif 695 696 if (!bp) { 697 printf("ncr.c: struct buf *bp is null-pointer.\n"); 698 dh->dh_flags = 0; 699 return; 700 } 701 if (bp->b_bcount < 0 || bp->b_bcount > MAX_DMA_LEN) { 702 printf("ncr.c: invalid bcount %d (0x%x)\n", 703 bp->b_bcount, bp->b_bcount); 704 dh->dh_flags = 0; 705 return; 706 } 707 dh->dh_dvma = bp->b_data; 708 #if 0 709 /* 710 * mapping of user-space addresses is no longer neccessary, now 711 * that the vmapbuf/vunmapbuf routines exist. Now the higher-level 712 * driver already cares for the mapping! 713 */ 714 if (bp->b_flags & B_PHYS) { 715 xdebug(("not mapping in... %x/%x %x\n", bp->b_saveaddr, 716 bp->b_data, bp->b_bcount)); 717 #ifdef USE_VMAPBUF 718 dh->dh_addr = bp->b_data; 719 dh->dh_maplen = bp->b_bcount; 720 vmapbuf(bp, bp->b_bcount); 721 dh->dh_dvma = bp->b_data; 722 #else 723 dh->dh_dvma = (u_char*)vsdma_mapin(bp); 724 #endif 725 xdebug(("addr %x, maplen %d, dvma %x, bcount %d, dir %s\n", 726 dh->dh_addr, dh->dh_maplen, dh->dh_dvma, bp->b_bcount, 727 (dh->dh_flags & SIDH_OUT ? "OUT" : "IN"))); 728 } 729 #endif 730 /* success */ 731 sr->sr_dma_hand = dh; 732 733 return; 734 } 735 736 737 void 738 si_dma_free(ncr_sc) 739 struct ncr5380_softc *ncr_sc; 740 { 741 struct si_softc *sc = (struct si_softc *)ncr_sc; 742 struct sci_req *sr = ncr_sc->sc_current; 743 struct scsipi_xfer *xs = sr->sr_xs; 744 struct buf *bp = sr->sr_xs->bp; 745 struct si_dma_handle *dh = sr->sr_dma_hand; 746 747 trace (("si_dma_free()\n")); 748 749 #ifdef DIAGNOSTIC 750 if (dh == NULL) 751 panic("si_dma_free: no DMA handle"); 752 #endif 753 754 if (ncr_sc->sc_state & NCR_DOINGDMA) 755 panic("si_dma_free: free while in progress"); 756 757 if (dh->dh_flags & SIDH_BUSY) { 758 #if 0 759 debug(("bp->b_flags=0x%x\n", bp->b_flags)); 760 if (bp->b_flags & B_PHYS) { 761 #ifdef USE_VMAPBUF 762 printf("not unmapping(%x/%x %x/%x %d/%d)...\n", 763 dh->dh_addr, dh->dh_dvma, 764 bp->b_saveaddr, bp->b_data, 765 bp->b_bcount, dh->dh_maplen); 766 /* vunmapbuf(bp, dh->dh_maplen); */ 767 printf("done.\n"); 768 #endif 769 dh->dh_dvma = 0; 770 } 771 #endif 772 dh->dh_flags = 0; 773 } 774 sr->sr_dma_hand = NULL; 775 } 776 777 778 /* 779 * REGBUSY and DMABUSY won't collide since the higher-level driver 780 * issues intr_on/intr_off before/after doing DMA. The only problem 781 * is to handle RDBUF/WRBUF wrt REGBUSY/DMABUSY 782 * 783 * There might be race-conditions, but for now we don't care for them... 784 */ 785 int 786 si_dmaLockBus(ncr_sc, lt) 787 struct ncr5380_softc *ncr_sc; 788 int lt; /* Lock-Type */ 789 { 790 struct si_softc *sc = (void*)ncr_sc; 791 int timeout = 200; /* wait .2 seconds max. */ 792 793 trace(("si_dmaLockBus(%x), cold: %d, current: %x\n", 794 lt, cold, sc->sc_dflags)); 795 796 #ifdef POLL_MODE 797 if (cold) 798 return (0); 799 #endif 800 801 if ((ncr_sc->sc_current != NULL) && (lt == VSDMA_REGBUSY)) { 802 printf("trying to use regs while sc_current is set.\n"); 803 printf("lt=%x, fl=%x, cur=%x\n", 804 lt, sc->sc_dflags, ncr_sc->sc_current); 805 } 806 if ((ncr_sc->sc_current == NULL) && (lt != VSDMA_REGBUSY)) { 807 printf("trying to use/prepare DMA without current.\n"); 808 printf("lt=%x, fl=%x, cur=%x\n", 809 lt, sc->sc_dflags, ncr_sc->sc_current); 810 } 811 812 if ((sc->sc_dflags & VSDMA_LOCKED) == 0) { 813 struct si_softc *sc = (struct si_softc *)ncr_sc; 814 sc->sc_dflags |= VSDMA_WANTED; 815 vsbus_lockDMA(sc->sc_cfargs); 816 sc->sc_dflags = VSDMA_LOCKED | lt; 817 return (0); 818 } 819 820 #if 1 821 while ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 822 debug(("busy wait(1)...\n")); 823 if (--timeout == 0) { 824 printf("timeout in busy-wait(%x %x)\n", 825 lt, sc->sc_dflags); 826 sc->sc_dflags &= ~VSDMA_LCKTYPE; 827 break; 828 } 829 delay(1000); 830 } 831 debug(("busy wait(1) done.\n")); 832 sc->sc_dflags |= lt; 833 834 #else 835 if ((sc->sc_dflags & VSDMA_LCKTYPE) != lt) { 836 switch (lt) { 837 838 case VSDMA_RDBUF: 839 /* sc->sc_dflags |= VSDMA_IWANTED; */ 840 debug(("busy wait(1)...\n")); 841 while (sc->sc_dflags & 842 (VSDMA_WRBUF | VSDMA_DMABUSY)) { 843 if (--timeout == 0) { 844 printf("timeout in busy-wait(1)\n"); 845 sc->sc_dflags &= ~VSDMA_WRBUF; 846 sc->sc_dflags &= ~VSDMA_DMABUSY; 847 } 848 delay(1000); 849 } 850 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 851 debug(("busy wait(1) done.\n")); 852 sc->sc_dflags |= lt; 853 break; 854 855 case VSDMA_WRBUF: 856 /* sc->sc_dflags |= VSDMA_IWANTED; */ 857 debug(("busy wait(2)...\n")); 858 while (sc->sc_dflags & 859 (VSDMA_RDBUF | VSDMA_DMABUSY)) { 860 if (--timeout == 0) { 861 printf("timeout in busy-wait(2)\n"); 862 sc->sc_dflags &= ~VSDMA_RDBUF; 863 sc->sc_dflags &= ~VSDMA_DMABUSY; 864 } 865 delay(1000); 866 } 867 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 868 debug(("busy wait(2) done.\n")); 869 sc->sc_dflags |= lt; 870 break; 871 872 case VSDMA_DMABUSY: 873 /* sc->sc_dflags |= VSDMA_IWANTED; */ 874 debug(("busy wait(3)...\n")); 875 while (sc->sc_dflags & 876 (VSDMA_RDBUF | VSDMA_WRBUF)) { 877 if (--timeout == 0) { 878 printf("timeout in busy-wait(3)\n"); 879 sc->sc_dflags &= ~VSDMA_RDBUF; 880 sc->sc_dflags &= ~VSDMA_WRBUF; 881 } 882 delay(1000); 883 } 884 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 885 debug(("busy wait(3) done.\n")); 886 sc->sc_dflags |= lt; 887 break; 888 889 case VSDMA_REGBUSY: 890 /* sc->sc_dflags |= VSDMA_IWANTED; */ 891 debug(("busy wait(4)...\n")); 892 while (sc->sc_dflags & 893 (VSDMA_RDBUF | VSDMA_WRBUF | VSDMA_DMABUSY)) { 894 if (--timeout == 0) { 895 printf("timeout in busy-wait(4)\n"); 896 sc->sc_dflags &= ~VSDMA_RDBUF; 897 sc->sc_dflags &= ~VSDMA_WRBUF; 898 sc->sc_dflags &= ~VSDMA_DMABUSY; 899 } 900 delay(1000); 901 } 902 /* sc->sc_dflags &= ~VSDMA_IWANTED; */ 903 debug(("busy wait(4) done.\n")); 904 sc->sc_dflags |= lt; 905 break; 906 907 default: 908 printf("illegal lockType %x in si_dmaLockBus()\n"); 909 } 910 } 911 else 912 printf("already locked. (%x/%x)\n", lt, sc->sc_dflags); 913 #endif 914 if (sc->sc_dflags & lt) /* successfully locked for this type */ 915 return (0); 916 917 printf("spurious %x in si_dmaLockBus(%x)\n", lt, sc->sc_dflags); 918 } 919 920 /* 921 * the lock of this type is no longer needed. If all (internal) locks are 922 * released, release the DMA bus. 923 */ 924 int 925 si_dmaReleaseBus(ncr_sc, lt) 926 struct ncr5380_softc *ncr_sc; 927 int lt; /* Lock-Type */ 928 { 929 struct si_softc *sc = (void*)ncr_sc; 930 931 trace(("si_dmaReleaseBus(%x), cold: %d, current: %x\n", 932 lt, cold, sc->sc_dflags)); 933 934 #ifdef POLL_MODE 935 if (cold) 936 return (0); 937 #endif 938 939 if ((sc->sc_dflags & VSDMA_LCKTYPE) == lt) { 940 sc->sc_dflags &= ~lt; 941 } 942 else 943 printf("trying to release %x while flags = %x\n", lt, 944 sc->sc_dflags); 945 946 if (sc->sc_dflags == VSDMA_LOCKED) { /* no longer needed */ 947 struct si_softc *sc = (struct si_softc *)ncr_sc; 948 vsbus_unlockDMA(sc->sc_cfargs); 949 sc->sc_dflags = 0; 950 return (0); 951 } 952 } 953 954 /* 955 * Just toggle the type of lock without releasing the lock... 956 * This is usually needed before/after bcopy() to/from DMA-buffer 957 */ 958 int 959 si_dmaToggleLock(ncr_sc, lt1, lt2) 960 struct ncr5380_softc *ncr_sc; 961 int lt1, lt2; /* Lock-Type */ 962 { 963 struct si_softc *sc = (void*)ncr_sc; 964 965 #ifdef POLL_MODE 966 if (cold) 967 return (0); 968 #endif 969 970 if (((sc->sc_dflags & lt1) != 0) && 971 ((sc->sc_dflags & lt2) == 0)) { 972 sc->sc_dflags |= lt2; 973 sc->sc_dflags &= ~lt1; 974 return (0); 975 } 976 printf("cannot toggle locking from %x to %x (current = %x)\n", 977 lt1, lt2, sc->sc_dflags); 978 } 979 980 /* 981 * This is called when the bus is going idle, 982 * so we want to enable the SBC interrupts. 983 * That is controlled by the DMA enable! 984 * Who would have guessed! 985 * What a NASTY trick! 986 */ 987 void 988 si_intr_on(ncr_sc) 989 struct ncr5380_softc *ncr_sc; 990 { 991 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 992 } 993 994 /* 995 * This is called when the bus is idle and we are 996 * about to start playing with the SBC chip. 997 * 998 * VS2000 note: we have four kinds of access which are mutually exclusive: 999 * - access to the NCR5380 registers 1000 * - access to the HDC9224 registers 1001 * - access to the DMA area 1002 * - doing DMA 1003 */ 1004 void 1005 si_intr_off(ncr_sc) 1006 struct ncr5380_softc *ncr_sc; 1007 { 1008 si_dmaLockBus(ncr_sc, VSDMA_REGBUSY); 1009 } 1010 1011 /***************************************************************** 1012 * VME functions for DMA 1013 ****************************************************************/ 1014 1015 1016 /* 1017 * This function is called during the COMMAND or MSG_IN phase 1018 * that preceeds a DATA_IN or DATA_OUT phase, in case we need 1019 * to setup the DMA engine before the bus enters a DATA phase. 1020 * 1021 * XXX: The VME adapter appears to suppress SBC interrupts 1022 * when the FIFO is not empty or the FIFO count is non-zero! 1023 * 1024 * On the VME version we just clear the DMA count and address 1025 * here (to make sure it stays idle) and do the real setup 1026 * later, in dma_start. 1027 */ 1028 void 1029 si_dma_setup(ncr_sc) 1030 struct ncr5380_softc *ncr_sc; 1031 { 1032 trace (("si_dma_setup(ncr_sc) !!!\n")); 1033 1034 /* 1035 * VS2000: nothing to do ... 1036 */ 1037 } 1038 1039 1040 void 1041 si_dma_start(ncr_sc) 1042 struct ncr5380_softc *ncr_sc; 1043 { 1044 struct si_softc *sc = (struct si_softc *)ncr_sc; 1045 struct sci_req *sr = ncr_sc->sc_current; 1046 struct si_dma_handle *dh = sr->sr_dma_hand; 1047 volatile struct si_regs *si = sc->sc_regs; 1048 long data_pa; 1049 int xlen; 1050 1051 trace(("si_dma_start(%x)\n", sr->sr_dma_hand)); 1052 1053 /* 1054 * we always transfer from/to base of DMA-area, 1055 * thus the DMA-address is always the same, only size 1056 * and direction matter/differ on VS2000 1057 */ 1058 1059 debug(("ncr_sc->sc_datalen = %d\n", ncr_sc->sc_datalen)); 1060 xlen = ncr_sc->sc_datalen; 1061 dh->dh_xlen = xlen; 1062 1063 /* 1064 * VS2000 has a fixed 16KB-area where DMA is restricted to. 1065 * All DMA-addresses are relative to this base: KA410_DMA_BASE 1066 * Thus we need to copy the data into this area when writing, 1067 * or copy from this area when reading. (kind of bounce-buffer) 1068 */ 1069 1070 /* Set direction (send/recv) */ 1071 if (dh->dh_flags & SIDH_OUT) { 1072 /* 1073 * We know that we are called while intr_off (regs locked) 1074 * thus we toggle the lock from REGBUSY to WRBUF 1075 * also we set the BLOCKIT flag, so that the locking of 1076 * the DMA bus won't be released to the HDC9224... 1077 */ 1078 debug(("preparing msg-out (bcopy)\n")); 1079 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_WRBUF); 1080 bcopy(dh->dh_dvma, sc->sc_dbase, xlen); 1081 si_dmaToggleLock(ncr_sc, VSDMA_WRBUF, VSDMA_REGBUSY); 1082 *sc->sc_ddreg = DMA_DIR_OUT; 1083 } 1084 else { 1085 debug(("preparing data-in (bzero)\n")); 1086 /* bzero(sc->sc_dbase, xlen); */ 1087 *sc->sc_ddreg = DMA_DIR_IN; 1088 } 1089 sc->sc_dflags |= VSDMA_BLOCKED; 1090 1091 *sc->sc_dareg = DMA_ADDR_HBYTE; /* high byte (6 bits) */ 1092 *sc->sc_dareg = DMA_ADDR_LBYTE; /* low byte */ 1093 *sc->sc_dcreg = 0 - xlen; /* bertram XXX */ 1094 1095 #ifdef DEBUG 1096 if (si_debug & 2) { 1097 printf("si_dma_start: dh=0x%x, pa=0x%x, xlen=%d, creg=0x%x\n", 1098 dh, data_pa, xlen, *sc->sc_dcreg); 1099 } 1100 #endif 1101 1102 #ifdef POLL_MODE 1103 debug(("dma_start: cold=%d\n", cold)); 1104 if (cold) { 1105 *sc->intmsk &= ~sc->intbit; 1106 *sc->intclr = sc->intbit; 1107 } 1108 else 1109 *sc->intmsk |= sc->intbit; 1110 #endif 1111 /* 1112 * Acknowledge the phase change. (After DMA setup!) 1113 * Put the SBIC into DMA mode, and start the transfer. 1114 */ 1115 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_DMABUSY); 1116 if (dh->dh_flags & SIDH_OUT) { 1117 *ncr_sc->sci_tcmd = PHASE_DATA_OUT; 1118 SCI_CLR_INTR(ncr_sc); 1119 *ncr_sc->sci_icmd = SCI_ICMD_DATA; 1120 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1121 *ncr_sc->sci_dma_send = 0; /* start it */ 1122 } else { 1123 *ncr_sc->sci_tcmd = PHASE_DATA_IN; 1124 SCI_CLR_INTR(ncr_sc); 1125 *ncr_sc->sci_icmd = 0; 1126 *ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE); 1127 *ncr_sc->sci_irecv = 0; /* start it */ 1128 } 1129 ncr_sc->sc_state |= NCR_DOINGDMA; 1130 /* 1131 * having a delay (eg. printf) here, seems to solve the problem. 1132 * Isn't that strange ???? 1133 * Maybe the higher-level driver accesses one of the registers of 1134 * the controller while DMA is in progress. Having a long enough 1135 * delay here might prevent/delay this access until DMA bus is 1136 * free again... 1137 * 1138 * The instruction ++++ printf("DMA started.\n"); ++++ 1139 * is long/slow enough, to make the SSCI driver work. Thus we 1140 * try to find a delay() long/slow enough to do the same. The 1141 * argument to this delay is relative to the transfer-count. 1142 */ 1143 delay(3*xlen/4); /* XXX solve this problem!!! XXX */ 1144 1145 #ifdef DEBUG 1146 if (si_debug & 2) { 1147 printf("si_dma_start: started, flags=0x%x\n", 1148 ncr_sc->sc_state); 1149 } 1150 #endif 1151 } 1152 1153 1154 void 1155 si_vme_dma_eop(ncr_sc) 1156 struct ncr5380_softc *ncr_sc; 1157 { 1158 trace (("si_vme_dma_eop() !!!\n")); 1159 /* Not needed - DMA was stopped prior to examining sci_csr */ 1160 } 1161 1162 /* 1163 * si_dma_stop() has now become almost a nop-routine, since DMA-buffer 1164 * has already been read within si_intr(), so there's nothing left to do. 1165 */ 1166 void 1167 si_dma_stop(ncr_sc) 1168 struct ncr5380_softc *ncr_sc; 1169 { 1170 struct si_softc *sc = (struct si_softc *)ncr_sc; 1171 struct sci_req *sr = ncr_sc->sc_current; 1172 struct si_dma_handle *dh = sr->sr_dma_hand; 1173 volatile struct si_regs *si = sc->sc_regs; 1174 int resid, ntrans; 1175 1176 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) { 1177 #ifdef DEBUG 1178 printf("si_dma_stop: dma not running\n"); 1179 #endif 1180 return; 1181 } 1182 ncr_sc->sc_state &= ~NCR_DOINGDMA; 1183 1184 /* Note that timeout may have set the error flag. */ 1185 if (ncr_sc->sc_state & NCR_ABORTING) { 1186 printf("si_dma_stop: timeout?\n"); 1187 goto out; 1188 } 1189 1190 /* 1191 * Now try to figure out how much actually transferred 1192 */ 1193 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1194 si_dmaToggleLock(ncr_sc, VSDMA_DMABUSY, VSDMA_REGBUSY); 1195 resid = *sc->sc_dcreg; 1196 /* 1197 * XXX: don't correct at two places !!! 1198 */ 1199 if (resid == 1 && sc->sc_xflags) { 1200 resid = 0; 1201 } 1202 ntrans = dh->dh_xlen + resid; 1203 if (resid != 0) 1204 printf("resid=%d, xlen=%d, ntrans=%d\n", 1205 resid, dh->dh_xlen, ntrans); 1206 1207 #ifdef DEBUG 1208 if (si_debug & 2) { 1209 printf("si_dma_stop: resid=0x%x ntrans=0x%x\n", 1210 resid, ntrans); 1211 } 1212 #endif 1213 1214 if (ntrans < MIN_DMA_LEN) { 1215 printf("si: fifo count: 0x%x\n", resid); 1216 ncr_sc->sc_state |= NCR_ABORTING; 1217 goto out; 1218 } 1219 if (ntrans > ncr_sc->sc_datalen) 1220 panic("si_dma_stop: excess transfer"); 1221 1222 /* 1223 * On VS2000 in case of a READ-operation, we must now copy 1224 * the buffer-contents to the destination-address! 1225 */ 1226 if ((dh->dh_flags & SIDH_OUT) == 0 && 1227 (dh->dh_flags & SIDH_DONE) == 0) { 1228 printf("DMA buffer not yet copied.\n"); 1229 si_dmaToggleLock(ncr_sc, VSDMA_REGBUSY, VSDMA_RDBUF); 1230 bcopy(sc->sc_dbase, dh->dh_dvma, ntrans); 1231 si_dmaToggleLock(ncr_sc, VSDMA_RDBUF, VSDMA_REGBUSY); 1232 } 1233 si_dmaReleaseBus(ncr_sc, VSDMA_REGBUSY); 1234 1235 /* Adjust data pointer */ 1236 ncr_sc->sc_dataptr += ntrans; 1237 ncr_sc->sc_datalen -= ntrans; 1238 1239 out: 1240 si_dmaLockBus(ncr_sc, VSDMA_DMABUSY); 1241 1242 /* Put SBIC back in PIO mode. */ 1243 *ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE); 1244 *ncr_sc->sci_icmd = 0; 1245 1246 si_dmaReleaseBus(ncr_sc, VSDMA_DMABUSY); 1247 } 1248 1249 /* 1250 * Poll (spin-wait) for DMA completion. 1251 * Called right after xx_dma_start(), and 1252 * xx_dma_stop() will be called next. 1253 */ 1254 void 1255 si_dma_poll(ncr_sc) 1256 struct ncr5380_softc *ncr_sc; 1257 { 1258 struct si_softc *sc = (struct si_softc *)ncr_sc; 1259 struct sci_req *sr = ncr_sc->sc_current; 1260 struct si_dma_handle *dh = sr->sr_dma_hand; 1261 int i, timeout; 1262 1263 if (! cold) 1264 printf("spurious call of DMA-poll ???"); 1265 1266 #ifdef POLL_MODE 1267 1268 delay(10000); 1269 trace(("si_dma_poll(%x)\n", *sc->sc_dcreg)); 1270 1271 /* 1272 * interrupt-request has been cleared by dma_start, thus 1273 * we do nothing else but wait for the intreq to reappear... 1274 */ 1275 1276 timeout = 5000; 1277 for (i=0; i<timeout; i++) { 1278 if (*sc->intreq & sc->intbit) 1279 break; 1280 delay(100); 1281 } 1282 if ((*sc->intreq & sc->intbit) == 0) { 1283 printf("si: DMA timeout (while polling)\n"); 1284 /* Indicate timeout as MI code would. */ 1285 sr->sr_flags |= SR_OVERDUE; 1286 } 1287 #endif 1288 return; 1289 } 1290
Indexes created Tue Sep 30 20:09:53 GMT 2025