Home | History | Annotate | Line # | Download | only in dev
dmacvar.h revision 1.3 
      1 /*	$NetBSD: dmacvar.h,v 1.3 2001/04/30 05:47:31 minoura Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Minoura Makoto.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the NetBSD
     21  *	Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 /*
     40  * Hitachi HD63450 (= Motorola MC68450) DMAC driver for x68k.
     41  */
     42 
     43 #include <dev/ic/mc68450reg.h>
     44 #include <machine/bus.h>
     45 
     46 #define DMAC_MAPSIZE 64
     47 
     48 typedef int (*dmac_intr_handler_t) __P((void*));
     49 
     50 /*
     51  * Structure that describes a single transfer.
     52  */
     53 struct dmac_channel_stat;
     54 struct dmac_dma_xfer {
     55 	struct dmac_channel_stat *dx_channel;
     56 	bus_dmamap_t	dx_dmamap;	/* dmamap tag */
     57 	bus_dma_tag_t	dx_tag;		/* dma tag for the transfer */
     58 	int		dx_ocr;		/* direction */
     59 	int		dx_scr;		/* SCR value */
     60 	void		*dx_device;	/* (initial) device address */
     61 	bus_dma_segment_t dx_seg;	/* b_d_s_t for the array chain */
     62 	struct dmac_sg_array *dx_array;	/* DMAC array chain */
     63 	int		dx_arraysize;	/* size of above */
     64 	int		dx_done;
     65 };
     66 
     67 /*
     68  * Struct that holds the channel status.
     69  * Embedded in the device softc for each channel.
     70  */
     71 struct dmac_channel_stat {
     72 	int			ch_channel; /* channel number */
     73 	char			ch_name[8]; /* user device name */
     74 	bus_space_handle_t	ch_bht;	/* bus_space handle */
     75 	int			ch_dcr;	/* device description */
     76 	int			ch_ocr;	/* operation size, request mode */
     77 	int			ch_normalv; /* normal interrupt vector */
     78 	int			ch_errorv; /* error interrupt vector */
     79 	dmac_intr_handler_t	ch_normal; /* normal interrupt handler */
     80 	dmac_intr_handler_t	ch_error; /* error interrupt handler */
     81 	void			*ch_normalarg;
     82 	void			*ch_errorarg;
     83 	struct dmac_dma_xfer	ch_xfer;
     84 	struct dmac_sg_array	*ch_map; /* transfer map for arraychain mode */
     85 	bus_dma_segment_t	ch_seg[1];
     86 	struct device		*ch_softc; /* device softc link */
     87 };
     88 
     89 /*
     90  * DMAC softc
     91  */
     92 struct dmac_softc {
     93 	struct device		sc_dev;
     94 
     95 	bus_space_tag_t		sc_bst;
     96 	bus_space_handle_t	sc_bht;
     97 
     98 	struct dmac_channel_stat sc_channels[DMAC_NCHAN];
     99 };
    100 
    101 
    102 #define DMAC_ADDR	0xe84000
    103 
    104 #define DMAC_MAXSEGSZ	0xff00
    105 #define DMAC_BOUNDARY	0
    106 
    107 struct dmac_channel_stat *dmac_alloc_channel __P((struct device*, int, char*,
    108 						  int,
    109 						  dmac_intr_handler_t, void*,
    110 						  int,
    111 						  dmac_intr_handler_t, void*));
    112 		/* ch, name, normalv, normal, errorv, error */
    113 int dmac_free_channel __P((struct device*, int, void*));
    114 		/* ch, channel */
    115 struct dmac_dma_xfer *dmac_prepare_xfer __P((struct dmac_channel_stat*,
    116 					     bus_dma_tag_t,
    117 					     bus_dmamap_t,
    118 					     int, int, void*));
    119 	/* chan, dmat, map, dir, sequence, dar */
    120 #define dmac_finish_xfer(xfer) free(xfer, M_DEVBUF)
    121 int dmac_start_xfer __P((struct device*, struct dmac_dma_xfer*));
    122