intiovar.h revision 1.4.6.4 1 1.4.6.4 skrll /* $NetBSD: intiovar.h,v 1.4.6.4 2005/01/24 08:35:10 skrll Exp $ */
2 1.2 minoura
3 1.2 minoura /*
4 1.2 minoura *
5 1.2 minoura * Copyright (c) 1998 NetBSD Foundation, Inc.
6 1.2 minoura * All rights reserved.
7 1.2 minoura *
8 1.2 minoura * Redistribution and use in source and binary forms, with or without
9 1.2 minoura * modification, are permitted provided that the following conditions
10 1.2 minoura * are met:
11 1.2 minoura * 1. Redistributions of source code must retain the above copyright
12 1.2 minoura * notice, this list of conditions and the following disclaimer.
13 1.2 minoura * 2. Redistributions in binary form must reproduce the above copyright
14 1.2 minoura * notice, this list of conditions and the following disclaimer in the
15 1.2 minoura * documentation and/or other materials provided with the distribution.
16 1.2 minoura * 3. All advertising materials mentioning features or use of this software
17 1.2 minoura * must display the following acknowledgement:
18 1.3 minoura * This product includes software developed by the NetBSD
19 1.3 minoura * Foundation, Inc. and its contributors.
20 1.2 minoura * 4. The name of the author may not be used to endorse or promote products
21 1.2 minoura * derived from this software without specific prior written permission.
22 1.2 minoura *
23 1.3 minoura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.3 minoura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.3 minoura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.3 minoura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.3 minoura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.3 minoura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.3 minoura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.3 minoura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.3 minoura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.3 minoura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.3 minoura * POSSIBILITY OF SUCH DAMAGE.
34 1.2 minoura */
35 1.2 minoura
36 1.2 minoura /*
37 1.2 minoura * NetBSD/x68k internal I/O virtual bus.
38 1.2 minoura */
39 1.2 minoura
40 1.2 minoura #ifndef _INTIOVAR_H_
41 1.2 minoura #define _INTIOVAR_H_
42 1.2 minoura
43 1.2 minoura #include <machine/frame.h>
44 1.2 minoura #include <sys/malloc.h>
45 1.2 minoura #include <sys/extent.h>
46 1.2 minoura #include "locators.h"
47 1.2 minoura
48 1.2 minoura #define cf_addr cf_loc[INTIOCF_ADDR]
49 1.2 minoura #define cf_intr cf_loc[INTIOCF_INTR]
50 1.2 minoura #define cf_dma cf_loc[INTIOCF_DMA]
51 1.2 minoura #define cf_dmaintr cf_loc[INTIOCF_DMAINTR]
52 1.2 minoura
53 1.2 minoura
54 1.2 minoura struct intio_attach_args {
55 1.2 minoura bus_space_tag_t ia_bst; /* bus_space tag */
56 1.2 minoura bus_dma_tag_t ia_dmat; /* bus_dma tag */
57 1.2 minoura
58 1.4 isaki const char *ia_name; /* device name */
59 1.2 minoura int ia_addr; /* addr */
60 1.2 minoura int ia_size;
61 1.2 minoura int ia_intr; /* interrupt vector */
62 1.2 minoura int ia_dma; /* dma channel */
63 1.2 minoura int ia_dmaintr; /* interrupt vector for dmac */
64 1.2 minoura };
65 1.2 minoura
66 1.2 minoura struct intio_softc {
67 1.2 minoura struct device sc_dev;
68 1.2 minoura bus_space_tag_t sc_bst;
69 1.2 minoura bus_dma_tag_t sc_dmat;
70 1.2 minoura struct extent *sc_map;
71 1.2 minoura struct device *sc_dmac;
72 1.2 minoura };
73 1.2 minoura
74 1.2 minoura enum intio_map_flag {
75 1.2 minoura INTIO_MAP_ALLOCATE = 0,
76 1.2 minoura INTIO_MAP_TESTONLY = 1
77 1.2 minoura };
78 1.4.6.4 skrll int intio_map_allocate_region(struct device *, struct intio_attach_args *,
79 1.4.6.4 skrll enum intio_map_flag);
80 1.4.6.4 skrll int intio_map_free_region(struct device *, struct intio_attach_args *);
81 1.4.6.4 skrll
82 1.4.6.4 skrll typedef int (*intio_intr_handler_t)(void *);
83 1.4.6.4 skrll
84 1.4.6.4 skrll int intio_intr_establish(int, const char *, intio_intr_handler_t, void *);
85 1.4.6.4 skrll int intio_intr_disestablish(int, void *);
86 1.4.6.4 skrll int intio_intr(struct frame *);
87 1.2 minoura
88 1.2 minoura
89 1.2 minoura #define PHYS_INTIODEV 0x00c00000
90 1.2 minoura
91 1.2 minoura extern u_int8_t *intiobase;
92 1.2 minoura
93 1.2 minoura #define INTIO_ADDR(a) ((volatile u_int8_t *) (((u_int32_t) (a)) - (PHYS_INTIODEV) + intiobase))
94 1.2 minoura
95 1.2 minoura #define INTIO_SYSPORT (0x00e8e000)
96 1.2 minoura #define intio_sysport INTIO_ADDR(INTIO_SYSPORT)
97 1.2 minoura #define sysport_contrast 1
98 1.2 minoura #define sysport_tvctrl 3
99 1.2 minoura #define sysport_imageunit 5
100 1.2 minoura #define sysport_keyctrl 7
101 1.2 minoura #define sysport_waitctrl 9
102 1.2 minoura #define sysport_mpustat 11
103 1.2 minoura #define sysport_sramwp 13
104 1.2 minoura #define sysport_powoff 15
105 1.2 minoura
106 1.2 minoura #define intio_set_sysport_contrast(a) \
107 1.2 minoura intio_sysport[sysport_contrast] = (a) /* 0-15 */
108 1.2 minoura #define intio_set_sysport_tvctrl(a) \
109 1.2 minoura intio_sysport[sysport_tvctrl] = (a)
110 1.2 minoura #define INTIO_SYSPORT_TVCTRL 0x08
111 1.2 minoura #define intio_set_sysport_imageunit(a) \
112 1.2 minoura intio_sysport[sysport_imageunit] = (a)
113 1.2 minoura #define intio_set_sysport_keyctrl(a) \
114 1.2 minoura intio_sysport[sysport_keyctrl] = (a)
115 1.2 minoura #define INTIO_SYSPORT_KBENABLE 0x08
116 1.2 minoura #define intio_set_sysport_waitctrl(a) \
117 1.2 minoura intio_sysport[sysport_waitctrl] = (a) /* X68030 only */
118 1.2 minoura #define intio_set_sysport_sramwp(a) \
119 1.2 minoura intio_sysport[sysport_sramwp] = (a)
120 1.2 minoura #define INTIO_SYSPORT_SRAMWP 0x31
121 1.2 minoura #define intio_set_sysport_powoff(a) \
122 1.2 minoura intio_sysport[sysport_powoff] = (a)
123 1.2 minoura
124 1.2 minoura #define intio_get_sysport_contrast() \
125 1.2 minoura (intio_sysport[sysport_contrast])
126 1.2 minoura #define intio_get_sysport_tvctrl() \
127 1.2 minoura (intio_sysport[sysport_tvctrl])
128 1.2 minoura #define INTIO_SYSPORT_TVSTAT 0x08
129 1.2 minoura #define intio_get_sysport_keyctrl() \
130 1.2 minoura (intio_sysport[sysport_keyctrl])
131 1.2 minoura #define INTIO_SYSPORT_KBEXIST 0x08
132 1.2 minoura #define intio_get_sysport_waitctrl() \
133 1.2 minoura (intio_sysport[sysport_waitctrl])
134 1.2 minoura #define intio_get_sysport_mpustat() \
135 1.2 minoura (intio_sysport[sysport_mpustat])
136 1.2 minoura
137 1.4.6.1 skrll /* I/O controller (sicilian/pluto) */
138 1.2 minoura #define INTIO_SICILIAN (0x00e9c000)
139 1.2 minoura #define intio_sicilian INTIO_ADDR(INTIO_SICILIAN)
140 1.2 minoura #define sicilian_intr 1
141 1.2 minoura #define sicilian_ivec 3
142 1.2 minoura
143 1.2 minoura #define intio_get_sicilian_intr() \
144 1.2 minoura (intio_sicilian[sicilian_intr])
145 1.2 minoura #define intio_set_sicilian_intr(a) \
146 1.2 minoura intio_sicilian[sicilian_intr] = (a)
147 1.2 minoura #define SICILIAN_INTR_PAR 0x01
148 1.2 minoura #define SICILIAN_INTR_FDD 0x02
149 1.2 minoura #define SICILIAN_INTR_FDC 0x04
150 1.2 minoura #define SICILIAN_INTR_HDD 0x08
151 1.2 minoura #define SICILIAN_STAT_HDD 0x10
152 1.2 minoura #define SICILIAN_STAT_PAR 0x20
153 1.2 minoura #define SICILIAN_STAT_FDD 0x40
154 1.2 minoura #define SICILIAN_STAT_FDC 0x80
155 1.2 minoura
156 1.2 minoura #define intio_enable_intr(a) \
157 1.2 minoura intio_sicilian[sicilian_intr] = ((a) | intio_sicilian[sicilian_intr])
158 1.2 minoura #define intio_disable_intr(a) \
159 1.2 minoura intio_sicilian[sicilian_intr] = (~(a) & intio_sicilian[sicilian_intr])
160 1.2 minoura
161 1.2 minoura #define intio_set_sicilian_ivec(a) \
162 1.2 minoura intio_sicilian[sicilian_ivec] = (a)
163 1.4.6.4 skrll void intio_set_ivec(int);
164 1.2 minoura
165 1.2 minoura struct intio_dma_cookie {
166 1.2 minoura int id_flags; /* flags; see below */
167 1.2 minoura
168 1.2 minoura /*
169 1.2 minoura * Information about the original buffer used during
170 1.2 minoura * DMA map syncs. Note that origibuflen is only used
171 1.2 minoura * for ID_BUFTYPE_LINEAR.
172 1.2 minoura */
173 1.2 minoura void *id_origbuf; /* pointer to orig buffer if
174 1.2 minoura bouncing */
175 1.2 minoura bus_size_t id_origbuflen; /* ...and size */
176 1.2 minoura int id_buftype; /* type of buffer */
177 1.2 minoura
178 1.2 minoura void *id_bouncebuf; /* pointer to the bounce buffer */
179 1.2 minoura bus_size_t id_bouncebuflen; /* ...and size */
180 1.2 minoura int id_nbouncesegs; /* number of valid bounce segs */
181 1.2 minoura bus_dma_segment_t id_bouncesegs[0]; /* array of bounce buffer
182 1.2 minoura physical memory segments */
183 1.2 minoura };
184 1.2 minoura
185 1.2 minoura /* id_flags */
186 1.2 minoura #define ID_MIGHT_NEED_BOUNCE 0x01 /* map could need bounce buffers */
187 1.2 minoura #define ID_HAS_BOUNCE 0x02 /* map currently has bounce buffers */
188 1.2 minoura #define ID_IS_BOUNCING 0x04 /* map is bouncing current xfer */
189 1.2 minoura
190 1.2 minoura /* id_buftype */
191 1.2 minoura #define ID_BUFTYPE_INVALID 0
192 1.2 minoura #define ID_BUFTYPE_LINEAR 1
193 1.2 minoura #define ID_BUFTYPE_MBUF 2
194 1.2 minoura #define ID_BUFTYPE_UIO 3
195 1.2 minoura #define ID_BUFTYPE_RAW 4
196 1.2 minoura
197 1.2 minoura #endif
198