mha.c revision 1.9 1 1.9 thorpej /* $NetBSD: mha.c,v 1.9 1998/10/10 00:28:39 thorpej Exp $ */
2 1.1 oki
3 1.1 oki /*
4 1.1 oki * Copyright (c) 1996 Masaru Oki, Takumi Nakamura and Masanobu Saitoh. All rights reserved.
5 1.1 oki * Copyright (c) 1994, 1995, 1996 Charles M. Hannum. All rights reserved.
6 1.1 oki *
7 1.1 oki * Redistribution and use in source and binary forms, with or without
8 1.1 oki * modification, are permitted provided that the following conditions
9 1.1 oki * are met:
10 1.1 oki * 1. Redistributions of source code must retain the above copyright
11 1.1 oki * notice, this list of conditions and the following disclaimer.
12 1.1 oki * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 oki * notice, this list of conditions and the following disclaimer in the
14 1.1 oki * documentation and/or other materials provided with the distribution.
15 1.1 oki * 3. All advertising materials mentioning features or use of this software
16 1.1 oki * must display the following acknowledgement:
17 1.1 oki * This product includes software developed by Charles M. Hannum.
18 1.1 oki * 4. The name of the author may not be used to endorse or promote products
19 1.1 oki * derived from this software without specific prior written permission.
20 1.1 oki *
21 1.1 oki * Copyright (c) 1994 Jarle Greipsland
22 1.1 oki * All rights reserved.
23 1.1 oki *
24 1.1 oki * Redistribution and use in source and binary forms, with or without
25 1.1 oki * modification, are permitted provided that the following conditions
26 1.1 oki * are met:
27 1.1 oki * 1. Redistributions of source code must retain the above copyright
28 1.1 oki * notice, this list of conditions and the following disclaimer.
29 1.1 oki * 2. Redistributions in binary form must reproduce the above copyright
30 1.1 oki * notice, this list of conditions and the following disclaimer in the
31 1.1 oki * documentation and/or other materials provided with the distribution.
32 1.1 oki * 3. The name of the author may not be used to endorse or promote products
33 1.1 oki * derived from this software without specific prior written permission.
34 1.1 oki *
35 1.1 oki * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
36 1.1 oki * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
37 1.1 oki * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
38 1.1 oki * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
39 1.1 oki * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
40 1.1 oki * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
41 1.1 oki * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
42 1.1 oki * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
43 1.1 oki * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
44 1.1 oki * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
45 1.1 oki * POSSIBILITY OF SUCH DAMAGE.
46 1.1 oki */
47 1.5 jonathan
48 1.5 jonathan #include "opt_ddb.h"
49 1.1 oki
50 1.1 oki /* Synchronous data transfers? */
51 1.1 oki #define SPC_USE_SYNCHRONOUS 0
52 1.1 oki #define SPC_SYNC_REQ_ACK_OFS 8
53 1.1 oki
54 1.4 msaitoh /* Default DMA mode? */
55 1.4 msaitoh #define MHA_DMA_LIMIT_XFER 1
56 1.4 msaitoh #define MHA_DMA_BURST_XFER 1
57 1.4 msaitoh #define MHA_DMA_SHORT_BUS_CYCLE 1
58 1.4 msaitoh
59 1.4 msaitoh #define MHA_DMA_DATAIN (0 | (MHA_DMA_LIMIT_XFER << 1) \
60 1.4 msaitoh | (MHA_DMA_BURST_XFER << 2) \
61 1.4 msaitoh | (MHA_DMA_SHORT_BUS_CYCLE << 3))
62 1.4 msaitoh #define MHA_DMA_DATAOUT (1 | (MHA_DMA_LIMIT_XFER << 1) \
63 1.4 msaitoh | (MHA_DMA_BURST_XFER << 2) \
64 1.4 msaitoh | (MHA_DMA_SHORT_BUS_CYCLE << 3))
65 1.4 msaitoh
66 1.1 oki /* Include debug functions? At the end of this file there are a bunch of
67 1.1 oki * functions that will print out various information regarding queued SCSI
68 1.1 oki * commands, driver state and chip contents. You can call them from the
69 1.1 oki * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the
70 1.1 oki * kernel uses less memory) but you lose the debugging facilities.
71 1.1 oki */
72 1.1 oki #define SPC_DEBUG 0
73 1.1 oki
74 1.1 oki /* End of customizable parameters */
75 1.1 oki
76 1.1 oki /*
77 1.1 oki * MB86601A SCSI Protocol Controller (SPC) routines for MANKAI Mach-2
78 1.1 oki */
79 1.1 oki
80 1.1 oki #include <sys/types.h>
81 1.1 oki #include <sys/param.h>
82 1.1 oki #include <sys/systm.h>
83 1.1 oki #include <sys/kernel.h>
84 1.1 oki #include <sys/errno.h>
85 1.1 oki #include <sys/ioctl.h>
86 1.1 oki #include <sys/device.h>
87 1.1 oki #include <sys/buf.h>
88 1.1 oki #include <sys/proc.h>
89 1.1 oki #include <sys/user.h>
90 1.1 oki #include <sys/queue.h>
91 1.1 oki
92 1.1 oki #include <dev/scsipi/scsi_all.h>
93 1.1 oki #include <dev/scsipi/scsipi_all.h>
94 1.1 oki #include <dev/scsipi/scsi_message.h>
95 1.1 oki #include <dev/scsipi/scsiconf.h>
96 1.1 oki
97 1.1 oki #include <x68k/x68k/iodevice.h>
98 1.1 oki #include <x68k/dev/mb86601reg.h>
99 1.1 oki #include <x68k/dev/mhavar.h>
100 1.1 oki #include <x68k/dev/dmavar.h>
101 1.1 oki
102 1.1 oki #if 0
103 1.1 oki #define WAIT {if (sc->sc_pc[2]) {printf("[W_%d", __LINE__); while (sc->sc_pc[2] & 0x40);printf("]");}}
104 1.1 oki #else
105 1.1 oki #define WAIT {while (sc->sc_pc[2] & 0x40);}
106 1.1 oki #endif
107 1.1 oki
108 1.1 oki #define SSR (sc->sc_pc[2])
109 1.1 oki #define SS_IREQUEST 0x80
110 1.1 oki #define SS_BUSY 0x40
111 1.1 oki #define SS_DREG_FULL 0x02
112 1.1 oki
113 1.1 oki #define NSR (sc->sc_pc[3])
114 1.1 oki
115 1.1 oki #define SIR (sc->sc_pc[4])
116 1.1 oki
117 1.1 oki #define CMR (sc->sc_pc[5])
118 1.1 oki #define CMD_SEL_AND_CMD 0x00
119 1.1 oki #define CMD_SELECT 0x09
120 1.1 oki #define CMD_SET_ATN 0x0a
121 1.1 oki #define CMD_RESET_ATN 0x0b
122 1.1 oki #define CMD_RESET_ACK 0x0d
123 1.1 oki #define CMD_SEND_FROM_MPU 0x10
124 1.1 oki #define CMD_SEND_FROM_DMA 0x11
125 1.1 oki #define CMD_RECEIVE_TO_MPU 0x12
126 1.1 oki #define CMD_RECEIVE_TO_DMA 0x13
127 1.1 oki #define CMD_RECEIVE_MSG 0x1a
128 1.1 oki #define CMD_RECEIVE_STS 0x1c
129 1.1 oki #define CMD_SOFT_RESET 0x40
130 1.1 oki #define CMD_SCSI_RESET 0x42
131 1.1 oki #define CMD_SET_UP_REG 0x43
132 1.1 oki
133 1.1 oki #define SCR (sc->sc_pc[11])
134 1.1 oki
135 1.1 oki #define TMR (sc->sc_pc[12])
136 1.1 oki #define TM_SYNC 0x80
137 1.1 oki #define TM_ASYNC 0x00
138 1.1 oki
139 1.1 oki #define WAR (sc->sc_pc[15])
140 1.1 oki #define WA_MCSBUFWIN 0x00
141 1.1 oki #define WA_UPMWIN 0x80
142 1.1 oki #define WA_INITWIN 0xc0
143 1.1 oki
144 1.1 oki #define MBR (sc->sc_pc[15])
145 1.1 oki
146 1.1 oki #define ISCSR (sc->sc_ps[2])
147 1.1 oki
148 1.1 oki #define CCR (sc->sc_pcx[0])
149 1.1 oki #define OIR (sc->sc_pcx[1])
150 1.1 oki #define AMR (sc->sc_pcx[2])
151 1.1 oki #define SMR (sc->sc_pcx[3])
152 1.1 oki #define SRR (sc->sc_pcx[4])
153 1.1 oki #define STR (sc->sc_pcx[5])
154 1.1 oki #define RTR (sc->sc_pcx[6])
155 1.1 oki #define ATR (sc->sc_pcx[7])
156 1.1 oki #define PER (sc->sc_pcx[8])
157 1.1 oki #define IER (sc->sc_pcx[9])
158 1.1 oki #define IE_ALL 0xBF
159 1.1 oki
160 1.1 oki #define GLR (sc->sc_pcx[10])
161 1.1 oki #define DMR (sc->sc_pcx[11])
162 1.1 oki #define IMR (sc->sc_pcx[12])
163 1.1 oki
164 1.1 oki
165 1.1 oki #ifndef DDB
167 1.1 oki #define Debugger() panic("should call debugger here (mha.c)")
168 1.1 oki #endif /* ! DDB */
169 1.1 oki
170 1.1 oki
171 1.1 oki #if SPC_DEBUG
172 1.1 oki #define SPC_SHOWACBS 0x01
173 1.1 oki #define SPC_SHOWINTS 0x02
174 1.1 oki #define SPC_SHOWCMDS 0x04
175 1.1 oki #define SPC_SHOWMISC 0x08
176 1.1 oki #define SPC_SHOWTRAC 0x10
177 1.1 oki #define SPC_SHOWSTART 0x20
178 1.1 oki #define SPC_SHOWPHASE 0x40
179 1.1 oki #define SPC_SHOWDMA 0x80
180 1.1 oki #define SPC_SHOWCCMDS 0x100
181 1.1 oki #define SPC_SHOWMSGS 0x200
182 1.1 oki #define SPC_DOBREAK 0x400
183 1.1 oki
184 1.1 oki int mha_debug =
185 1.1 oki #if 0
186 1.1 oki 0x7FF;
187 1.1 oki #else
188 1.1 oki SPC_SHOWSTART|SPC_SHOWTRAC;
189 1.1 oki #endif
190 1.1 oki
191 1.1 oki
192 1.1 oki #define SPC_ACBS(str) do {if (mha_debug & SPC_SHOWACBS) printf str;} while (0)
193 1.1 oki #define SPC_MISC(str) do {if (mha_debug & SPC_SHOWMISC) printf str;} while (0)
194 1.1 oki #define SPC_INTS(str) do {if (mha_debug & SPC_SHOWINTS) printf str;} while (0)
195 1.1 oki #define SPC_TRACE(str) do {if (mha_debug & SPC_SHOWTRAC) printf str;} while (0)
196 1.1 oki #define SPC_CMDS(str) do {if (mha_debug & SPC_SHOWCMDS) printf str;} while (0)
197 1.1 oki #define SPC_START(str) do {if (mha_debug & SPC_SHOWSTART) printf str;}while (0)
198 1.1 oki #define SPC_PHASE(str) do {if (mha_debug & SPC_SHOWPHASE) printf str;}while (0)
199 1.1 oki #define SPC_DMA(str) do {if (mha_debug & SPC_SHOWDMA) printf str;}while (0)
200 1.1 oki #define SPC_MSGS(str) do {if (mha_debug & SPC_SHOWMSGS) printf str;}while (0)
201 1.1 oki #define SPC_BREAK() do {if ((mha_debug & SPC_DOBREAK) != 0) Debugger();} while (0)
202 1.1 oki #define SPC_ASSERT(x) do {if (x) {} else {printf("%s at line %d: assertion failed\n", sc->sc_dev.dv_xname, __LINE__); Debugger();}} while (0)
203 1.1 oki #else
204 1.1 oki #define SPC_ACBS(str)
205 1.1 oki #define SPC_MISC(str)
206 1.1 oki #define SPC_INTS(str)
207 1.1 oki #define SPC_TRACE(str)
208 1.1 oki #define SPC_CMDS(str)
209 1.1 oki #define SPC_START(str)
210 1.1 oki #define SPC_PHASE(str)
211 1.1 oki #define SPC_DMA(str)
212 1.1 oki #define SPC_MSGS(str)
213 1.1 oki #define SPC_BREAK()
214 1.1 oki #define SPC_ASSERT(x)
215 1.1 oki #endif
216 1.6 minoura
217 1.1 oki int mhamatch __P((struct device *, struct cfdata *, void *));
218 1.1 oki void mhaattach __P((struct device *, struct device *, void *));
219 1.1 oki void mhaselect __P((struct mha_softc *,
220 1.1 oki u_char, u_char, u_char *, u_char));
221 1.1 oki void mha_scsi_reset __P((struct mha_softc *));
222 1.1 oki void mha_reset __P((struct mha_softc *));
223 1.1 oki void mha_free_acb __P((struct mha_softc *, struct acb *, int));
224 1.1 oki void mha_sense __P((struct mha_softc *, struct acb *));
225 1.1 oki void mha_msgin __P((struct mha_softc *));
226 1.1 oki void mha_msgout __P((struct mha_softc *));
227 1.1 oki int mha_dataout_pio __P((struct mha_softc *, u_char *, int));
228 1.1 oki int mha_datain_pio __P((struct mha_softc *, u_char *, int));
229 1.1 oki int mha_dataout __P((struct mha_softc *, u_char *, int));
230 1.1 oki int mha_datain __P((struct mha_softc *, u_char *, int));
231 1.1 oki void mha_abort __P((struct mha_softc *, struct acb *));
232 1.1 oki void mha_init __P((struct mha_softc *));
233 1.1 oki int mha_scsi_cmd __P((struct scsipi_xfer *));
234 1.1 oki int mha_poll __P((struct mha_softc *, struct acb *));
235 1.1 oki void mha_sched __P((struct mha_softc *));
236 1.1 oki void mha_done __P((struct mha_softc *, struct acb *));
237 1.1 oki int mhaintr __P((int));
238 1.1 oki void mha_timeout __P((void *));
239 1.1 oki void mha_minphys __P((struct buf *));
240 1.1 oki void mha_dequeue __P((struct mha_softc *, struct acb *));
241 1.4 msaitoh inline void mha_setsync __P((struct mha_softc *, struct spc_tinfo *));
242 1.1 oki #if SPC_DEBUG
243 1.1 oki void mha_print_acb __P((struct acb *));
244 1.1 oki void mha_show_scsi_cmd __P((struct acb *));
245 1.1 oki void mha_print_active_acb __P((void));
246 1.1 oki void mha_dump_driver __P((struct mha_softc *));
247 1.1 oki #endif
248 1.1 oki volatile void * mha_find __P((int));
249 1.1 oki
250 1.1 oki static int mha_dataio_dma __P((int, int, struct mha_softc *, u_char *, int));
251 1.1 oki
252 1.1 oki struct cfattach mha_ca = {
253 1.1 oki sizeof(struct mha_softc), mhamatch, mhaattach
254 1.1 oki };
255 1.3 thorpej
256 1.1 oki extern struct cfdriver mha_cd;
257 1.1 oki
258 1.1 oki struct scsipi_adapter mha_switch = {
259 1.1 oki mha_scsi_cmd,
260 1.9 thorpej mha_minphys,
261 1.1 oki NULL, /* scsipi_ioctl */
262 1.1 oki };
263 1.1 oki
264 1.1 oki struct scsipi_device mha_dev = {
265 1.1 oki NULL, /* Use default error handler */
266 1.1 oki NULL, /* have a queue, served by this */
267 1.1 oki NULL, /* have no async handler */
268 1.1 oki NULL, /* Use default 'done' routine */
269 1.1 oki };
270 1.1 oki
271 1.1 oki /*
273 1.1 oki * returns non-zero value if a controller is found.
274 1.6 minoura */
275 1.1 oki int
276 1.6 minoura mhamatch(parent, cf, aux)
277 1.6 minoura struct device *parent;
278 1.1 oki struct cfdata *cf;
279 1.1 oki void *aux;
280 1.1 oki {
281 1.1 oki if (strcmp(aux, "mha") || mha_find(cf->cf_unit) == 0)
282 1.1 oki return 0;
283 1.1 oki return 1;
284 1.1 oki }
285 1.1 oki
286 1.1 oki /*
287 1.1 oki * Find the board
288 1.1 oki */
289 1.1 oki volatile void *
290 1.1 oki mha_find(unit)
291 1.1 oki int unit;
292 1.1 oki {
293 1.1 oki volatile void *addr;
294 1.1 oki
295 1.1 oki if (unit > 1)
296 1.6 minoura return 0;
297 1.6 minoura /* Find only on-board ROM */
298 1.6 minoura if (badaddr(IODEVbase->exscsirom)
299 1.6 minoura || bcmp((void *)&IODEVbase->exscsirom[0x24], "SCSIEX", 6))
300 1.6 minoura return 0;
301 1.6 minoura
302 1.6 minoura /* If bdid exists, this board is ``CZ-6BS1'' */
303 1.1 oki if (!badbaddr(&IODEVbase->io_exspc.bdid))
304 1.1 oki return 0;
305 1.1 oki
306 1.1 oki return (void *)(&IODEVbase->exscsirom[0x60]);
307 1.1 oki }
308 1.1 oki
309 1.1 oki /*
310 1.1 oki */
311 1.1 oki
312 1.1 oki struct mha_softc *tmpsc;
313 1.1 oki
314 1.1 oki void
315 1.1 oki mhaattach(parent, self, aux)
316 1.1 oki struct device *parent, *self;
317 1.1 oki void *aux;
318 1.1 oki {
319 1.1 oki struct mha_softc *sc = (void *)self;
320 1.1 oki
321 1.1 oki tmpsc = sc; /* XXX */
322 1.1 oki
323 1.1 oki SPC_TRACE(("mhaattach "));
324 1.1 oki sc->sc_state = SPC_INIT;
325 1.1 oki sc->sc_iobase = mha_find(sc->sc_dev.dv_unit); /* XXX */
326 1.1 oki
327 1.1 oki sc->sc_pc = (volatile u_char *)sc->sc_iobase;
328 1.1 oki sc->sc_ps = (volatile u_short *)sc->sc_iobase;
329 1.1 oki sc->sc_pcx = &sc->sc_pc[0x10];
330 1.1 oki
331 1.1 oki sc->sc_id = IODEVbase->io_sram[0x70] & 0x7; /* XXX */
332 1.1 oki
333 1.1 oki mha_init(sc); /* Init chip and driver */
334 1.1 oki sc->sc_phase = BUSFREE_PHASE;
335 1.1 oki
336 1.1 oki /*
337 1.1 oki * Fill in the prototype scsi_link
338 1.1 oki */
339 1.1 oki sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
340 1.1 oki sc->sc_link.adapter_softc = sc;
341 1.1 oki sc->sc_link.scsipi_scsi.adapter_target = sc->sc_id;
342 1.1 oki sc->sc_link.adapter = &mha_switch;
343 1.1 oki sc->sc_link.device = &mha_dev;
344 1.1 oki sc->sc_link.openings = 2;
345 1.1 oki sc->sc_link.scsipi_scsi.max_target = 7;
346 1.1 oki sc->sc_link.type = BUS_SCSI;
347 1.1 oki
348 1.1 oki sc->sc_spcinitialized = 0;
349 1.1 oki WAR = WA_INITWIN;
350 1.1 oki #if 1
351 1.1 oki CCR = 0x14;
352 1.1 oki OIR = sc->sc_id;
353 1.1 oki AMR = 0x00;
354 1.1 oki SMR = 0x00;
355 1.1 oki SRR = 0x00;
356 1.1 oki STR = 0x20;
357 1.1 oki RTR = 0x40;
358 1.1 oki ATR = 0x01;
359 1.1 oki PER = 0xc9;
360 1.1 oki #endif
361 1.1 oki IER = IE_ALL; /* $B$9$Y$F$N3d$j9~$_$r5v2D(B */
362 1.1 oki #if 1
363 1.1 oki GLR = 0x00;
364 1.1 oki DMR = 0x30;
365 1.1 oki IMR = 0x00;
366 1.1 oki #endif
367 1.1 oki WAR = WA_MCSBUFWIN;
368 1.1 oki
369 1.1 oki /* drop off */
370 1.1 oki while (SSR & SS_IREQUEST)
371 1.1 oki {
372 1.1 oki unsigned a = ISCSR;
373 1.1 oki }
374 1.1 oki
375 1.1 oki CMR = CMD_SET_UP_REG; /* setup reg cmd. */
376 1.8 minoura
377 1.8 minoura SPC_TRACE(("waiting for intr..."));
378 1.8 minoura while (!(SSR & SS_IREQUEST))
379 1.1 oki delay(10);
380 1.1 oki mhaintr (sc->sc_dev.dv_unit);
381 1.1 oki
382 1.1 oki tmpsc = NULL;
383 1.1 oki
384 1.1 oki printf("\n");
385 1.1 oki
386 1.1 oki config_found(self, &sc->sc_link, scsiprint);
387 1.1 oki }
388 1.1 oki
389 1.1 oki void
390 1.1 oki mha_reset(sc)
391 1.1 oki struct mha_softc *sc;
392 1.1 oki {
393 1.1 oki u_short dummy;
394 1.1 oki printf("reset...");
395 1.1 oki CMR = CMD_SOFT_RESET;
396 1.1 oki asm volatile ("nop"); /* XXX wait (4clk in 20mhz) ??? */
397 1.1 oki dummy = sc->sc_ps[-1];
398 1.1 oki dummy = sc->sc_ps[-1];
399 1.1 oki dummy = sc->sc_ps[-1];
400 1.1 oki dummy = sc->sc_ps[-1];
401 1.1 oki asm volatile ("nop");
402 1.1 oki CMR = CMD_SOFT_RESET;
403 1.1 oki sc->sc_spcinitialized = 0;
404 1.1 oki CMR = CMD_SET_UP_REG; /* setup reg cmd. */
405 1.1 oki while(!sc->sc_spcinitialized);
406 1.1 oki
407 1.1 oki sc->sc_id = IODEVbase->io_sram[0x70] & 0x7; /* XXX */
408 1.1 oki printf("done.\n");
409 1.1 oki }
410 1.1 oki
411 1.1 oki /*
412 1.1 oki * Pull the SCSI RST line for 500us.
413 1.1 oki */
414 1.1 oki void
415 1.1 oki mha_scsi_reset(sc) /* FINISH? */
416 1.1 oki struct mha_softc *sc;
417 1.1 oki {
418 1.1 oki
419 1.1 oki CMR = CMD_SCSI_RESET; /* SCSI RESET */
420 1.1 oki WAIT;
421 1.1 oki }
422 1.1 oki
423 1.1 oki /*
424 1.1 oki * Initialize mha SCSI driver.
425 1.1 oki */
426 1.1 oki void
427 1.1 oki mha_init(sc)
428 1.1 oki struct mha_softc *sc;
429 1.1 oki {
430 1.1 oki struct acb *acb;
431 1.1 oki int r;
432 1.1 oki
433 1.1 oki if (sc->sc_state == SPC_INIT) {
434 1.1 oki /* First time through; initialize. */
435 1.1 oki TAILQ_INIT(&sc->ready_list);
436 1.1 oki TAILQ_INIT(&sc->nexus_list);
437 1.1 oki TAILQ_INIT(&sc->free_list);
438 1.1 oki sc->sc_nexus = NULL;
439 1.1 oki acb = sc->sc_acb;
440 1.1 oki bzero(acb, sizeof(sc->sc_acb));
441 1.1 oki for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
442 1.1 oki TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
443 1.1 oki acb++;
444 1.1 oki }
445 1.1 oki bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo));
446 1.1 oki } else {
447 1.1 oki /* Cancel any active commands. */
448 1.1 oki sc->sc_flags |= SPC_ABORTING;
449 1.1 oki sc->sc_state = SPC_IDLE;
450 1.1 oki if ((acb = sc->sc_nexus) != NULL) {
451 1.1 oki acb->xs->error = XS_DRIVER_STUFFUP;
452 1.1 oki mha_done(sc, acb);
453 1.1 oki }
454 1.1 oki while ((acb = sc->nexus_list.tqh_first) != NULL) {
455 1.1 oki acb->xs->error = XS_DRIVER_STUFFUP;
456 1.1 oki mha_done(sc, acb);
457 1.1 oki }
458 1.1 oki }
459 1.1 oki
460 1.1 oki sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
461 1.1 oki for (r = 0; r < 8; r++) {
462 1.1 oki struct spc_tinfo *ti = &sc->sc_tinfo[r];
463 1.1 oki
464 1.1 oki ti->flags = 0;
465 1.1 oki #if SPC_USE_SYNCHRONOUS
466 1.1 oki ti->flags |= T_SYNCMODE;
467 1.1 oki ti->period = sc->sc_minsync;
468 1.1 oki ti->offset = SPC_SYNC_REQ_ACK_OFS;
469 1.1 oki #else
470 1.1 oki ti->period = ti->offset = 0;
471 1.1 oki #endif
472 1.1 oki ti->width = 0;
473 1.1 oki }
474 1.1 oki
475 1.1 oki sc->sc_state = SPC_IDLE;
476 1.1 oki #if 0
477 1.1 oki mha_reset(sc);
478 1.1 oki #endif
479 1.1 oki }
480 1.1 oki
481 1.1 oki void
482 1.1 oki mha_free_acb(sc, acb, flags)
483 1.1 oki struct mha_softc *sc;
484 1.1 oki struct acb *acb;
485 1.1 oki int flags;
486 1.1 oki {
487 1.1 oki int s;
488 1.1 oki
489 1.1 oki s = splbio();
490 1.1 oki
491 1.1 oki acb->flags = 0;
492 1.1 oki TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
493 1.1 oki
494 1.1 oki /*
495 1.1 oki * If there were none, wake anybody waiting for one to come free,
496 1.1 oki * starting with queued entries.
497 1.1 oki */
498 1.1 oki if (acb->chain.tqe_next == 0)
499 1.1 oki wakeup(&sc->free_list);
500 1.1 oki
501 1.1 oki splx(s);
502 1.1 oki }
503 1.1 oki
504 1.1 oki
505 1.1 oki /*
507 1.1 oki * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
508 1.1 oki */
509 1.1 oki
510 1.1 oki /*
511 1.1 oki * Expected sequence:
512 1.1 oki * 1) Command inserted into ready list
513 1.1 oki * 2) Command selected for execution
514 1.1 oki * 3) Command won arbitration and has selected target device
515 1.1 oki * 4) Send message out (identify message, eventually also sync.negotiations)
516 1.1 oki * 5) Send command
517 1.1 oki * 5a) Receive disconnect message, disconnect.
518 1.1 oki * 5b) Reselected by target
519 1.1 oki * 5c) Receive identify message from target.
520 1.1 oki * 6) Send or receive data
521 1.1 oki * 7) Receive status
522 1.1 oki * 8) Receive message (command complete etc.)
523 1.1 oki * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd.
524 1.1 oki * Repeat 2-8 (no disconnects please...)
525 1.1 oki */
526 1.1 oki
527 1.1 oki /*
528 1.1 oki * Start a selection. This is used by mha_sched() to select an idle target,
529 1.1 oki * and by mha_done() to immediately reselect a target to get sense information.
530 1.1 oki */
531 1.1 oki void
532 1.1 oki mhaselect(sc, target, lun, cmd, clen)
533 1.1 oki struct mha_softc *sc;
534 1.1 oki u_char target, lun;
535 1.1 oki u_char *cmd;
536 1.1 oki u_char clen;
537 1.1 oki {
538 1.1 oki #if 0
539 1.1 oki struct scsi_link *sc_link = acb->xs->sc_link;
540 1.1 oki #endif
541 1.1 oki struct spc_tinfo *ti = &sc->sc_tinfo[target];
542 1.1 oki int i;
543 1.1 oki int s;
544 1.1 oki
545 1.1 oki s = splbio(); /* XXX */
546 1.1 oki
547 1.1 oki SPC_TRACE(("[mhaselect(t%d,l%d,cmd:%x)] ", target, lun, *(u_char *)cmd));
548 1.1 oki
549 1.1 oki /* CDB $B$r(B SPC $B$N(B MCS REG $B$K%;%C%H$9$k(B */
550 1.1 oki /* Now the command into the FIFO */
551 1.1 oki WAIT;
552 1.1 oki #if 1
553 1.1 oki SPC_MISC(("[cmd:"));
554 1.1 oki for (i = 0; i < clen; i++)
555 1.1 oki {
556 1.1 oki unsigned c = cmd[i];
557 1.1 oki if (i == 1)
558 1.1 oki c |= lun << 5;
559 1.1 oki SPC_MISC((" %02x", c));
560 1.1 oki sc->sc_pcx[i] = c;
561 1.1 oki }
562 1.1 oki SPC_MISC(("], target=%d\n", target));
563 1.1 oki #else
564 1.1 oki bcopy(cmd, sc->sc_pcx, clen);
565 1.1 oki #endif
566 1.1 oki if (NSR & 0x80)
567 1.1 oki panic("scsistart: already selected...");
568 1.1 oki sc->sc_phase = COMMAND_PHASE;
569 1.1 oki
570 1.1 oki /* new state ASP_SELECTING */
571 1.1 oki sc->sc_state = SPC_SELECTING;
572 1.1 oki
573 1.1 oki SIR = target;
574 1.1 oki #if 0
575 1.1 oki CMR = CMD_SELECT;
576 1.1 oki #else
577 1.1 oki CMR = CMD_SEL_AND_CMD; /* select & cmd */
578 1.1 oki #endif
579 1.1 oki splx(s);
580 1.1 oki }
581 1.1 oki
582 1.1 oki #if 0
583 1.1 oki int
584 1.1 oki mha_reselect(sc, message)
585 1.1 oki struct mha_softc *sc;
586 1.1 oki u_char message;
587 1.1 oki {
588 1.1 oki u_char selid, target, lun;
589 1.1 oki struct acb *acb;
590 1.1 oki struct scsipi_link *sc_link;
591 1.1 oki struct spc_tinfo *ti;
592 1.1 oki
593 1.1 oki /*
594 1.1 oki * The SCSI chip made a snapshot of the data bus while the reselection
595 1.1 oki * was being negotiated. This enables us to determine which target did
596 1.1 oki * the reselect.
597 1.1 oki */
598 1.1 oki selid = sc->sc_selid & ~(1 << sc->sc_id);
599 1.1 oki if (selid & (selid - 1)) {
600 1.1 oki printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n",
601 1.1 oki sc->sc_dev.dv_xname, selid);
602 1.1 oki SPC_BREAK();
603 1.1 oki goto reset;
604 1.1 oki }
605 1.1 oki
606 1.1 oki /*
607 1.1 oki * Search wait queue for disconnected cmd
608 1.1 oki * The list should be short, so I haven't bothered with
609 1.1 oki * any more sophisticated structures than a simple
610 1.1 oki * singly linked list.
611 1.1 oki */
612 1.1 oki target = ffs(selid) - 1;
613 1.1 oki lun = message & 0x07;
614 1.1 oki for (acb = sc->nexus_list.tqh_first; acb != NULL;
615 1.1 oki acb = acb->chain.tqe_next) {
616 1.1 oki sc_link = acb->xs->sc_link;
617 1.1 oki if (sc_link->scsipi_scsi.target == target &&
618 1.1 oki sc_link->scsipi_scsi.lun == lun)
619 1.1 oki break;
620 1.1 oki }
621 1.1 oki if (acb == NULL) {
622 1.1 oki printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n",
623 1.1 oki sc->sc_dev.dv_xname, target, lun);
624 1.1 oki SPC_BREAK();
625 1.1 oki goto abort;
626 1.1 oki }
627 1.1 oki
628 1.1 oki /* Make this nexus active again. */
629 1.1 oki TAILQ_REMOVE(&sc->nexus_list, acb, chain);
630 1.1 oki sc->sc_state = SPC_HASNEXUS;
631 1.1 oki sc->sc_nexus = acb;
632 1.1 oki ti = &sc->sc_tinfo[target];
633 1.1 oki ti->lubusy |= (1 << lun);
634 1.1 oki mha_setsync(sc, ti);
635 1.1 oki
636 1.1 oki if (acb->flags & ACB_RESET)
637 1.1 oki mha_sched_msgout(sc, SEND_DEV_RESET);
638 1.1 oki else if (acb->flags & ACB_ABORTED)
639 1.1 oki mha_sched_msgout(sc, SEND_ABORT);
640 1.1 oki
641 1.1 oki /* Do an implicit RESTORE POINTERS. */
642 1.1 oki sc->sc_dp = acb->daddr;
643 1.1 oki sc->sc_dleft = acb->dleft;
644 1.1 oki sc->sc_cp = (u_char *)&acb->cmd;
645 1.1 oki sc->sc_cleft = acb->clen;
646 1.1 oki
647 1.1 oki return (0);
648 1.1 oki
649 1.1 oki reset:
650 1.1 oki mha_sched_msgout(sc, SEND_DEV_RESET);
651 1.1 oki return (1);
652 1.1 oki
653 1.1 oki abort:
654 1.1 oki mha_sched_msgout(sc, SEND_ABORT);
655 1.1 oki return (1);
656 1.1 oki }
657 1.1 oki #endif
658 1.1 oki /*
659 1.1 oki * Start a SCSI-command
660 1.1 oki * This function is called by the higher level SCSI-driver to queue/run
661 1.1 oki * SCSI-commands.
662 1.1 oki */
663 1.1 oki int
664 1.1 oki mha_scsi_cmd(xs)
665 1.1 oki struct scsipi_xfer *xs;
666 1.1 oki {
667 1.1 oki struct scsipi_link *sc_link = xs->sc_link;
668 1.1 oki struct mha_softc *sc = sc_link->adapter_softc;
669 1.1 oki struct acb *acb;
670 1.1 oki int s, flags;
671 1.1 oki
672 1.1 oki SPC_TRACE(("[mha_scsi_cmd] "));
673 1.1 oki SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
674 1.1 oki sc_link->scsipi_scsi.target));
675 1.1 oki
676 1.1 oki flags = xs->flags;
677 1.1 oki
678 1.1 oki /* Get a mha command block */
679 1.1 oki s = splbio();
680 1.1 oki acb = sc->free_list.tqh_first;
681 1.1 oki if (acb) {
682 1.1 oki TAILQ_REMOVE(&sc->free_list, acb, chain);
683 1.1 oki ACB_SETQ(acb, ACB_QNONE);
684 1.1 oki }
685 1.1 oki splx(s);
686 1.1 oki
687 1.1 oki if (acb == NULL) {
688 1.1 oki SPC_MISC(("TRY_AGAIN_LATER"));
689 1.1 oki return TRY_AGAIN_LATER;
690 1.1 oki }
691 1.1 oki
692 1.1 oki /* Initialize acb */
693 1.1 oki acb->xs = xs;
694 1.1 oki bcopy(xs->cmd, &acb->cmd, xs->cmdlen);
695 1.1 oki acb->clen = xs->cmdlen;
696 1.1 oki acb->daddr = xs->data;
697 1.1 oki acb->dleft = xs->datalen;
698 1.1 oki acb->stat = 0;
699 1.1 oki
700 1.1 oki s = splbio();
701 1.1 oki ACB_SETQ(acb, ACB_QREADY);
702 1.1 oki TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
703 1.1 oki #if 1
704 1.1 oki timeout(mha_timeout, acb, (xs->timeout*hz)/1000);
705 1.1 oki #endif
706 1.1 oki
707 1.1 oki /*
708 1.1 oki * $B%-%e!<$N=hM}Cf$G$J$1$l$P!"%9%1%8%e!<%j%s%03+;O$9$k(B
709 1.1 oki */
710 1.1 oki if (sc->sc_state == SPC_IDLE)
711 1.1 oki mha_sched(sc);
712 1.1 oki
713 1.1 oki splx(s);
714 1.1 oki
715 1.1 oki if (flags & SCSI_POLL) {
716 1.1 oki /* Not allowed to use interrupts, use polling instead */
717 1.1 oki return mha_poll(sc, acb);
718 1.1 oki }
719 1.1 oki
720 1.1 oki SPC_MISC(("SUCCESSFULLY_QUEUED"));
721 1.1 oki return SUCCESSFULLY_QUEUED;
722 1.1 oki }
723 1.1 oki
724 1.1 oki /*
725 1.1 oki * Adjust transfer size in buffer structure
726 1.1 oki */
727 1.1 oki void
728 1.1 oki mha_minphys(bp)
729 1.1 oki struct buf *bp;
730 1.1 oki {
731 1.1 oki
732 1.1 oki SPC_TRACE(("mha_minphys "));
733 1.1 oki minphys(bp);
734 1.1 oki }
735 1.1 oki
736 1.1 oki /*
737 1.1 oki * Used when interrupt driven I/O isn't allowed, e.g. during boot.
738 1.1 oki */
739 1.1 oki int
740 1.1 oki mha_poll(sc, acb)
741 1.1 oki struct mha_softc *sc;
742 1.1 oki struct acb *acb;
743 1.1 oki {
744 1.1 oki struct scsipi_xfer *xs = acb->xs;
745 1.1 oki int count = xs->timeout * 100;
746 1.1 oki int s = splbio();
747 1.1 oki
748 1.1 oki SPC_TRACE(("[mha_poll] "));
749 1.1 oki
750 1.1 oki while (count) {
751 1.1 oki /*
752 1.1 oki * If we had interrupts enabled, would we
753 1.1 oki * have got an interrupt?
754 1.1 oki */
755 1.1 oki if (SSR & SS_IREQUEST)
756 1.1 oki mhaintr(sc->sc_dev.dv_unit);
757 1.1 oki if ((xs->flags & ITSDONE) != 0)
758 1.1 oki break;
759 1.1 oki DELAY(10);
760 1.1 oki #if 1
761 1.1 oki if (sc->sc_state == SPC_IDLE) {
762 1.1 oki SPC_TRACE(("[mha_poll: rescheduling] "));
763 1.1 oki mha_sched(sc);
764 1.1 oki }
765 1.1 oki #endif
766 1.1 oki count--;
767 1.1 oki }
768 1.1 oki
769 1.1 oki if (count == 0) {
770 1.1 oki SPC_MISC(("mha_poll: timeout"));
771 1.1 oki mha_timeout((caddr_t)acb);
772 1.1 oki }
773 1.1 oki splx(s);
774 1.1 oki return COMPLETE;
775 1.1 oki }
776 1.1 oki
777 1.1 oki /*
779 1.1 oki * LOW LEVEL SCSI UTILITIES
780 1.1 oki */
781 1.1 oki
782 1.1 oki /*
783 1.1 oki * Set synchronous transfer offset and period.
784 1.1 oki */
785 1.1 oki inline void
786 1.1 oki mha_setsync(sc, ti)
787 1.1 oki struct mha_softc *sc;
788 1.1 oki struct spc_tinfo *ti;
789 1.1 oki {
790 1.1 oki }
791 1.1 oki
792 1.1 oki
793 1.1 oki /*
795 1.1 oki * Schedule a SCSI operation. This has now been pulled out of the interrupt
796 1.1 oki * handler so that we may call it from mha_scsi_cmd and mha_done. This may
797 1.1 oki * save us an unecessary interrupt just to get things going. Should only be
798 1.1 oki * called when state == SPC_IDLE and at bio pl.
799 1.1 oki */
800 1.1 oki void
801 1.1 oki mha_sched(sc)
802 1.1 oki register struct mha_softc *sc;
803 1.1 oki {
804 1.1 oki struct scsipi_link *sc_link;
805 1.1 oki struct acb *acb;
806 1.1 oki int t;
807 1.1 oki
808 1.1 oki SPC_TRACE(("[mha_sched] "));
809 1.1 oki if (sc->sc_state != SPC_IDLE)
810 1.1 oki panic("mha_sched: not IDLE (state=%d)", sc->sc_state);
811 1.1 oki
812 1.1 oki if (sc->sc_flags & SPC_ABORTING)
813 1.1 oki return;
814 1.1 oki
815 1.1 oki /*
816 1.1 oki * Find first acb in ready queue that is for a target/lunit
817 1.1 oki * combinations that is not busy.
818 1.1 oki */
819 1.1 oki for (acb = sc->ready_list.tqh_first; acb ; acb = acb->chain.tqe_next) {
820 1.1 oki struct spc_tinfo *ti;
821 1.1 oki sc_link = acb->xs->sc_link;
822 1.1 oki t = sc_link->scsipi_scsi.target;
823 1.1 oki ti = &sc->sc_tinfo[t];
824 1.1 oki if (!(ti->lubusy & (1 << sc_link->scsipi_scsi.lun))) {
825 1.1 oki if ((acb->flags & ACB_QBITS) != ACB_QREADY)
826 1.1 oki panic("mha: busy entry on ready list");
827 1.1 oki TAILQ_REMOVE(&sc->ready_list, acb, chain);
828 1.1 oki ACB_SETQ(acb, ACB_QNONE);
829 1.1 oki sc->sc_nexus = acb;
830 1.1 oki sc->sc_flags = 0;
831 1.1 oki sc->sc_prevphase = INVALID_PHASE;
832 1.1 oki sc->sc_dp = acb->daddr;
833 1.1 oki sc->sc_dleft = acb->dleft;
834 1.1 oki ti->lubusy |= (1<<sc_link->scsipi_scsi.lun);
835 1.1 oki mhaselect(sc, t, sc_link->scsipi_scsi.lun,
836 1.1 oki (u_char *)&acb->cmd, acb->clen);
837 1.1 oki break;
838 1.1 oki } else {
839 1.1 oki SPC_MISC(("%d:%d busy\n",
840 1.1 oki sc_link->scsipi_scsi.target,
841 1.1 oki sc_link->scsipi_scsi.lun));
842 1.1 oki }
843 1.1 oki }
844 1.1 oki }
845 1.1 oki
846 1.1 oki void
848 1.1 oki mha_sense(sc, acb)
849 1.1 oki struct mha_softc *sc;
850 1.1 oki struct acb *acb;
851 1.1 oki {
852 1.1 oki struct scsipi_xfer *xs = acb->xs;
853 1.1 oki struct scsipi_link *sc_link = xs->sc_link;
854 1.1 oki struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
855 1.1 oki struct scsipi_sense *ss = (void *)&acb->cmd;
856 1.1 oki
857 1.1 oki SPC_MISC(("requesting sense "));
858 1.1 oki /* Next, setup a request sense command block */
859 1.1 oki bzero(ss, sizeof(*ss));
860 1.1 oki ss->opcode = REQUEST_SENSE;
861 1.1 oki ss->byte2 = sc_link->scsipi_scsi.lun << 5;
862 1.1 oki ss->length = sizeof(struct scsipi_sense_data);
863 1.1 oki acb->clen = sizeof(*ss);
864 1.1 oki acb->daddr = (char *)&xs->sense;
865 1.1 oki acb->dleft = sizeof(struct scsipi_sense_data);
866 1.1 oki acb->flags |= ACB_CHKSENSE;
867 1.1 oki ti->senses++;
868 1.1 oki if (acb->flags & ACB_QNEXUS)
869 1.1 oki ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun);
870 1.1 oki if (acb == sc->sc_nexus) {
871 1.1 oki mhaselect(sc, sc_link->scsipi_scsi.target,
872 1.1 oki sc_link->scsipi_scsi.lun,
873 1.1 oki (void *)&acb->cmd, acb->clen);
874 1.1 oki } else {
875 1.1 oki mha_dequeue(sc, acb);
876 1.1 oki TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
877 1.1 oki if (sc->sc_state == SPC_IDLE)
878 1.1 oki mha_sched(sc);
879 1.1 oki }
880 1.1 oki }
881 1.1 oki
882 1.1 oki /*
883 1.1 oki * POST PROCESSING OF SCSI_CMD (usually current)
884 1.1 oki */
885 1.1 oki void
886 1.1 oki mha_done(sc, acb)
887 1.1 oki struct mha_softc *sc;
888 1.1 oki struct acb *acb;
889 1.1 oki {
890 1.1 oki struct scsipi_xfer *xs = acb->xs;
891 1.1 oki struct scsipi_link *sc_link = xs->sc_link;
892 1.1 oki struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
893 1.1 oki
894 1.1 oki SPC_TRACE(("[mha_done(error:%x)] ", xs->error));
895 1.1 oki
896 1.1 oki #if 1
897 1.1 oki untimeout(mha_timeout, acb);
898 1.1 oki #endif
899 1.1 oki
900 1.1 oki /*
901 1.1 oki * Now, if we've come here with no error code, i.e. we've kept the
902 1.1 oki * initial XS_NOERROR, and the status code signals that we should
903 1.1 oki * check sense, we'll need to set up a request sense cmd block and
904 1.1 oki * push the command back into the ready queue *before* any other
905 1.1 oki * commands for this target/lunit, else we lose the sense info.
906 1.1 oki * We don't support chk sense conditions for the request sense cmd.
907 1.4 msaitoh */
908 1.4 msaitoh if (xs->error == XS_NOERROR) {
909 1.4 msaitoh if ((acb->flags & ACB_ABORTED) != 0) {
910 1.4 msaitoh xs->error = XS_TIMEOUT;
911 1.4 msaitoh } else if (acb->flags & ACB_CHKSENSE) {
912 1.4 msaitoh xs->error = XS_SENSE;
913 1.4 msaitoh } else {
914 1.4 msaitoh switch (acb->stat & ST_MASK) {
915 1.4 msaitoh case SCSI_CHECK:
916 1.4 msaitoh {
917 1.4 msaitoh struct scsipi_sense *ss = (void *)&acb->cmd;
918 1.4 msaitoh SPC_MISC(("requesting sense "));
919 1.4 msaitoh /* First, save the return values */
920 1.4 msaitoh xs->resid = acb->dleft;
921 1.4 msaitoh xs->status = acb->stat;
922 1.4 msaitoh /* Next, setup a request sense command block */
923 1.4 msaitoh bzero(ss, sizeof(*ss));
924 1.4 msaitoh ss->opcode = REQUEST_SENSE;
925 1.1 oki /*ss->byte2 = sc_link->lun << 5;*/
926 1.4 msaitoh ss->length = sizeof(struct scsipi_sense_data);
927 1.4 msaitoh acb->clen = sizeof(*ss);
928 1.4 msaitoh acb->daddr = (char *)&xs->sense;
929 1.4 msaitoh acb->dleft = sizeof(struct scsipi_sense_data);
930 1.4 msaitoh acb->flags |= ACB_CHKSENSE;
931 1.4 msaitoh /*XXX - must take off queue here */
932 1.4 msaitoh if (acb != sc->sc_nexus) {
933 1.4 msaitoh panic("%s: mha_sched: floating acb %p",
934 1.4 msaitoh sc->sc_dev.dv_xname, acb);
935 1.4 msaitoh }
936 1.4 msaitoh TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
937 1.4 msaitoh ACB_SETQ(acb, ACB_QREADY);
938 1.4 msaitoh ti->lubusy &= ~(1<<sc_link->scsipi_scsi.lun);
939 1.4 msaitoh ti->senses++;
940 1.4 msaitoh timeout(mha_timeout, acb, (xs->timeout*hz)/1000);
941 1.4 msaitoh if (sc->sc_nexus == acb) {
942 1.4 msaitoh sc->sc_nexus = NULL;
943 1.4 msaitoh sc->sc_state = SPC_IDLE;
944 1.1 oki mha_sched(sc);
945 1.4 msaitoh }
946 1.4 msaitoh #if 0
947 1.4 msaitoh mha_sense(sc, acb);
948 1.4 msaitoh #endif
949 1.4 msaitoh return;
950 1.4 msaitoh }
951 1.4 msaitoh case SCSI_BUSY:
952 1.4 msaitoh xs->error = XS_BUSY;
953 1.4 msaitoh break;
954 1.4 msaitoh case SCSI_OK:
955 1.4 msaitoh xs->resid = acb->dleft;
956 1.4 msaitoh break;
957 1.4 msaitoh default:
958 1.1 oki xs->error = XS_DRIVER_STUFFUP;
959 1.1 oki #if SPC_DEBUG
960 1.1 oki printf("%s: mha_done: bad stat 0x%x\n",
961 1.1 oki sc->sc_dev.dv_xname, acb->stat);
962 1.1 oki #endif
963 1.1 oki break;
964 1.1 oki }
965 1.1 oki }
966 1.1 oki }
967 1.1 oki
968 1.1 oki xs->flags |= ITSDONE;
969 1.4 msaitoh
970 1.1 oki #if SPC_DEBUG
971 1.1 oki if ((mha_debug & SPC_SHOWMISC) != 0) {
972 1.1 oki if (xs->resid != 0)
973 1.1 oki printf("resid=%d ", xs->resid);
974 1.1 oki if (xs->error == XS_SENSE)
975 1.1 oki printf("sense=0x%02x\n", xs->sense.scsi_sense.error_code);
976 1.1 oki else
977 1.1 oki printf("error=%d\n", xs->error);
978 1.1 oki }
979 1.1 oki #endif
980 1.1 oki
981 1.1 oki /*
982 1.1 oki * Remove the ACB from whatever queue it's on.
983 1.1 oki */
984 1.1 oki switch (acb->flags & ACB_QBITS) {
985 1.1 oki case ACB_QNONE:
986 1.1 oki if (acb != sc->sc_nexus) {
987 1.1 oki panic("%s: floating acb", sc->sc_dev.dv_xname);
988 1.1 oki }
989 1.1 oki sc->sc_nexus = NULL;
990 1.1 oki sc->sc_state = SPC_IDLE;
991 1.1 oki ti->lubusy &= ~(1<<sc_link->scsipi_scsi.lun);
992 1.1 oki mha_sched(sc);
993 1.1 oki break;
994 1.1 oki case ACB_QREADY:
995 1.1 oki TAILQ_REMOVE(&sc->ready_list, acb, chain);
996 1.1 oki break;
997 1.1 oki case ACB_QNEXUS:
998 1.1 oki TAILQ_REMOVE(&sc->nexus_list, acb, chain);
999 1.1 oki ti->lubusy &= ~(1<<sc_link->scsipi_scsi.lun);
1000 1.1 oki break;
1001 1.1 oki case ACB_QFREE:
1002 1.1 oki panic("%s: dequeue: busy acb on free list",
1003 1.1 oki sc->sc_dev.dv_xname);
1004 1.1 oki break;
1005 1.1 oki default:
1006 1.1 oki panic("%s: dequeue: unknown queue %d",
1007 1.1 oki sc->sc_dev.dv_xname, acb->flags & ACB_QBITS);
1008 1.1 oki }
1009 1.1 oki
1010 1.1 oki /* Put it on the free list, and clear flags. */
1011 1.1 oki #if 0
1012 1.1 oki TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
1013 1.1 oki acb->flags = ACB_QFREE;
1014 1.1 oki #else
1015 1.1 oki mha_free_acb(sc, acb, xs->flags);
1016 1.1 oki #endif
1017 1.1 oki
1018 1.1 oki ti->cmds++;
1019 1.1 oki scsipi_done(xs);
1020 1.1 oki }
1021 1.1 oki
1022 1.1 oki void
1023 1.1 oki mha_dequeue(sc, acb)
1024 1.1 oki struct mha_softc *sc;
1025 1.1 oki struct acb *acb;
1026 1.1 oki {
1027 1.1 oki
1028 1.1 oki if (acb->flags & ACB_QNEXUS) {
1029 1.1 oki TAILQ_REMOVE(&sc->nexus_list, acb, chain);
1030 1.1 oki } else {
1031 1.1 oki TAILQ_REMOVE(&sc->ready_list, acb, chain);
1032 1.1 oki }
1033 1.1 oki }
1034 1.1 oki
1035 1.1 oki /*
1037 1.1 oki * INTERRUPT/PROTOCOL ENGINE
1038 1.1 oki */
1039 1.1 oki
1040 1.1 oki /*
1041 1.1 oki * Schedule an outgoing message by prioritizing it, and asserting
1042 1.1 oki * attention on the bus. We can only do this when we are the initiator
1043 1.1 oki * else there will be an illegal command interrupt.
1044 1.1 oki */
1045 1.1 oki #define mha_sched_msgout(m) \
1046 1.1 oki do { \
1047 1.1 oki SPC_MISC(("mha_sched_msgout %d ", m)); \
1048 1.1 oki CMR = CMD_SET_ATN; \
1049 1.1 oki sc->sc_msgpriq |= (m); \
1050 1.1 oki } while (0)
1051 1.1 oki
1052 1.1 oki #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80)
1053 1.1 oki #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
1054 1.1 oki #define ISEXTMSG(m) ((m) == 0x01)
1055 1.1 oki
1056 1.1 oki /*
1057 1.1 oki * Precondition:
1058 1.1 oki * The SCSI bus is already in the MSGI phase and there is a message byte
1059 1.1 oki * on the bus, along with an asserted REQ signal.
1060 1.1 oki */
1061 1.1 oki void
1062 1.1 oki mha_msgin(sc)
1063 1.1 oki register struct mha_softc *sc;
1064 1.1 oki {
1065 1.1 oki register int v;
1066 1.1 oki int n;
1067 1.1 oki
1068 1.1 oki SPC_TRACE(("[mha_msgin(curmsglen:%d)] ", sc->sc_imlen));
1069 1.1 oki
1070 1.1 oki /*
1071 1.1 oki * Prepare for a new message. A message should (according
1072 1.1 oki * to the SCSI standard) be transmitted in one single
1073 1.1 oki * MESSAGE_IN_PHASE. If we have been in some other phase,
1074 1.1 oki * then this is a new message.
1075 1.1 oki */
1076 1.1 oki if (sc->sc_prevphase != MESSAGE_IN_PHASE) {
1077 1.1 oki sc->sc_flags &= ~SPC_DROP_MSGI;
1078 1.1 oki sc->sc_imlen = 0;
1079 1.1 oki }
1080 1.1 oki
1081 1.1 oki WAIT;
1082 1.1 oki
1083 1.1 oki v = MBR; /* modified byte */
1084 1.1 oki v = sc->sc_pcx[0];
1085 1.1 oki
1086 1.1 oki sc->sc_imess[sc->sc_imlen] = v;
1087 1.1 oki
1088 1.1 oki /*
1089 1.1 oki * If we're going to reject the message, don't bother storing
1090 1.1 oki * the incoming bytes. But still, we need to ACK them.
1091 1.1 oki */
1092 1.1 oki
1093 1.1 oki if ((sc->sc_flags & SPC_DROP_MSGI)) {
1094 1.1 oki CMR = CMD_SET_ATN;
1095 1.1 oki /* ESPCMD(sc, ESPCMD_MSGOK);*/
1096 1.1 oki printf("<dropping msg byte %x>",
1097 1.1 oki sc->sc_imess[sc->sc_imlen]);
1098 1.1 oki return;
1099 1.1 oki }
1100 1.1 oki
1101 1.1 oki if (sc->sc_imlen >= SPC_MAX_MSG_LEN) {
1102 1.1 oki mha_sched_msgout(SEND_REJECT);
1103 1.1 oki sc->sc_flags |= SPC_DROP_MSGI;
1104 1.1 oki } else {
1105 1.1 oki sc->sc_imlen++;
1106 1.1 oki /*
1107 1.1 oki * This testing is suboptimal, but most
1108 1.1 oki * messages will be of the one byte variety, so
1109 1.1 oki * it should not effect performance
1110 1.1 oki * significantly.
1111 1.1 oki */
1112 1.1 oki if (sc->sc_imlen == 1 && IS1BYTEMSG(sc->sc_imess[0]))
1113 1.1 oki goto gotit;
1114 1.1 oki if (sc->sc_imlen == 2 && IS2BYTEMSG(sc->sc_imess[0]))
1115 1.1 oki goto gotit;
1116 1.1 oki if (sc->sc_imlen >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
1117 1.1 oki sc->sc_imlen == sc->sc_imess[1] + 2)
1118 1.1 oki goto gotit;
1119 1.1 oki }
1120 1.1 oki #if 0
1121 1.1 oki /* Ack what we have so far */
1122 1.1 oki ESPCMD(sc, ESPCMD_MSGOK);
1123 1.1 oki #endif
1124 1.1 oki return;
1125 1.1 oki
1126 1.1 oki gotit:
1127 1.1 oki SPC_MSGS(("gotmsg(%x)", sc->sc_imess[0]));
1128 1.1 oki /*
1129 1.1 oki * Now we should have a complete message (1 byte, 2 byte
1130 1.1 oki * and moderately long extended messages). We only handle
1131 1.1 oki * extended messages which total length is shorter than
1132 1.1 oki * SPC_MAX_MSG_LEN. Longer messages will be amputated.
1133 1.1 oki */
1134 1.1 oki if (sc->sc_state == SPC_HASNEXUS) {
1135 1.1 oki struct acb *acb = sc->sc_nexus;
1136 1.1 oki struct spc_tinfo *ti =
1137 1.1 oki &sc->sc_tinfo[acb->xs->sc_link->scsipi_scsi.target];
1138 1.1 oki
1139 1.1 oki switch (sc->sc_imess[0]) {
1140 1.1 oki case MSG_CMDCOMPLETE:
1141 1.1 oki SPC_MSGS(("cmdcomplete "));
1142 1.1 oki if (sc->sc_dleft < 0) {
1143 1.1 oki struct scsipi_link *sc_link = acb->xs->sc_link;
1144 1.1 oki printf("mha: %d extra bytes from %d:%d\n",
1145 1.1 oki -sc->sc_dleft,
1146 1.1 oki sc_link->scsipi_scsi.target,
1147 1.1 oki sc_link->scsipi_scsi.lun);
1148 1.1 oki sc->sc_dleft = 0;
1149 1.1 oki }
1150 1.1 oki acb->xs->resid = acb->dleft = sc->sc_dleft;
1151 1.1 oki sc->sc_flags |= SPC_BUSFREE_OK;
1152 1.1 oki break;
1153 1.1 oki
1154 1.1 oki case MSG_MESSAGE_REJECT:
1155 1.1 oki #if SPC_DEBUG
1156 1.1 oki if (mha_debug & SPC_SHOWMSGS)
1157 1.1 oki printf("%s: our msg rejected by target\n",
1158 1.1 oki sc->sc_dev.dv_xname);
1159 1.1 oki #endif
1160 1.1 oki #if 1 /* XXX - must remember last message */
1161 1.1 oki scsi_print_addr(acb->xs->sc_link); printf("MSG_MESSAGE_REJECT>>");
1162 1.1 oki #endif
1163 1.1 oki if (sc->sc_flags & SPC_SYNCHNEGO) {
1164 1.1 oki ti->period = ti->offset = 0;
1165 1.1 oki sc->sc_flags &= ~SPC_SYNCHNEGO;
1166 1.1 oki ti->flags &= ~T_NEGOTIATE;
1167 1.1 oki }
1168 1.1 oki /* Not all targets understand INITIATOR_DETECTED_ERR */
1169 1.1 oki if (sc->sc_msgout == SEND_INIT_DET_ERR)
1170 1.1 oki mha_sched_msgout(SEND_ABORT);
1171 1.1 oki break;
1172 1.1 oki case MSG_NOOP:
1173 1.1 oki SPC_MSGS(("noop "));
1174 1.1 oki break;
1175 1.1 oki case MSG_DISCONNECT:
1176 1.1 oki SPC_MSGS(("disconnect "));
1177 1.1 oki ti->dconns++;
1178 1.1 oki sc->sc_flags |= SPC_DISCON;
1179 1.1 oki sc->sc_flags |= SPC_BUSFREE_OK;
1180 1.1 oki if ((acb->xs->sc_link->quirks & SDEV_AUTOSAVE) == 0)
1181 1.1 oki break;
1182 1.1 oki /*FALLTHROUGH*/
1183 1.1 oki case MSG_SAVEDATAPOINTER:
1184 1.1 oki SPC_MSGS(("save datapointer "));
1185 1.1 oki acb->dleft = sc->sc_dleft;
1186 1.1 oki acb->daddr = sc->sc_dp;
1187 1.1 oki break;
1188 1.1 oki case MSG_RESTOREPOINTERS:
1189 1.1 oki SPC_MSGS(("restore datapointer "));
1190 1.1 oki if (!acb) {
1191 1.1 oki mha_sched_msgout(SEND_ABORT);
1192 1.1 oki printf("%s: no DATAPOINTERs to restore\n",
1193 1.1 oki sc->sc_dev.dv_xname);
1194 1.1 oki break;
1195 1.1 oki }
1196 1.1 oki sc->sc_dp = acb->daddr;
1197 1.1 oki sc->sc_dleft = acb->dleft;
1198 1.1 oki break;
1199 1.1 oki case MSG_PARITY_ERROR:
1200 1.1 oki printf("%s:target%d: MSG_PARITY_ERROR\n",
1201 1.1 oki sc->sc_dev.dv_xname,
1202 1.1 oki acb->xs->sc_link->scsipi_scsi.target);
1203 1.1 oki break;
1204 1.1 oki case MSG_EXTENDED:
1205 1.1 oki SPC_MSGS(("extended(%x) ", sc->sc_imess[2]));
1206 1.1 oki switch (sc->sc_imess[2]) {
1207 1.1 oki case MSG_EXT_SDTR:
1208 1.1 oki SPC_MSGS(("SDTR period %d, offset %d ",
1209 1.1 oki sc->sc_imess[3], sc->sc_imess[4]));
1210 1.1 oki ti->period = sc->sc_imess[3];
1211 1.1 oki ti->offset = sc->sc_imess[4];
1212 1.1 oki if (sc->sc_minsync == 0) {
1213 1.1 oki /* We won't do synch */
1214 1.1 oki ti->offset = 0;
1215 1.1 oki mha_sched_msgout(SEND_SDTR);
1216 1.1 oki } else if (ti->offset == 0) {
1217 1.1 oki printf("%s:%d: async\n", "mha",
1218 1.1 oki acb->xs->sc_link->scsipi_scsi.target);
1219 1.1 oki ti->offset = 0;
1220 1.1 oki sc->sc_flags &= ~SPC_SYNCHNEGO;
1221 1.1 oki } else if (ti->period > 124) {
1222 1.1 oki printf("%s:%d: async\n", "mha",
1223 1.1 oki acb->xs->sc_link->scsipi_scsi.target);
1224 1.1 oki ti->offset = 0;
1225 1.1 oki mha_sched_msgout(SEND_SDTR);
1226 1.1 oki } else {
1227 1.1 oki int r = 250/ti->period;
1228 1.4 msaitoh int s = (100*250)/ti->period - 100*r;
1229 1.1 oki int p;
1230 1.1 oki #if 0
1231 1.1 oki p = mha_stp2cpb(sc, ti->period);
1232 1.1 oki ti->period = mha_cpb2stp(sc, p);
1233 1.1 oki #endif
1234 1.1 oki
1235 1.4 msaitoh #if SPC_DEBUG
1236 1.1 oki scsi_print_addr(acb->xs->sc_link);
1237 1.1 oki #endif
1238 1.1 oki if ((sc->sc_flags&SPC_SYNCHNEGO) == 0) {
1239 1.1 oki /* Target initiated negotiation */
1240 1.1 oki if (ti->flags & T_SYNCMODE) {
1241 1.1 oki ti->flags &= ~T_SYNCMODE;
1242 1.1 oki #if SPC_DEBUG
1243 1.1 oki printf("renegotiated ");
1244 1.1 oki #endif
1245 1.1 oki }
1246 1.1 oki TMR=TM_ASYNC;
1247 1.1 oki /* Clamp to our maxima */
1248 1.1 oki if (ti->period < sc->sc_minsync)
1249 1.1 oki ti->period = sc->sc_minsync;
1250 1.1 oki if (ti->offset > 15)
1251 1.1 oki ti->offset = 15;
1252 1.4 msaitoh mha_sched_msgout(SEND_SDTR);
1253 1.1 oki } else {
1254 1.1 oki /* we are sync */
1255 1.1 oki sc->sc_flags &= ~SPC_SYNCHNEGO;
1256 1.1 oki TMR = TM_SYNC;
1257 1.1 oki ti->flags |= T_SYNCMODE;
1258 1.1 oki }
1259 1.1 oki #if SPC_DEBUG
1260 1.1 oki printf("max sync rate %d.%02dMb/s\n",
1261 1.1 oki r, s);
1262 1.1 oki #endif
1263 1.1 oki }
1264 1.1 oki ti->flags &= ~T_NEGOTIATE;
1265 1.1 oki break;
1266 1.1 oki default: /* Extended messages we don't handle */
1267 1.1 oki CMR = CMD_SET_ATN; /* XXX? */
1268 1.1 oki break;
1269 1.1 oki }
1270 1.1 oki break;
1271 1.1 oki default:
1272 1.1 oki SPC_MSGS(("ident "));
1273 1.1 oki /* thanks for that ident... */
1274 1.1 oki if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1275 1.1 oki SPC_MISC(("unknown "));
1276 1.1 oki printf("%s: unimplemented message: %d\n", sc->sc_dev.dv_xname, sc->sc_imess[0]);
1277 1.1 oki CMR = CMD_SET_ATN; /* XXX? */
1278 1.1 oki }
1279 1.1 oki break;
1280 1.1 oki }
1281 1.1 oki } else if (sc->sc_state == SPC_RESELECTED) {
1282 1.1 oki struct scsipi_link *sc_link = NULL;
1283 1.1 oki struct acb *acb;
1284 1.1 oki struct spc_tinfo *ti;
1285 1.1 oki u_char lunit;
1286 1.1 oki
1287 1.1 oki if (MSG_ISIDENTIFY(sc->sc_imess[0])) { /* Identify? */
1288 1.1 oki SPC_MISC(("searching "));
1289 1.1 oki /*
1290 1.1 oki * Search wait queue for disconnected cmd
1291 1.1 oki * The list should be short, so I haven't bothered with
1292 1.1 oki * any more sophisticated structures than a simple
1293 1.1 oki * singly linked list.
1294 1.1 oki */
1295 1.1 oki lunit = sc->sc_imess[0] & 0x07;
1296 1.1 oki for (acb = sc->nexus_list.tqh_first; acb;
1297 1.1 oki acb = acb->chain.tqe_next) {
1298 1.1 oki sc_link = acb->xs->sc_link;
1299 1.1 oki if (sc_link->scsipi_scsi.lun == lunit &&
1300 1.1 oki sc->sc_selid == (1<<sc_link->scsipi_scsi.target)) {
1301 1.1 oki TAILQ_REMOVE(&sc->nexus_list, acb,
1302 1.1 oki chain);
1303 1.1 oki ACB_SETQ(acb, ACB_QNONE);
1304 1.1 oki break;
1305 1.1 oki }
1306 1.1 oki }
1307 1.1 oki
1308 1.1 oki if (!acb) { /* Invalid reselection! */
1309 1.1 oki mha_sched_msgout(SEND_ABORT);
1310 1.1 oki printf("mmespc: invalid reselect (idbit=0x%2x)\n",
1311 1.1 oki sc->sc_selid);
1312 1.1 oki } else { /* Reestablish nexus */
1313 1.1 oki /*
1314 1.1 oki * Setup driver data structures and
1315 1.1 oki * do an implicit RESTORE POINTERS
1316 1.1 oki */
1317 1.1 oki ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1318 1.1 oki sc->sc_nexus = acb;
1319 1.1 oki sc->sc_dp = acb->daddr;
1320 1.1 oki sc->sc_dleft = acb->dleft;
1321 1.1 oki sc->sc_tinfo[sc_link->scsipi_scsi.target].lubusy
1322 1.1 oki |= (1<<sc_link->scsipi_scsi.lun);
1323 1.1 oki if (ti->flags & T_SYNCMODE) {
1324 1.1 oki TMR = TM_SYNC; /* XXX */
1325 1.1 oki } else {
1326 1.1 oki TMR = TM_ASYNC;
1327 1.1 oki }
1328 1.1 oki SPC_MISC(("... found acb"));
1329 1.1 oki sc->sc_state = SPC_HASNEXUS;
1330 1.1 oki }
1331 1.1 oki } else {
1332 1.1 oki printf("%s: bogus reselect (no IDENTIFY) %0x2x\n",
1333 1.1 oki sc->sc_dev.dv_xname, sc->sc_selid);
1334 1.1 oki mha_sched_msgout(SEND_DEV_RESET);
1335 1.1 oki }
1336 1.1 oki } else { /* Neither SPC_HASNEXUS nor SPC_RESELECTED! */
1337 1.1 oki printf("%s: unexpected message in; will send DEV_RESET\n",
1338 1.1 oki sc->sc_dev.dv_xname);
1339 1.1 oki mha_sched_msgout(SEND_DEV_RESET);
1340 1.1 oki }
1341 1.1 oki
1342 1.1 oki /* Ack last message byte */
1343 1.1 oki #if 0
1344 1.1 oki ESPCMD(sc, ESPCMD_MSGOK);
1345 1.1 oki #endif
1346 1.1 oki
1347 1.1 oki /* Done, reset message pointer. */
1348 1.1 oki sc->sc_flags &= ~SPC_DROP_MSGI;
1349 1.1 oki sc->sc_imlen = 0;
1350 1.1 oki }
1351 1.1 oki
1352 1.1 oki /*
1353 1.1 oki * Send the highest priority, scheduled message.
1354 1.1 oki */
1355 1.1 oki void
1356 1.1 oki mha_msgout(sc)
1357 1.1 oki register struct mha_softc *sc;
1358 1.1 oki {
1359 1.1 oki struct spc_tinfo *ti;
1360 1.1 oki int n;
1361 1.1 oki
1362 1.1 oki SPC_TRACE(("mha_msgout "));
1363 1.1 oki
1364 1.1 oki if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
1365 1.1 oki if (sc->sc_omp == sc->sc_omess) {
1366 1.1 oki /*
1367 1.1 oki * This is a retransmission.
1368 1.1 oki *
1369 1.1 oki * We get here if the target stayed in MESSAGE OUT
1370 1.1 oki * phase. Section 5.1.9.2 of the SCSI 2 spec indicates
1371 1.1 oki * that all of the previously transmitted messages must
1372 1.1 oki * be sent again, in the same order. Therefore, we
1373 1.1 oki * requeue all the previously transmitted messages, and
1374 1.1 oki * start again from the top. Our simple priority
1375 1.1 oki * scheme keeps the messages in the right order.
1376 1.1 oki */
1377 1.1 oki SPC_MISC(("retransmitting "));
1378 1.1 oki sc->sc_msgpriq |= sc->sc_msgoutq;
1379 1.1 oki /*
1380 1.1 oki * Set ATN. If we're just sending a trivial 1-byte
1381 1.1 oki * message, we'll clear ATN later on anyway.
1382 1.1 oki */
1383 1.1 oki CMR = CMD_SET_ATN; /* XXX? */
1384 1.1 oki } else {
1385 1.1 oki /* This is a continuation of the previous message. */
1386 1.1 oki n = sc->sc_omp - sc->sc_omess;
1387 1.1 oki goto nextbyte;
1388 1.1 oki }
1389 1.1 oki }
1390 1.1 oki
1391 1.1 oki /* No messages transmitted so far. */
1392 1.1 oki sc->sc_msgoutq = 0;
1393 1.1 oki sc->sc_lastmsg = 0;
1394 1.1 oki
1395 1.1 oki nextmsg:
1396 1.1 oki /* Pick up highest priority message. */
1397 1.1 oki sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1398 1.1 oki sc->sc_msgpriq &= ~sc->sc_currmsg;
1399 1.1 oki sc->sc_msgoutq |= sc->sc_currmsg;
1400 1.1 oki
1401 1.1 oki /* Build the outgoing message data. */
1402 1.1 oki switch (sc->sc_currmsg) {
1403 1.1 oki case SEND_IDENTIFY:
1404 1.1 oki SPC_ASSERT(sc->sc_nexus != NULL);
1405 1.1 oki sc->sc_omess[0] =
1406 1.1 oki MSG_IDENTIFY(sc->sc_nexus->xs->sc_link->scsipi_scsi.lun, 1);
1407 1.1 oki n = 1;
1408 1.1 oki break;
1409 1.1 oki
1410 1.1 oki #if SPC_USE_SYNCHRONOUS
1411 1.1 oki case SEND_SDTR:
1412 1.1 oki SPC_ASSERT(sc->sc_nexus != NULL);
1413 1.1 oki ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->scsipi_scsi.target];
1414 1.1 oki sc->sc_omess[4] = MSG_EXTENDED;
1415 1.1 oki sc->sc_omess[3] = 3;
1416 1.1 oki sc->sc_omess[2] = MSG_EXT_SDTR;
1417 1.1 oki sc->sc_omess[1] = ti->period >> 2;
1418 1.1 oki sc->sc_omess[0] = ti->offset;
1419 1.1 oki n = 5;
1420 1.1 oki break;
1421 1.1 oki #endif
1422 1.1 oki
1423 1.1 oki #if SPC_USE_WIDE
1424 1.1 oki case SEND_WDTR:
1425 1.1 oki SPC_ASSERT(sc->sc_nexus != NULL);
1426 1.1 oki ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->scsipi_scsi.target];
1427 1.1 oki sc->sc_omess[3] = MSG_EXTENDED;
1428 1.1 oki sc->sc_omess[2] = 2;
1429 1.1 oki sc->sc_omess[1] = MSG_EXT_WDTR;
1430 1.1 oki sc->sc_omess[0] = ti->width;
1431 1.1 oki n = 4;
1432 1.1 oki break;
1433 1.1 oki #endif
1434 1.1 oki
1435 1.1 oki case SEND_DEV_RESET:
1436 1.1 oki sc->sc_flags |= SPC_ABORTING;
1437 1.1 oki sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1438 1.1 oki n = 1;
1439 1.1 oki break;
1440 1.1 oki
1441 1.1 oki case SEND_REJECT:
1442 1.1 oki sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1443 1.1 oki n = 1;
1444 1.1 oki break;
1445 1.1 oki
1446 1.1 oki case SEND_PARITY_ERROR:
1447 1.1 oki sc->sc_omess[0] = MSG_PARITY_ERROR;
1448 1.1 oki n = 1;
1449 1.1 oki break;
1450 1.1 oki
1451 1.1 oki case SEND_INIT_DET_ERR:
1452 1.1 oki sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1453 1.1 oki n = 1;
1454 1.1 oki break;
1455 1.1 oki
1456 1.1 oki case SEND_ABORT:
1457 1.1 oki sc->sc_flags |= SPC_ABORTING;
1458 1.1 oki sc->sc_omess[0] = MSG_ABORT;
1459 1.1 oki n = 1;
1460 1.1 oki break;
1461 1.1 oki
1462 1.1 oki default:
1463 1.1 oki printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1464 1.1 oki sc->sc_dev.dv_xname);
1465 1.1 oki SPC_BREAK();
1466 1.1 oki sc->sc_omess[0] = MSG_NOOP;
1467 1.1 oki n = 1;
1468 1.1 oki break;
1469 1.1 oki }
1470 1.1 oki sc->sc_omp = &sc->sc_omess[n];
1471 1.1 oki
1472 1.1 oki nextbyte:
1473 1.1 oki /* Send message bytes. */
1474 1.1 oki /* send TRANSFER command. */
1475 1.1 oki sc->sc_ps[3] = 1;
1476 1.1 oki sc->sc_ps[4] = n >> 8;
1477 1.1 oki sc->sc_pc[10] = n;
1478 1.1 oki sc->sc_ps[-1] = 0x000F; /* burst */
1479 1.1 oki asm volatile ("nop");
1480 1.1 oki CMR = CMD_SEND_FROM_DMA; /* send from DMA */
1481 1.1 oki for (;;) {
1482 1.1 oki if ((SSR & SS_BUSY) != 0)
1483 1.1 oki break;
1484 1.1 oki if (SSR & SS_IREQUEST)
1485 1.1 oki goto out;
1486 1.1 oki }
1487 1.1 oki for (;;) {
1488 1.1 oki #if 0
1489 1.1 oki for (;;) {
1490 1.1 oki if ((PSNS & PSNS_REQ) != 0)
1491 1.1 oki break;
1492 1.1 oki /* Wait for REQINIT. XXX Need timeout. */
1493 1.1 oki }
1494 1.1 oki #endif
1495 1.1 oki if (SSR & SS_IREQUEST) {
1496 1.1 oki /*
1497 1.1 oki * Target left MESSAGE OUT, possibly to reject
1498 1.1 oki * our message.
1499 1.1 oki *
1500 1.1 oki * If this is the last message being sent, then we
1501 1.1 oki * deassert ATN, since either the target is going to
1502 1.1 oki * ignore this message, or it's going to ask for a
1503 1.1 oki * retransmission via MESSAGE PARITY ERROR (in which
1504 1.1 oki * case we reassert ATN anyway).
1505 1.1 oki */
1506 1.1 oki #if 0
1507 1.1 oki if (sc->sc_msgpriq == 0)
1508 1.1 oki CMR = CMD_RESET_ATN;
1509 1.1 oki #endif
1510 1.1 oki goto out;
1511 1.1 oki }
1512 1.1 oki
1513 1.1 oki #if 0
1514 1.1 oki /* Clear ATN before last byte if this is the last message. */
1515 1.1 oki if (n == 1 && sc->sc_msgpriq == 0)
1516 1.1 oki CMR = CMD_RESET_ATN;
1517 1.1 oki #endif
1518 1.1 oki
1519 1.1 oki while ((SSR & SS_DREG_FULL) != 0)
1520 1.1 oki ;
1521 1.1 oki /* Send message byte. */
1522 1.1 oki sc->sc_pc[0] = *--sc->sc_omp;
1523 1.1 oki --n;
1524 1.1 oki /* Keep track of the last message we've sent any bytes of. */
1525 1.1 oki sc->sc_lastmsg = sc->sc_currmsg;
1526 1.1 oki
1527 1.1 oki if (n == 0)
1528 1.1 oki break;
1529 1.1 oki }
1530 1.1 oki
1531 1.1 oki /* We get here only if the entire message has been transmitted. */
1532 1.1 oki if (sc->sc_msgpriq != 0) {
1533 1.1 oki /* There are more outgoing messages. */
1534 1.1 oki goto nextmsg;
1535 1.1 oki }
1536 1.1 oki
1537 1.1 oki /*
1538 1.1 oki * The last message has been transmitted. We need to remember the last
1539 1.1 oki * message transmitted (in case the target switches to MESSAGE IN phase
1540 1.1 oki * and sends a MESSAGE REJECT), and the list of messages transmitted
1541 1.1 oki * this time around (in case the target stays in MESSAGE OUT phase to
1542 1.1 oki * request a retransmit).
1543 1.1 oki */
1544 1.1 oki
1545 1.1 oki out:
1546 1.1 oki /* Disable REQ/ACK protocol. */
1547 1.1 oki }
1548 1.1 oki
1549 1.1 oki
1550 1.1 oki /***************************************************************
1552 1.1 oki *
1553 1.1 oki * datain/dataout
1554 1.1 oki *
1555 1.1 oki */
1556 1.1 oki
1557 1.1 oki int
1558 1.1 oki mha_datain_pio(sc, p, n)
1559 1.1 oki register struct mha_softc *sc;
1560 1.1 oki u_char *p;
1561 1.1 oki int n;
1562 1.1 oki {
1563 1.1 oki u_short d;
1564 1.1 oki int a;
1565 1.1 oki int total_n = n;
1566 1.1 oki
1567 1.1 oki SPC_TRACE(("[mha_datain_pio(%x,%d)", p, n));
1568 1.1 oki
1569 1.1 oki WAIT;
1570 1.1 oki sc->sc_ps[3] = 1;
1571 1.1 oki sc->sc_ps[4] = n >> 8;
1572 1.1 oki sc->sc_pc[10] = n;
1573 1.1 oki /* $BHa$7$-%=%U%HE>Aw(B */
1574 1.1 oki CMR = CMD_RECEIVE_TO_MPU;
1575 1.1 oki for (;;) {
1576 1.1 oki a = SSR;
1577 1.1 oki if (a & 0x04) {
1578 1.1 oki d = sc->sc_ps[0];
1579 1.1 oki *p++ = d >> 8;
1580 1.1 oki if (--n > 0) {
1581 1.1 oki *p++ = d;
1582 1.1 oki --n;
1583 1.1 oki }
1584 1.1 oki a = SSR;
1585 1.1 oki }
1586 1.1 oki if (a & 0x40)
1587 1.1 oki continue;
1588 1.1 oki if (a & 0x80)
1589 1.1 oki break;
1590 1.1 oki }
1591 1.1 oki SPC_TRACE(("...%d resd]", n));
1592 1.1 oki return total_n - n;
1593 1.1 oki }
1594 1.1 oki
1595 1.1 oki int
1596 1.1 oki mha_dataout_pio(sc, p, n)
1597 1.1 oki register struct mha_softc *sc;
1598 1.1 oki u_char *p;
1599 1.1 oki int n;
1600 1.1 oki {
1601 1.1 oki u_short d;
1602 1.1 oki int a;
1603 1.1 oki int total_n = n;
1604 1.1 oki
1605 1.1 oki SPC_TRACE(("[mha_dataout_pio(%x,%d)", p, n));
1606 1.1 oki
1607 1.1 oki WAIT;
1608 1.1 oki sc->sc_ps[3] = 1;
1609 1.1 oki sc->sc_ps[4] = n >> 8;
1610 1.1 oki sc->sc_pc[10] = n;
1611 1.1 oki /* $BHa$7$-%=%U%HE>Aw(B */
1612 1.1 oki CMR = CMD_SEND_FROM_MPU;
1613 1.1 oki for (;;) {
1614 1.1 oki a = SSR;
1615 1.1 oki if (a & 0x04) {
1616 1.1 oki d = *p++ << 8;
1617 1.1 oki if (--n > 0) {
1618 1.1 oki d |= *p++;
1619 1.1 oki --n;
1620 1.1 oki }
1621 1.1 oki sc->sc_ps[0] = d;
1622 1.1 oki a = SSR;
1623 1.1 oki }
1624 1.1 oki if (a & 0x40)
1625 1.1 oki continue;
1626 1.1 oki if (a & 0x80)
1627 1.1 oki break;
1628 1.1 oki }
1629 1.1 oki SPC_TRACE(("...%d resd]", n));
1630 1.1 oki return total_n - n;
1631 1.1 oki }
1632 1.1 oki
1633 1.1 oki static int
1634 1.1 oki mha_dataio_dma(dw, cw, sc, p, n)
1635 1.1 oki int dw; /* DMA word */
1636 1.1 oki int cw; /* CMR word */
1637 1.1 oki register struct mha_softc *sc;
1638 1.4 msaitoh u_char *p;
1639 1.7 minoura int n;
1640 1.4 msaitoh {
1641 1.4 msaitoh int ts;
1642 1.4 msaitoh char *paddr, *vaddr;
1643 1.4 msaitoh
1644 1.4 msaitoh vaddr = p;
1645 1.4 msaitoh paddr = (char *)kvtop(vaddr);
1646 1.7 minoura #if MHA_DMA_SHORT_BUS_CYCLE == 1
1647 1.4 msaitoh if ((*(int *)&IODEVbase->io_sram[0xac]) & (1 << ((paddr_t)paddr >> 19)))
1648 1.1 oki dw &= ~(1 << 3);
1649 1.1 oki #endif
1650 1.1 oki #if defined(M68040) || defined(M68060)
1651 1.4 msaitoh #if defined(M68020) || defined(M68030)
1652 1.4 msaitoh if (mmutype == MMU_68040)
1653 1.4 msaitoh #endif
1654 1.4 msaitoh DCFP((paddr_t)paddr); /* XXX */
1655 1.7 minoura #endif
1656 1.4 msaitoh for (ts = (NBPG - ((long)vaddr & PGOFSET));
1657 1.4 msaitoh ts < n && (char *)kvtop(vaddr + ts + 4) == paddr + ts + 4;
1658 1.4 msaitoh ts += NBPG)
1659 1.1 oki #if defined(M68040) || defined(M68060)
1660 1.1 oki #if defined(M68020) || defined(M68030)
1661 1.1 oki if (mmutype == MMU_68040)
1662 1.1 oki #endif
1663 1.1 oki DCFP((paddr_t)paddr + ts);
1664 1.1 oki #else
1665 1.1 oki ;
1666 1.1 oki #endif
1667 1.1 oki if (ts > n)
1668 1.1 oki ts = n;
1669 1.1 oki #if 0
1670 1.1 oki printf("(%x,%x)->(%x,%x)\n", p, n, paddr, ts);
1671 1.1 oki PCIA(); /* XXX */
1672 1.1 oki #endif
1673 1.1 oki sc->sc_pc[0x80 + (((long)paddr >> 16) & 0xFF)] = 0;
1674 1.1 oki sc->sc_pc[0x180 + (((long)paddr >> 8) & 0xFF)] = 0;
1675 1.1 oki sc->sc_pc[0x280 + (((long)paddr >> 0) & 0xFF)] = 0;
1676 1.1 oki WAIT;
1677 1.1 oki sc->sc_ps[3] = 1;
1678 1.1 oki sc->sc_ps[4] = ts >> 8;
1679 1.1 oki sc->sc_pc[10] = ts;
1680 1.1 oki /* DMA $BE>Aw@)8f$O0J2<$NDL$j!#(B
1681 1.1 oki 3 ... short bus cycle
1682 1.1 oki 2 ... MAXIMUM XFER.
1683 1.1 oki 1 ... BURST XFER.
1684 1.1 oki 0 ... R/W */
1685 1.1 oki sc->sc_ps[-1] = dw; /* burst */
1686 1.1 oki asm volatile ("nop");
1687 1.1 oki CMR = cw; /* receive to DMA */
1688 1.1 oki return ts;
1689 1.1 oki }
1690 1.1 oki int
1691 1.1 oki mha_dataout(sc, p, n)
1692 1.1 oki register struct mha_softc *sc;
1693 1.1 oki u_char *p;
1694 1.1 oki int n;
1695 1.4 msaitoh {
1696 1.1 oki register struct acb *acb = sc->sc_nexus;
1697 1.1 oki
1698 1.1 oki if (n == 0)
1699 1.1 oki return n;
1700 1.1 oki
1701 1.1 oki if (((long)p & 1) || (n & 1))
1702 1.1 oki return mha_dataout_pio(sc, p, n);
1703 1.1 oki return mha_dataio_dma(MHA_DMA_DATAOUT, CMD_SEND_FROM_DMA, sc, p, n);
1704 1.1 oki }
1705 1.1 oki
1706 1.1 oki int
1708 1.1 oki mha_datain(sc, p, n)
1709 1.1 oki register struct mha_softc *sc;
1710 1.1 oki u_char *p;
1711 1.1 oki int n;
1712 1.4 msaitoh {
1713 1.1 oki int ts;
1714 1.1 oki register struct acb *acb = sc->sc_nexus;
1715 1.1 oki char *paddr, *vaddr;
1716 1.1 oki
1717 1.1 oki if (n == 0)
1718 1.1 oki return n;
1719 1.1 oki if (acb->cmd.opcode == 0x03 || ((long)p & 1) || (n & 1))
1720 1.1 oki return mha_datain_pio(sc, p, n);
1721 1.1 oki return mha_dataio_dma(MHA_DMA_DATAIN, CMD_RECEIVE_TO_DMA, sc, p, n);
1722 1.1 oki }
1723 1.1 oki
1724 1.1 oki
1726 1.1 oki /*
1727 1.1 oki * Catch an interrupt from the adaptor
1728 1.4 msaitoh */
1729 1.1 oki /*
1730 1.2 oki * This is the workhorse routine of the driver.
1731 1.2 oki * Deficiencies (for now):
1732 1.1 oki * 1) always uses programmed I/O
1733 1.1 oki */
1734 1.1 oki int
1735 1.1 oki mhaintr(unit)
1736 1.1 oki int unit;
1737 1.4 msaitoh {
1738 1.4 msaitoh struct mha_softc *sc;
1739 1.4 msaitoh u_char ints;
1740 1.4 msaitoh struct acb *acb;
1741 1.4 msaitoh struct scsipi_link *sc_link;
1742 1.4 msaitoh struct spc_tinfo *ti;
1743 1.4 msaitoh u_char ph;
1744 1.2 oki u_short r;
1745 1.4 msaitoh int n;
1746 1.4 msaitoh
1747 1.4 msaitoh #if 1 /* XXX called during attach? */
1748 1.4 msaitoh if (tmpsc != NULL) {
1749 1.2 oki SPC_MISC(("[%x %x]\n", mha_cd.cd_devs, sc));
1750 1.1 oki sc = tmpsc;
1751 1.4 msaitoh } else {
1752 1.1 oki #endif
1753 1.1 oki
1754 1.1 oki /* return if not configured */
1755 1.1 oki if (!mha_cd.cd_devs) /* Check if at least one unit is attached. */
1756 1.1 oki return; /* XXX should check if THE unit exists. */
1757 1.1 oki
1758 1.1 oki sc = mha_cd.cd_devs[unit];
1759 1.1 oki
1760 1.1 oki #if 1 /* XXX */
1761 1.1 oki }
1762 1.1 oki #endif
1763 1.1 oki
1764 1.1 oki /*
1765 1.1 oki * $B3d$j9~$_6X;_$K$9$k(B
1766 1.1 oki */
1767 1.1 oki #if 0
1768 1.1 oki SCTL &= ~SCTL_INTR_ENAB;
1769 1.1 oki #endif
1770 1.1 oki
1771 1.1 oki SPC_TRACE(("[mhaintr]"));
1772 1.1 oki
1773 1.1 oki loop:
1774 1.1 oki /*
1775 1.1 oki * $BA4E>Aw$,40A4$K=*N;$9$k$^$G%k!<%W$9$k(B
1776 1.1 oki */
1777 1.1 oki /*
1778 1.1 oki * First check for abnormal conditions, such as reset.
1779 1.1 oki */
1780 1.1 oki #if 0
1781 1.1 oki #if 1 /* XXX? */
1782 1.1 oki while (((ints = SSR) & SS_IREQUEST) == 0)
1783 1.1 oki delay(1);
1784 1.1 oki SPC_MISC(("ints = 0x%x ", ints));
1785 1.1 oki #else /* usually? */
1786 1.1 oki ints = SSR;
1787 1.1 oki #endif
1788 1.1 oki #endif
1789 1.1 oki while (SSR & SS_IREQUEST)
1790 1.1 oki {
1791 1.1 oki acb = sc->sc_nexus;
1792 1.1 oki r = ISCSR;
1793 1.1 oki SPC_MISC(("[r=0x%x]", r));
1794 1.1 oki switch (r >> 8)
1795 1.1 oki {
1796 1.1 oki default:
1797 1.1 oki printf("[addr=%x\n"
1798 1.1 oki "result=0x%x\n"
1799 1.1 oki "cmd=0x%x\n"
1800 1.1 oki "ph=0x%x(ought to be %d)]\n",
1801 1.1 oki &ISCSR,
1802 1.1 oki r,
1803 1.1 oki acb->xs->cmd->opcode,
1804 1.1 oki SCR, sc->sc_phase);
1805 1.1 oki panic("unexpected result.");
1806 1.1 oki case 0x82: /* selection timeout */
1807 1.1 oki SPC_MISC(("selection timeout "));
1808 1.1 oki sc->sc_phase = BUSFREE_PHASE;
1809 1.1 oki SPC_ASSERT(sc->sc_nexus != NULL);
1810 1.1 oki acb = sc->sc_nexus;
1811 1.1 oki delay(250);
1812 1.1 oki acb->xs->error = XS_SELTIMEOUT;
1813 1.1 oki mha_done(sc, acb);
1814 1.1 oki continue; /* XXX ??? msaitoh */
1815 1.1 oki case 0x60: /* command completed */
1816 1.1 oki sc->sc_spcinitialized++;
1817 1.1 oki if (sc->sc_phase == BUSFREE_PHASE)
1818 1.1 oki continue;
1819 1.1 oki ph = SCR;
1820 1.1 oki if (ph & PSNS_ACK)
1821 1.1 oki {
1822 1.1 oki int s;
1823 1.1 oki /* $B$U$D!<$N%3%^%s%I$,=*N;$7$?$i$7$$(B */
1824 1.1 oki SPC_MISC(("0x60)phase = %x(ought to be %x)\n", ph & PHASE_MASK, sc->sc_phase));
1825 1.1 oki # if 0
1826 1.1 oki switch (sc->sc_phase)
1827 1.1 oki #else
1828 1.1 oki switch (ph & PHASE_MASK)
1829 1.1 oki #endif
1830 1.1 oki {
1831 1.1 oki case STATUS_PHASE:
1832 1.1 oki if (sc->sc_state != SPC_HASNEXUS)
1833 1.1 oki {
1834 1.1 oki printf("stsin: !SPC_HASNEXUS->(%d)\n", sc->sc_state);
1835 1.1 oki }
1836 1.1 oki SPC_ASSERT(sc->sc_nexus != NULL);
1837 1.1 oki acb = sc->sc_nexus;
1838 1.1 oki WAIT;
1839 1.1 oki s = MBR;
1840 1.1 oki SPC_ASSERT(s == 1);
1841 1.1 oki acb->stat = sc->sc_pcx[0]; /* XXX */
1842 1.1 oki SPC_MISC(("stat=0x%02x ", acb->stat));
1843 1.1 oki sc->sc_prevphase = STATUS_PHASE;
1844 1.1 oki break;
1845 1.1 oki case MESSAGE_IN_PHASE:
1846 1.1 oki mha_msgin(sc);
1847 1.1 oki sc->sc_prevphase = MESSAGE_IN_PHASE;
1848 1.1 oki break;
1849 1.1 oki }
1850 1.1 oki WAIT;
1851 1.1 oki CMR = CMD_RESET_ACK; /* reset ack */
1852 1.1 oki /*mha_done(sc, acb); XXX */
1853 1.1 oki continue;
1854 1.1 oki }
1855 1.1 oki else if (NSR & 0x80) /* nexus */
1856 1.1 oki {
1857 1.1 oki #if 1
1858 1.1 oki if (sc->sc_state == SPC_SELECTING) /* XXX msaitoh */
1859 1.1 oki sc->sc_state = SPC_HASNEXUS;
1860 1.1 oki /* $B%U%'!<%:$N7h$aBG$A$r$9$k(B
1861 1.1 oki $B30$l$?$i!"(Binitial-phase error(0x54) $B$,(B
1862 1.1 oki $BJV$C$F$/$k$s$GCm0U$7$?$^$(!#(B
1863 1.1 oki $B$G$b$J$<$+(B 0x65 $B$,JV$C$F$-$?$j$7$F$M!<$+(B? */
1864 1.1 oki WAIT;
1865 1.1 oki if (SSR & SS_IREQUEST)
1866 1.1 oki continue;
1867 1.1 oki switch (sc->sc_phase)
1868 1.1 oki {
1869 1.1 oki default:
1870 1.1 oki panic("$B8+CN$i$L(B phase $B$,Mh$A$^$C$?$@$h(B");
1871 1.1 oki case MESSAGE_IN_PHASE:
1872 1.1 oki /* $B2?$b$7$J$$(B */
1873 1.1 oki continue;
1874 1.1 oki case STATUS_PHASE:
1875 1.1 oki sc->sc_phase = MESSAGE_IN_PHASE;
1876 1.1 oki CMR = CMD_RECEIVE_MSG; /* receive msg */
1877 1.1 oki continue;
1878 1.1 oki case DATA_IN_PHASE:
1879 1.1 oki sc->sc_prevphase = DATA_IN_PHASE;
1880 1.1 oki if (sc->sc_dleft == 0)
1881 1.1 oki {
1882 1.1 oki /* $BE>Aw%G!<%?$O$b$&$J$$$N$G(B
1883 1.1 oki $B%9%F!<%?%9%U%'!<%:$r4|BT$7$h$&(B */
1884 1.1 oki sc->sc_phase = STATUS_PHASE;
1885 1.1 oki CMR = CMD_RECEIVE_STS; /* receive sts */
1886 1.1 oki continue;
1887 1.1 oki }
1888 1.1 oki n = mha_datain(sc, sc->sc_dp, sc->sc_dleft);
1889 1.1 oki sc->sc_dp += n;
1890 1.1 oki sc->sc_dleft -= n;
1891 1.1 oki continue;
1892 1.1 oki case DATA_OUT_PHASE:
1893 1.1 oki sc->sc_prevphase = DATA_OUT_PHASE;
1894 1.1 oki if (sc->sc_dleft == 0)
1895 1.1 oki {
1896 1.1 oki /* $BE>Aw%G!<%?$O$b$&$J$$$N$G(B
1897 1.1 oki $B%9%F!<%?%9%U%'!<%:$r4|BT$7$h$&(B */
1898 1.1 oki sc->sc_phase = STATUS_PHASE;
1899 1.1 oki CMR = CMD_RECEIVE_STS; /* receive sts */
1900 1.1 oki continue;
1901 1.1 oki }
1902 1.1 oki /* data phase $B$NB3$-$r$d$m$&(B */
1903 1.1 oki n = mha_dataout(sc, sc->sc_dp, sc->sc_dleft);
1904 1.1 oki sc->sc_dp += n;
1905 1.1 oki sc->sc_dleft -= n;
1906 1.1 oki continue;
1907 1.1 oki case COMMAND_PHASE:
1908 1.1 oki /* $B:G=i$O(B CMD PHASE $B$H$$$&$3$H$i$7$$(B */
1909 1.1 oki if (acb->dleft)
1910 1.1 oki {
1911 1.1 oki /* $B%G!<%?E>Aw$,$"$j$&$k>l9g(B */
1912 1.1 oki if (acb->xs->flags & SCSI_DATA_IN)
1913 1.1 oki {
1914 1.1 oki sc->sc_phase = DATA_IN_PHASE;
1915 1.1 oki n = mha_datain(sc, sc->sc_dp, sc->sc_dleft);
1916 1.1 oki sc->sc_dp += n;
1917 1.1 oki sc->sc_dleft -= n;
1918 1.1 oki }
1919 1.1 oki else if (acb->xs->flags & SCSI_DATA_OUT)
1920 1.1 oki {
1921 1.1 oki sc->sc_phase = DATA_OUT_PHASE;
1922 1.1 oki n = mha_dataout(sc, sc->sc_dp, sc->sc_dleft);
1923 1.1 oki sc->sc_dp += n;
1924 1.1 oki sc->sc_dleft -= n;
1925 1.1 oki }
1926 1.1 oki continue;
1927 1.1 oki }
1928 1.1 oki else
1929 1.1 oki {
1930 1.1 oki /* $B%G!<%?E>Aw$O$J$$$i$7$$(B?! */
1931 1.1 oki WAIT;
1932 1.1 oki sc->sc_phase = STATUS_PHASE;
1933 1.1 oki CMR = CMD_RECEIVE_STS; /* receive sts */
1934 1.1 oki continue;
1935 1.1 oki }
1936 1.1 oki }
1937 1.1 oki #endif
1938 1.1 oki }
1939 1.1 oki continue;
1940 1.1 oki case 0x31: /* disconnected in xfer progress. */
1941 1.1 oki SPC_MISC(("[0x31]"));
1942 1.1 oki case 0x70: /* disconnected. */
1943 1.1 oki SPC_ASSERT(sc->sc_flags & SPC_BUSFREE_OK);
1944 1.1 oki sc->sc_phase = BUSFREE_PHASE;
1945 1.1 oki sc->sc_state = SPC_IDLE;
1946 1.1 oki #if 1
1947 1.1 oki acb = sc->sc_nexus;
1948 1.1 oki SPC_ASSERT(sc->sc_nexus != NULL);
1949 1.1 oki acb->xs->error = XS_NOERROR;
1950 1.1 oki mha_done(sc, acb);
1951 1.1 oki #else
1952 1.1 oki TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1953 1.1 oki mha_sched(sc);
1954 1.1 oki #endif
1955 1.1 oki continue;
1956 1.1 oki case 0x32: /* phase error in xfer progress. */
1957 1.1 oki SPC_MISC(("[0x32]"));
1958 1.1 oki case 0x65: /* invalid command.
1959 1.1 oki $B$J$<$3$s$J$b$N$,=P$k$N$+(B
1960 1.1 oki $B26$K$OA4$/M}2r$G$-$J$$(B */
1961 1.1 oki #if 1
1962 1.1 oki SPC_MISC(("[0x%04x]", r));
1963 1.1 oki #endif
1964 1.1 oki case 0x54: /* initial-phase error. */
1965 1.1 oki SPC_MISC(("[0x54, ns=%x, ph=%x(ought to be %x)]",
1966 1.1 oki NSR,
1967 1.1 oki SCR, sc->sc_phase));
1968 1.1 oki /* thru */
1969 1.1 oki case 0x71: /* assert req */
1970 1.1 oki WAIT;
1971 1.1 oki if (SSR & 0x40)
1972 1.1 oki {
1973 1.1 oki printf("SPC sts=%2x, r=%04x, ns=%x, ph=%x\n",
1974 1.1 oki SSR, r, NSR, SCR);
1975 1.1 oki WAIT;
1976 1.1 oki }
1977 1.1 oki ph = SCR;
1978 1.1 oki if (sc->sc_state == SPC_SELECTING) /* XXX msaitoh */
1979 1.1 oki {
1980 1.1 oki sc->sc_state = SPC_HASNEXUS;
1981 1.1 oki }
1982 1.1 oki if (ph & 0x80)
1983 1.1 oki {
1984 1.1 oki switch (ph & PHASE_MASK)
1985 1.1 oki {
1986 1.1 oki default:
1987 1.1 oki printf("phase = %x\n", ph);
1988 1.1 oki panic("assert req: the phase I don't know!");
1989 1.1 oki case DATA_IN_PHASE:
1990 1.1 oki sc->sc_prevphase = DATA_IN_PHASE;
1991 1.1 oki SPC_MISC(("DATAIN(%d)...", sc->sc_dleft));
1992 1.1 oki n = mha_datain(sc, sc->sc_dp, sc->sc_dleft);
1993 1.1 oki sc->sc_dp += n;
1994 1.1 oki sc->sc_dleft -= n;
1995 1.1 oki SPC_MISC(("done\n"));
1996 1.1 oki continue;
1997 1.1 oki case DATA_OUT_PHASE:
1998 1.1 oki sc->sc_prevphase = DATA_OUT_PHASE;
1999 1.1 oki SPC_MISC(("DATAOUT\n"));
2000 1.1 oki n = mha_dataout(sc, sc->sc_dp, sc->sc_dleft);
2001 1.1 oki sc->sc_dp += n;
2002 1.1 oki sc->sc_dleft -= n;
2003 1.1 oki continue;
2004 1.1 oki case STATUS_PHASE:
2005 1.1 oki sc->sc_phase = STATUS_PHASE;
2006 1.1 oki SPC_MISC(("[RECV_STS]"));
2007 1.1 oki WAIT;
2008 1.1 oki CMR = CMD_RECEIVE_STS; /* receive sts */
2009 1.1 oki continue;
2010 1.1 oki case MESSAGE_IN_PHASE:
2011 1.1 oki sc->sc_phase = MESSAGE_IN_PHASE;
2012 1.1 oki WAIT;
2013 1.1 oki CMR = CMD_RECEIVE_MSG;
2014 1.1 oki continue;
2015 1.1 oki }
2016 1.1 oki }
2017 1.1 oki continue;
2018 1.1 oki }
2019 1.1 oki }
2020 1.1 oki }
2021 1.1 oki
2022 1.1 oki void
2023 1.1 oki mha_abort(sc, acb)
2024 1.1 oki struct mha_softc *sc;
2025 1.1 oki struct acb *acb;
2026 1.1 oki {
2027 1.1 oki acb->flags |= ACB_ABORTED;
2028 1.1 oki
2029 1.1 oki if (acb == sc->sc_nexus) {
2030 1.1 oki /*
2031 1.1 oki * If we're still selecting, the message will be scheduled
2032 1.1 oki * after selection is complete.
2033 1.1 oki */
2034 1.1 oki if (sc->sc_state == SPC_HASNEXUS) {
2035 1.1 oki sc->sc_flags |= SPC_ABORTING;
2036 1.1 oki mha_sched_msgout(SEND_ABORT);
2037 1.1 oki }
2038 1.1 oki } else {
2039 1.1 oki if (sc->sc_state == SPC_IDLE)
2040 1.1 oki mha_sched(sc);
2041 1.1 oki }
2042 1.1 oki }
2043 1.1 oki
2044 1.1 oki void
2045 1.1 oki mha_timeout(arg)
2046 1.1 oki void *arg;
2047 1.1 oki {
2048 1.1 oki int s = splbio();
2049 1.1 oki struct acb *acb = (struct acb *)arg;
2050 1.1 oki struct scsipi_xfer *xs = acb->xs;
2051 1.1 oki struct scsipi_link *sc_link = xs->sc_link;
2052 1.1 oki struct mha_softc *sc = sc_link->adapter_softc;
2053 1.1 oki
2054 1.1 oki scsi_print_addr(sc_link);
2055 1.1 oki again:
2056 1.1 oki printf("%s: timed out [acb %p (flags 0x%x, dleft %x, stat %x)], "
2057 1.1 oki "<state %d, nexus %p, phase(c %x, p %x), resid %x, msg(q %x,o %x) >",
2058 1.1 oki sc->sc_dev.dv_xname,
2059 1.1 oki acb, acb->flags, acb->dleft, acb->stat,
2060 1.1 oki sc->sc_state, sc->sc_nexus, sc->sc_phase, sc->sc_prevphase,
2061 1.1 oki sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout
2062 1.1 oki );
2063 1.1 oki printf("[%04x %02x]\n", sc->sc_ps[1], SCR);
2064 1.1 oki panic("timeout, ouch!");
2065 1.1 oki
2066 1.1 oki if (acb->flags & ACB_ABORTED) {
2067 1.1 oki /* abort timed out */
2068 1.1 oki printf(" AGAIN\n");
2069 1.1 oki #if 0
2070 1.1 oki mha_init(sc, 1); /* XXX 1?*/
2071 1.1 oki #endif
2072 1.4 msaitoh } else {
2073 1.1 oki /* abort the operation that has timed out */
2074 1.1 oki printf("\n");
2075 1.1 oki xs->error = XS_TIMEOUT;
2076 1.1 oki mha_abort(sc, acb);
2077 1.1 oki }
2078 1.1 oki
2079 1.1 oki splx(s);
2080 1.1 oki }
2081 1.1 oki
2082 1.1 oki #if SPC_DEBUG
2084 1.1 oki /*
2085 1.1 oki * The following functions are mostly used for debugging purposes, either
2086 1.1 oki * directly called from the driver or from the kernel debugger.
2087 1.1 oki */
2088 1.1 oki
2089 1.1 oki void
2090 1.1 oki mha_show_scsi_cmd(acb)
2091 1.1 oki struct acb *acb;
2092 1.1 oki {
2093 1.1 oki u_char *b = (u_char *)&acb->cmd;
2094 1.1 oki struct scsipi_link *sc_link = acb->xs->sc_link;
2095 1.1 oki int i;
2096 1.1 oki
2097 1.1 oki scsi_print_addr(sc_link);
2098 1.1 oki if ((acb->xs->flags & SCSI_RESET) == 0) {
2099 1.1 oki for (i = 0; i < acb->clen; i++) {
2100 1.1 oki if (i)
2101 1.1 oki printf(",");
2102 1.1 oki printf("%x", b[i]);
2103 1.1 oki }
2104 1.1 oki printf("\n");
2105 1.1 oki } else
2106 1.1 oki printf("RESET\n");
2107 1.1 oki }
2108 1.1 oki
2109 1.1 oki void
2110 1.1 oki mha_print_acb(acb)
2111 1.1 oki struct acb *acb;
2112 1.1 oki {
2113 1.1 oki
2114 1.1 oki printf("acb@%x xs=%x flags=%x", acb, acb->xs, acb->flags);
2115 1.1 oki printf(" dp=%x dleft=%d stat=%x\n",
2116 1.1 oki (long)acb->daddr, acb->dleft, acb->stat);
2117 1.1 oki mha_show_scsi_cmd(acb);
2118 1.1 oki }
2119 1.1 oki
2120 1.1 oki void
2121 1.1 oki mha_print_active_acb()
2122 1.1 oki {
2123 1.1 oki struct acb *acb;
2124 1.1 oki struct mha_softc *sc = mha_cd.cd_devs[0]; /* XXX */
2125 1.1 oki
2126 1.1 oki printf("ready list:\n");
2127 1.1 oki for (acb = sc->ready_list.tqh_first; acb != NULL;
2128 1.1 oki acb = acb->chain.tqe_next)
2129 1.1 oki mha_print_acb(acb);
2130 1.1 oki printf("nexus:\n");
2131 1.1 oki if (sc->sc_nexus != NULL)
2132 1.1 oki mha_print_acb(sc->sc_nexus);
2133 1.1 oki printf("nexus list:\n");
2134 1.1 oki for (acb = sc->nexus_list.tqh_first; acb != NULL;
2135 1.1 oki acb = acb->chain.tqe_next)
2136 1.1 oki mha_print_acb(acb);
2137 1.1 oki }
2138 1.1 oki
2139 1.1 oki void
2140 1.1 oki mha_dump_driver(sc)
2141 1.1 oki struct mha_softc *sc;
2142 1.1 oki {
2143 1.1 oki struct spc_tinfo *ti;
2144 1.1 oki int i;
2145 1.1 oki
2146 1.1 oki printf("nexus=%x prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2147 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n",
2148 sc->sc_state, sc->sc_imess[0],
2149 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2150 for (i = 0; i < 7; i++) {
2151 ti = &sc->sc_tinfo[i];
2152 printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2153 i, ti->cmds, ti->dconns, ti->touts);
2154 printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2155 }
2156 }
2157 #endif
2158