bus.h revision 1.22 1 1.22 tsutsui /* $NetBSD: bus.h,v 1.22 2010/03/19 14:20:56 tsutsui Exp $ */
2 1.2 minoura
3 1.2 minoura /*-
4 1.7 thorpej * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
5 1.2 minoura * All rights reserved.
6 1.2 minoura *
7 1.2 minoura * This code is derived from software contributed to The NetBSD Foundation
8 1.2 minoura * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.2 minoura * NASA Ames Research Center.
10 1.2 minoura *
11 1.2 minoura * Redistribution and use in source and binary forms, with or without
12 1.2 minoura * modification, are permitted provided that the following conditions
13 1.2 minoura * are met:
14 1.2 minoura * 1. Redistributions of source code must retain the above copyright
15 1.2 minoura * notice, this list of conditions and the following disclaimer.
16 1.2 minoura * 2. Redistributions in binary form must reproduce the above copyright
17 1.2 minoura * notice, this list of conditions and the following disclaimer in the
18 1.2 minoura * documentation and/or other materials provided with the distribution.
19 1.2 minoura *
20 1.2 minoura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.2 minoura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.2 minoura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.2 minoura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.2 minoura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.2 minoura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.2 minoura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.2 minoura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.2 minoura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.2 minoura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.2 minoura * POSSIBILITY OF SUCH DAMAGE.
31 1.2 minoura */
32 1.2 minoura
33 1.2 minoura /*
34 1.2 minoura * bus_space(9) and bus_dma(9) interface for NetBSD/x68k.
35 1.2 minoura */
36 1.2 minoura
37 1.2 minoura #ifndef _X68K_BUS_H_
38 1.2 minoura #define _X68K_BUS_H_
39 1.2 minoura
40 1.6 itohy #ifndef X68K_BUS_PERFORMANCE_HACK
41 1.6 itohy #if defined(__GNUC__) && defined(__STDC__)
42 1.6 itohy #define X68K_BUS_PERFORMANCE_HACK 1
43 1.6 itohy #else
44 1.6 itohy #define X68K_BUS_PERFORMANCE_HACK 0
45 1.6 itohy #endif
46 1.6 itohy #endif
47 1.6 itohy
48 1.2 minoura /*
49 1.2 minoura * Bus address and size types
50 1.2 minoura */
51 1.2 minoura typedef u_long bus_addr_t;
52 1.2 minoura typedef u_long bus_size_t;
53 1.2 minoura typedef u_long bus_space_handle_t;
54 1.2 minoura
55 1.2 minoura /*
56 1.2 minoura * Bus space descripter
57 1.2 minoura */
58 1.2 minoura typedef struct x68k_bus_space *bus_space_tag_t;
59 1.2 minoura
60 1.2 minoura struct x68k_bus_space {
61 1.2 minoura #if 0
62 1.2 minoura enum {
63 1.2 minoura X68K_INTIO_BUS,
64 1.2 minoura X68K_PCI_BUS,
65 1.2 minoura X68K_NEPTUNE_BUS
66 1.2 minoura } x68k_bus_type;
67 1.2 minoura #endif
68 1.2 minoura
69 1.12 chs int (*x68k_bus_space_map)(
70 1.2 minoura bus_space_tag_t,
71 1.2 minoura bus_addr_t,
72 1.2 minoura bus_size_t,
73 1.2 minoura int, /* flags */
74 1.12 chs bus_space_handle_t *);
75 1.12 chs void (*x68k_bus_space_unmap)(
76 1.2 minoura bus_space_tag_t,
77 1.2 minoura bus_space_handle_t,
78 1.12 chs bus_size_t);
79 1.12 chs int (*x68k_bus_space_subregion)(
80 1.2 minoura bus_space_tag_t,
81 1.2 minoura bus_space_handle_t,
82 1.2 minoura bus_size_t, /* offset */
83 1.2 minoura bus_size_t, /* size */
84 1.12 chs bus_space_handle_t *);
85 1.2 minoura
86 1.12 chs int (*x68k_bus_space_alloc)(
87 1.2 minoura bus_space_tag_t,
88 1.2 minoura bus_addr_t, /* reg_start */
89 1.2 minoura bus_addr_t, /* reg_end */
90 1.2 minoura bus_size_t,
91 1.2 minoura bus_size_t, /* alignment */
92 1.2 minoura bus_size_t, /* boundary */
93 1.2 minoura int, /* flags */
94 1.2 minoura bus_addr_t *,
95 1.12 chs bus_space_handle_t *);
96 1.12 chs void (*x68k_bus_space_free)(
97 1.2 minoura bus_space_tag_t,
98 1.2 minoura bus_space_handle_t,
99 1.12 chs bus_size_t);
100 1.2 minoura
101 1.2 minoura #if 0
102 1.12 chs void (*x68k_bus_space_barrier)(
103 1.2 minoura bus_space_tag_t,
104 1.2 minoura bus_space_handle_t,
105 1.2 minoura bus_size_t, /* offset */
106 1.2 minoura bus_size_t, /* length */
107 1.12 chs int); /* flags */
108 1.2 minoura #endif
109 1.2 minoura
110 1.2 minoura struct device *x68k_bus_device;
111 1.2 minoura };
112 1.2 minoura
113 1.22 tsutsui int x68k_bus_space_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t, bus_size_t,
114 1.22 tsutsui bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *);
115 1.12 chs void x68k_bus_space_free(bus_space_tag_t, bus_space_handle_t, bus_size_t);
116 1.2 minoura
117 1.2 minoura /*
118 1.2 minoura * bus_space(9) interface
119 1.2 minoura */
120 1.2 minoura
121 1.22 tsutsui #define bus_space_map(t, a, s, f, h) \
122 1.22 tsutsui ((*((t)->x68k_bus_space_map)) ((t), (a), (s), (f), (h)))
123 1.22 tsutsui #define bus_space_unmap(t, h, s) \
124 1.22 tsutsui ((*((t)->x68k_bus_space_unmap)) ((t), (h), (s)))
125 1.22 tsutsui #define bus_space_subregion(t, h, o, s, p) \
126 1.22 tsutsui ((*((t)->x68k_bus_space_subregion)) ((t), (h), (o), (s), (p)))
127 1.4 drochner #define BUS_SPACE_MAP_CACHEABLE 0x0001
128 1.4 drochner #define BUS_SPACE_MAP_LINEAR 0x0002
129 1.4 drochner #define BUS_SPACE_MAP_PREFETCHABLE 0x0004
130 1.2 minoura /*
131 1.2 minoura * For simpler hadware, many x68k devices are mapped with shifted address
132 1.2 minoura * i.e. only on even or odd addresses.
133 1.2 minoura */
134 1.9 isaki #define BUS_SPACE_MAP_SHIFTED_MASK 0x1001
135 1.9 isaki #define BUS_SPACE_MAP_SHIFTED_ODD 0x1001
136 1.9 isaki #define BUS_SPACE_MAP_SHIFTED_EVEN 0x1000
137 1.9 isaki #define BUS_SPACE_MAP_SHIFTED BUS_SPACE_MAP_SHIFTED_ODD
138 1.2 minoura
139 1.22 tsutsui #define bus_space_alloc(t, rs, re, s, a, b, f, r, h) \
140 1.22 tsutsui ((*((t)->x68k_bus_space_alloc)) ((t), \
141 1.22 tsutsui (rs), (re), (s), (a), (b), (f), (r), (h)))
142 1.22 tsutsui #define bus_space_free(t, h, s) \
143 1.22 tsutsui ((*((t)->x68k_bus_space_free)) ((t), (h), (s)))
144 1.2 minoura
145 1.2 minoura /*
146 1.2 minoura * Note: the 680x0 does not currently require barriers, but we must
147 1.2 minoura * provide the flags to MI code.
148 1.2 minoura */
149 1.2 minoura #define bus_space_barrier(t, h, o, l, f) \
150 1.2 minoura ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
151 1.2 minoura #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
152 1.2 minoura #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
153 1.2 minoura
154 1.2 minoura #define bus_space_read_1(t,h,o) _bus_space_read_1(t,h,o)
155 1.2 minoura #define bus_space_read_2(t,h,o) _bus_space_read_2(t,h,o)
156 1.2 minoura #define bus_space_read_4(t,h,o) _bus_space_read_4(t,h,o)
157 1.2 minoura
158 1.2 minoura #define bus_space_read_multi_1(t,h,o,p,c) _bus_space_read_multi_1(t,h,o,p,c)
159 1.2 minoura #define bus_space_read_multi_2(t,h,o,p,c) _bus_space_read_multi_2(t,h,o,p,c)
160 1.2 minoura #define bus_space_read_multi_4(t,h,o,p,c) _bus_space_read_multi_4(t,h,o,p,c)
161 1.2 minoura
162 1.2 minoura #define bus_space_read_region_1(t,h,o,p,c) _bus_space_read_region_1(t,h,o,p,c)
163 1.2 minoura #define bus_space_read_region_2(t,h,o,p,c) _bus_space_read_region_2(t,h,o,p,c)
164 1.2 minoura #define bus_space_read_region_4(t,h,o,p,c) _bus_space_read_region_4(t,h,o,p,c)
165 1.2 minoura
166 1.2 minoura #define bus_space_write_1(t,h,o,v) _bus_space_write_1(t,h,o,v)
167 1.2 minoura #define bus_space_write_2(t,h,o,v) _bus_space_write_2(t,h,o,v)
168 1.2 minoura #define bus_space_write_4(t,h,o,v) _bus_space_write_4(t,h,o,v)
169 1.2 minoura
170 1.2 minoura #define bus_space_write_multi_1(t,h,o,p,c) _bus_space_write_multi_1(t,h,o,p,c)
171 1.2 minoura #define bus_space_write_multi_2(t,h,o,p,c) _bus_space_write_multi_2(t,h,o,p,c)
172 1.2 minoura #define bus_space_write_multi_4(t,h,o,p,c) _bus_space_write_multi_4(t,h,o,p,c)
173 1.2 minoura
174 1.2 minoura #define bus_space_write_region_1(t,h,o,p,c) \
175 1.2 minoura _bus_space_write_region_1(t,h,o,p,c)
176 1.2 minoura #define bus_space_write_region_2(t,h,o,p,c) \
177 1.2 minoura _bus_space_write_region_2(t,h,o,p,c)
178 1.2 minoura #define bus_space_write_region_4(t,h,o,p,c) \
179 1.2 minoura _bus_space_write_region_4(t,h,o,p,c)
180 1.2 minoura
181 1.2 minoura #define bus_space_set_region_1(t,h,o,v,c) _bus_space_set_region_1(t,h,o,v,c)
182 1.2 minoura #define bus_space_set_region_2(t,h,o,v,c) _bus_space_set_region_2(t,h,o,v,c)
183 1.2 minoura #define bus_space_set_region_4(t,h,o,v,c) _bus_space_set_region_4(t,h,o,v,c)
184 1.2 minoura
185 1.2 minoura #define bus_space_copy_region_1(t,sh,so,dh,do,c) \
186 1.2 minoura _bus_space_copy_region_1(t,sh,so,dh,do,c)
187 1.2 minoura #define bus_space_copy_region_2(t,sh,so,dh,do,c) \
188 1.2 minoura _bus_space_copy_region_2(t,sh,so,dh,do,c)
189 1.2 minoura #define bus_space_copy_region_4(t,sh,so,dh,do,c) \
190 1.2 minoura _bus_space_copy_region_4(t,sh,so,dh,do,c)
191 1.2 minoura
192 1.21 tsutsui static __inline uint8_t _bus_space_read_1
193 1.12 chs (bus_space_tag_t, bus_space_handle_t bsh, bus_size_t offset);
194 1.21 tsutsui static __inline uint16_t _bus_space_read_2
195 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t);
196 1.21 tsutsui static __inline uint32_t _bus_space_read_4
197 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t);
198 1.2 minoura
199 1.15 perry static __inline void _bus_space_read_multi_1
200 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
201 1.21 tsutsui uint8_t *, bus_size_t);
202 1.15 perry static __inline void _bus_space_read_multi_2
203 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
204 1.21 tsutsui uint16_t *, bus_size_t);
205 1.15 perry static __inline void _bus_space_read_multi_4
206 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
207 1.21 tsutsui uint32_t *, bus_size_t);
208 1.2 minoura
209 1.15 perry static __inline void _bus_space_read_region_1
210 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
211 1.21 tsutsui uint8_t *, bus_size_t);
212 1.15 perry static __inline void _bus_space_read_region_2
213 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
214 1.21 tsutsui uint16_t *, bus_size_t);
215 1.15 perry static __inline void _bus_space_read_region_4
216 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
217 1.21 tsutsui uint32_t *, bus_size_t);
218 1.2 minoura
219 1.15 perry static __inline void _bus_space_write_1
220 1.21 tsutsui (bus_space_tag_t, bus_space_handle_t, bus_size_t, uint8_t);
221 1.15 perry static __inline void _bus_space_write_2
222 1.21 tsutsui (bus_space_tag_t, bus_space_handle_t, bus_size_t, uint16_t);
223 1.15 perry static __inline void _bus_space_write_4
224 1.21 tsutsui (bus_space_tag_t, bus_space_handle_t, bus_size_t, uint32_t);
225 1.2 minoura
226 1.15 perry static __inline void _bus_space_write_multi_1
227 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
228 1.21 tsutsui const uint8_t *, bus_size_t);
229 1.15 perry static __inline void _bus_space_write_multi_2
230 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
231 1.21 tsutsui const uint16_t *, bus_size_t);
232 1.15 perry static __inline void _bus_space_write_multi_4
233 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
234 1.21 tsutsui const uint32_t *, bus_size_t);
235 1.2 minoura
236 1.15 perry static __inline void _bus_space_write_region_1
237 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
238 1.21 tsutsui const uint8_t *, bus_size_t);
239 1.15 perry static __inline void _bus_space_write_region_2
240 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
241 1.21 tsutsui const uint16_t *, bus_size_t);
242 1.15 perry static __inline void _bus_space_write_region_4
243 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
244 1.21 tsutsui const uint32_t *, bus_size_t);
245 1.2 minoura
246 1.15 perry static __inline void _bus_space_set_region_1
247 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
248 1.21 tsutsui uint8_t, bus_size_t);
249 1.15 perry static __inline void _bus_space_set_region_2
250 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
251 1.21 tsutsui uint16_t, bus_size_t);
252 1.15 perry static __inline void _bus_space_set_region_4
253 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
254 1.21 tsutsui uint32_t, bus_size_t);
255 1.2 minoura
256 1.15 perry static __inline void _bus_space_copy_region_1
257 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
258 1.12 chs bus_space_handle_t, bus_size_t, bus_size_t);
259 1.15 perry static __inline void _bus_space_copy_region_2
260 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
261 1.12 chs bus_space_handle_t, bus_size_t, bus_size_t);
262 1.15 perry static __inline void _bus_space_copy_region_4
263 1.12 chs (bus_space_tag_t, bus_space_handle_t, bus_size_t,
264 1.12 chs bus_space_handle_t, bus_size_t, bus_size_t);
265 1.2 minoura
266 1.2 minoura
267 1.6 itohy #define __X68K_BUS_ADDR(tag, handle, offset) \
268 1.6 itohy (((long)(handle) < 0 ? (offset) * 2 : (offset)) \
269 1.6 itohy + ((handle) & 0x7fffffff))
270 1.6 itohy
271 1.21 tsutsui static __inline uint8_t
272 1.22 tsutsui _bus_space_read_1(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset)
273 1.2 minoura {
274 1.22 tsutsui
275 1.22 tsutsui return *((volatile uint8_t *) __X68K_BUS_ADDR(t, bsh, offset));
276 1.2 minoura }
277 1.2 minoura
278 1.21 tsutsui static __inline uint16_t
279 1.22 tsutsui _bus_space_read_2(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset)
280 1.2 minoura {
281 1.22 tsutsui
282 1.22 tsutsui return *((volatile uint16_t *) __X68K_BUS_ADDR(t, bsh, offset));
283 1.2 minoura }
284 1.2 minoura
285 1.21 tsutsui static __inline uint32_t
286 1.22 tsutsui _bus_space_read_4(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t offset)
287 1.2 minoura {
288 1.22 tsutsui
289 1.22 tsutsui return *((volatile uint32_t *) __X68K_BUS_ADDR(t, bsh, offset));
290 1.2 minoura }
291 1.2 minoura
292 1.15 perry static __inline void
293 1.22 tsutsui _bus_space_read_multi_1(bus_space_tag_t t, bus_space_handle_t bsh,
294 1.22 tsutsui bus_size_t offset, uint8_t *datap, bus_size_t count)
295 1.2 minoura {
296 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
297 1.21 tsutsui uint8_t *regadr = (uint8_t *) __X68K_BUS_ADDR(t, bsh, offset);
298 1.22 tsutsui
299 1.6 itohy for (; count; count--) {
300 1.6 itohy __asm("| avoid optim. _bus_space_read_multi_1" : : : "memory");
301 1.6 itohy *datap++ = *regadr;
302 1.6 itohy }
303 1.6 itohy #else
304 1.22 tsutsui
305 1.2 minoura while (count-- > 0) {
306 1.21 tsutsui *datap++ = *(volatile uint8_t *)
307 1.6 itohy __X68K_BUS_ADDR(t, bsh, offset);
308 1.2 minoura }
309 1.6 itohy #endif
310 1.2 minoura }
311 1.2 minoura
312 1.15 perry static __inline void
313 1.22 tsutsui _bus_space_read_multi_2(bus_space_tag_t t, bus_space_handle_t bsh,
314 1.22 tsutsui bus_size_t offset, uint16_t *datap, bus_size_t count)
315 1.2 minoura {
316 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
317 1.21 tsutsui uint16_t *regadr = (uint16_t *) __X68K_BUS_ADDR(t, bsh, offset);
318 1.22 tsutsui
319 1.6 itohy for (; count; count--) {
320 1.6 itohy __asm("| avoid optim. _bus_space_read_multi_2" : : : "memory");
321 1.6 itohy *datap++ = *regadr;
322 1.6 itohy }
323 1.6 itohy #else
324 1.22 tsutsui
325 1.2 minoura while (count-- > 0) {
326 1.21 tsutsui *datap++ = *(volatile uint16_t *)
327 1.6 itohy __X68K_BUS_ADDR(t, bsh, offset);
328 1.2 minoura }
329 1.6 itohy #endif
330 1.2 minoura }
331 1.2 minoura
332 1.15 perry static __inline void
333 1.22 tsutsui _bus_space_read_multi_4(bus_space_tag_t t, bus_space_handle_t bsh,
334 1.22 tsutsui bus_size_t offset, uint32_t *datap, bus_size_t count)
335 1.2 minoura {
336 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
337 1.21 tsutsui uint32_t *regadr = (uint32_t *) __X68K_BUS_ADDR(t, bsh, offset);
338 1.22 tsutsui
339 1.6 itohy for (; count; count--) {
340 1.6 itohy __asm("| avoid optim. _bus_space_read_multi_4" : : : "memory");
341 1.6 itohy *datap++ = *regadr;
342 1.6 itohy }
343 1.6 itohy #else
344 1.22 tsutsui
345 1.2 minoura while (count-- > 0) {
346 1.21 tsutsui *datap++ = *(volatile uint32_t *)
347 1.6 itohy __X68K_BUS_ADDR(t, bsh, offset);
348 1.2 minoura }
349 1.6 itohy #endif
350 1.2 minoura }
351 1.2 minoura
352 1.15 perry static __inline void
353 1.22 tsutsui _bus_space_read_region_1(bus_space_tag_t t, bus_space_handle_t bsh,
354 1.22 tsutsui bus_size_t offset, uint8_t *datap, bus_size_t count)
355 1.2 minoura {
356 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
357 1.21 tsutsui uint8_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
358 1.6 itohy
359 1.6 itohy for (; count; count--) {
360 1.6 itohy __asm("| avoid optim. _bus_space_read_region_1" : : : "memory");
361 1.6 itohy *datap++ = *addr++;
362 1.6 itohy }
363 1.6 itohy #else
364 1.21 tsutsui volatile uint8_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
365 1.2 minoura
366 1.2 minoura while (count-- > 0) {
367 1.2 minoura *datap++ = *addr++;
368 1.2 minoura }
369 1.6 itohy #endif
370 1.2 minoura }
371 1.2 minoura
372 1.15 perry static __inline void
373 1.22 tsutsui _bus_space_read_region_2(bus_space_tag_t t, bus_space_handle_t bsh,
374 1.22 tsutsui bus_size_t offset, uint16_t *datap, bus_size_t count)
375 1.2 minoura {
376 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
377 1.21 tsutsui uint16_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
378 1.6 itohy
379 1.6 itohy for (; count; count--) {
380 1.6 itohy __asm("| avoid optim. _bus_space_read_region_2" : : : "memory");
381 1.6 itohy *datap++ = *addr++;
382 1.6 itohy }
383 1.6 itohy #else
384 1.21 tsutsui volatile uint16_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
385 1.2 minoura
386 1.2 minoura while (count-- > 0) {
387 1.2 minoura *datap++ = *addr++;
388 1.2 minoura }
389 1.6 itohy #endif
390 1.2 minoura }
391 1.2 minoura
392 1.15 perry static __inline void
393 1.22 tsutsui _bus_space_read_region_4(bus_space_tag_t t, bus_space_handle_t bsh,
394 1.22 tsutsui bus_size_t offset, uint32_t *datap, bus_size_t count)
395 1.2 minoura {
396 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
397 1.21 tsutsui uint32_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
398 1.6 itohy
399 1.6 itohy for (; count; count--) {
400 1.6 itohy __asm("| avoid optim. _bus_space_read_region_4" : : : "memory");
401 1.6 itohy *datap++ = *addr++;
402 1.6 itohy }
403 1.6 itohy #else
404 1.21 tsutsui volatile uint32_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
405 1.2 minoura
406 1.2 minoura while (count-- > 0) {
407 1.2 minoura *datap++ = *addr++;
408 1.2 minoura }
409 1.6 itohy #endif
410 1.2 minoura }
411 1.2 minoura
412 1.15 perry static __inline void
413 1.22 tsutsui _bus_space_write_1(bus_space_tag_t t, bus_space_handle_t bsh,
414 1.22 tsutsui bus_size_t offset, uint8_t value)
415 1.2 minoura {
416 1.22 tsutsui
417 1.21 tsutsui *(volatile uint8_t *) __X68K_BUS_ADDR(t, bsh, offset) = value;
418 1.2 minoura }
419 1.2 minoura
420 1.15 perry static __inline void
421 1.22 tsutsui _bus_space_write_2(bus_space_tag_t t, bus_space_handle_t bsh,
422 1.22 tsutsui bus_size_t offset, uint16_t value)
423 1.2 minoura {
424 1.22 tsutsui
425 1.21 tsutsui *(volatile uint16_t *) __X68K_BUS_ADDR(t, bsh, offset) = value;
426 1.2 minoura }
427 1.2 minoura
428 1.15 perry static __inline void
429 1.22 tsutsui _bus_space_write_4(bus_space_tag_t t, bus_space_handle_t bsh,
430 1.22 tsutsui bus_size_t offset, uint32_t value)
431 1.2 minoura {
432 1.22 tsutsui
433 1.21 tsutsui *(volatile uint32_t *) __X68K_BUS_ADDR(t, bsh, offset) = value;
434 1.2 minoura }
435 1.2 minoura
436 1.15 perry static __inline void
437 1.22 tsutsui _bus_space_write_multi_1(bus_space_tag_t t, bus_space_handle_t bsh,
438 1.22 tsutsui bus_size_t offset, const uint8_t *datap, bus_size_t count)
439 1.2 minoura {
440 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
441 1.21 tsutsui uint8_t *regadr = (uint8_t *) __X68K_BUS_ADDR(t, bsh, offset);
442 1.22 tsutsui
443 1.6 itohy for (; count; count--) {
444 1.6 itohy __asm("| avoid optim. _bus_space_write_multi_1" : : : "memory");
445 1.6 itohy *regadr = *datap++;
446 1.6 itohy }
447 1.6 itohy #else
448 1.22 tsutsui
449 1.2 minoura while (count-- > 0) {
450 1.21 tsutsui *(volatile uint8_t *) __X68K_BUS_ADDR(t, bsh, offset)
451 1.6 itohy = *datap++;
452 1.2 minoura }
453 1.6 itohy #endif
454 1.2 minoura }
455 1.2 minoura
456 1.15 perry static __inline void
457 1.22 tsutsui _bus_space_write_multi_2(bus_space_tag_t t, bus_space_handle_t bsh,
458 1.22 tsutsui bus_size_t offset, const uint16_t *datap, bus_size_t count)
459 1.2 minoura {
460 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
461 1.21 tsutsui uint16_t *regadr = (uint16_t *) __X68K_BUS_ADDR(t, bsh, offset);
462 1.22 tsutsui
463 1.6 itohy for (; count; count--) {
464 1.6 itohy __asm("| avoid optim. _bus_space_write_multi_2" : : : "memory");
465 1.6 itohy *regadr = *datap++;
466 1.6 itohy }
467 1.6 itohy #else
468 1.22 tsutsui
469 1.2 minoura while (count-- > 0) {
470 1.21 tsutsui *(volatile uint16_t *) __X68K_BUS_ADDR(t, bsh, offset)
471 1.6 itohy = *datap++;
472 1.2 minoura }
473 1.6 itohy #endif
474 1.2 minoura }
475 1.2 minoura
476 1.15 perry static __inline void
477 1.22 tsutsui _bus_space_write_multi_4(bus_space_tag_t t, bus_space_handle_t bsh,
478 1.22 tsutsui bus_size_t offset, const uint32_t *datap, bus_size_t count)
479 1.2 minoura {
480 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
481 1.21 tsutsui uint32_t *regadr = (uint32_t *) __X68K_BUS_ADDR(t, bsh, offset);
482 1.22 tsutsui
483 1.6 itohy for (; count; count--) {
484 1.6 itohy __asm("| avoid optim. _bus_space_write_multi_4" : : : "memory");
485 1.6 itohy *regadr = *datap++;
486 1.6 itohy }
487 1.6 itohy #else
488 1.22 tsutsui
489 1.2 minoura while (count-- > 0) {
490 1.21 tsutsui *(volatile uint32_t *) __X68K_BUS_ADDR(t, bsh, offset)
491 1.6 itohy = *datap++;
492 1.2 minoura }
493 1.6 itohy #endif
494 1.2 minoura }
495 1.2 minoura
496 1.15 perry static __inline void
497 1.22 tsutsui _bus_space_write_region_1(bus_space_tag_t t, bus_space_handle_t bsh,
498 1.22 tsutsui bus_size_t offset, const uint8_t *datap, bus_size_t count)
499 1.2 minoura {
500 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
501 1.21 tsutsui uint8_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
502 1.6 itohy
503 1.6 itohy for (; count; count--) {
504 1.6 itohy __asm("| avoid optim. _bus_space_write_region_1": : : "memory");
505 1.6 itohy *addr++ = *datap++;
506 1.6 itohy }
507 1.6 itohy #else
508 1.21 tsutsui volatile uint8_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
509 1.2 minoura
510 1.2 minoura while (count-- > 0) {
511 1.2 minoura *addr++ = *datap++;
512 1.2 minoura }
513 1.6 itohy #endif
514 1.2 minoura }
515 1.2 minoura
516 1.15 perry static __inline void
517 1.22 tsutsui _bus_space_write_region_2(bus_space_tag_t t, bus_space_handle_t bsh,
518 1.22 tsutsui bus_size_t offset, const uint16_t *datap, bus_size_t count)
519 1.2 minoura {
520 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
521 1.21 tsutsui uint16_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
522 1.6 itohy
523 1.6 itohy for (; count; count--) {
524 1.6 itohy __asm("| avoid optim. _bus_space_write_region_2": : : "memory");
525 1.6 itohy *addr++ = *datap++;
526 1.6 itohy }
527 1.6 itohy #else
528 1.21 tsutsui volatile uint16_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
529 1.2 minoura
530 1.2 minoura while (count-- > 0) {
531 1.2 minoura *addr++ = *datap++;
532 1.2 minoura }
533 1.6 itohy #endif
534 1.2 minoura }
535 1.2 minoura
536 1.15 perry static __inline void
537 1.22 tsutsui _bus_space_write_region_4(bus_space_tag_t t, bus_space_handle_t bsh,
538 1.22 tsutsui bus_size_t offset, const uint32_t *datap, bus_size_t count)
539 1.2 minoura {
540 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
541 1.21 tsutsui uint32_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
542 1.6 itohy
543 1.6 itohy for (; count; count--) {
544 1.6 itohy __asm("| avoid optim. _bus_space_write_region_4": : : "memory");
545 1.6 itohy *addr++ = *datap++;
546 1.6 itohy }
547 1.6 itohy #else
548 1.21 tsutsui volatile uint32_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
549 1.2 minoura
550 1.2 minoura while (count-- > 0) {
551 1.2 minoura *addr++ = *datap++;
552 1.2 minoura }
553 1.6 itohy #endif
554 1.2 minoura }
555 1.2 minoura
556 1.15 perry static __inline void
557 1.22 tsutsui _bus_space_set_region_1(bus_space_tag_t t, bus_space_handle_t bsh,
558 1.22 tsutsui bus_size_t offset, uint8_t value, bus_size_t count)
559 1.2 minoura {
560 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
561 1.21 tsutsui uint8_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
562 1.6 itohy
563 1.6 itohy for (; count; count--) {
564 1.6 itohy __asm("| avoid optim. _bus_space_set_region_1" : : : "memory");
565 1.6 itohy *addr++ = value;
566 1.6 itohy }
567 1.6 itohy #else
568 1.21 tsutsui volatile uint8_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
569 1.2 minoura
570 1.2 minoura while (count-- > 0) {
571 1.2 minoura *addr++ = value;
572 1.2 minoura }
573 1.6 itohy #endif
574 1.2 minoura }
575 1.2 minoura
576 1.15 perry static __inline void
577 1.22 tsutsui _bus_space_set_region_2(bus_space_tag_t t, bus_space_handle_t bsh,
578 1.22 tsutsui bus_size_t offset, uint16_t value, bus_size_t count)
579 1.2 minoura {
580 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
581 1.21 tsutsui uint16_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
582 1.6 itohy
583 1.6 itohy for (; count; count--) {
584 1.6 itohy __asm("| avoid optim. _bus_space_set_region_2" : : : "memory");
585 1.6 itohy *addr++ = value;
586 1.6 itohy }
587 1.6 itohy #else
588 1.21 tsutsui volatile uint16_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
589 1.2 minoura
590 1.2 minoura while (count-- > 0) {
591 1.2 minoura *addr++ = value;
592 1.2 minoura }
593 1.6 itohy #endif
594 1.2 minoura }
595 1.2 minoura
596 1.15 perry static __inline void
597 1.22 tsutsui _bus_space_set_region_4(bus_space_tag_t t, bus_space_handle_t bsh,
598 1.22 tsutsui bus_size_t offset, uint32_t value, bus_size_t count)
599 1.2 minoura {
600 1.6 itohy #if X68K_BUS_PERFORMANCE_HACK
601 1.21 tsutsui uint32_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
602 1.6 itohy
603 1.6 itohy for (; count; count--) {
604 1.6 itohy __asm("| avoid optim. _bus_space_set_region_4" : : : "memory");
605 1.6 itohy *addr++ = value;
606 1.6 itohy }
607 1.6 itohy #else
608 1.21 tsutsui volatile uint32_t *addr = (void *) __X68K_BUS_ADDR(t, bsh, offset);
609 1.2 minoura
610 1.2 minoura while (count-- > 0) {
611 1.2 minoura *addr++ = value;
612 1.2 minoura }
613 1.6 itohy #endif
614 1.2 minoura }
615 1.2 minoura
616 1.15 perry static __inline void
617 1.22 tsutsui _bus_space_copy_region_1(bus_space_tag_t t,
618 1.22 tsutsui bus_space_handle_t sbsh, bus_size_t soffset,
619 1.22 tsutsui bus_space_handle_t dbsh, bus_size_t doffset,
620 1.22 tsutsui bus_size_t count)
621 1.2 minoura {
622 1.21 tsutsui volatile uint8_t *saddr = (void *) (sbsh + soffset);
623 1.21 tsutsui volatile uint8_t *daddr = (void *) (dbsh + doffset);
624 1.2 minoura
625 1.21 tsutsui if ((uint32_t) saddr >= (uint32_t) daddr)
626 1.2 minoura while (count-- > 0)
627 1.2 minoura *daddr++ = *saddr++;
628 1.2 minoura else {
629 1.2 minoura saddr += count;
630 1.2 minoura daddr += count;
631 1.2 minoura while (count-- > 0)
632 1.2 minoura *--daddr = *--saddr;
633 1.2 minoura }
634 1.2 minoura }
635 1.2 minoura
636 1.15 perry static __inline void
637 1.22 tsutsui _bus_space_copy_region_2(bus_space_tag_t t,
638 1.22 tsutsui bus_space_handle_t sbsh, bus_size_t soffset,
639 1.22 tsutsui bus_space_handle_t dbsh, bus_size_t doffset,
640 1.22 tsutsui bus_size_t count)
641 1.2 minoura {
642 1.21 tsutsui volatile uint16_t *saddr = (void *) (sbsh + soffset);
643 1.21 tsutsui volatile uint16_t *daddr = (void *) (dbsh + doffset);
644 1.2 minoura
645 1.21 tsutsui if ((uint32_t) saddr >= (uint32_t) daddr)
646 1.2 minoura while (count-- > 0)
647 1.2 minoura *daddr++ = *saddr++;
648 1.2 minoura else {
649 1.2 minoura saddr += count;
650 1.2 minoura daddr += count;
651 1.2 minoura while (count-- > 0)
652 1.2 minoura *--daddr = *--saddr;
653 1.2 minoura }
654 1.2 minoura }
655 1.2 minoura
656 1.15 perry static __inline void
657 1.22 tsutsui _bus_space_copy_region_4(bus_space_tag_t t,
658 1.22 tsutsui bus_space_handle_t sbsh, bus_size_t soffset,
659 1.22 tsutsui bus_space_handle_t dbsh, bus_size_t doffset,
660 1.22 tsutsui bus_size_t count)
661 1.2 minoura {
662 1.21 tsutsui volatile uint32_t *saddr = (void *) (sbsh + soffset);
663 1.21 tsutsui volatile uint32_t *daddr = (void *) (dbsh + doffset);
664 1.2 minoura
665 1.21 tsutsui if ((uint32_t) saddr >= (uint32_t) daddr)
666 1.2 minoura while (count-- > 0)
667 1.2 minoura *daddr++ = *saddr++;
668 1.2 minoura else {
669 1.2 minoura saddr += count;
670 1.2 minoura daddr += count;
671 1.2 minoura while (count-- > 0)
672 1.2 minoura *--daddr = *--saddr;
673 1.2 minoura }
674 1.2 minoura }
675 1.2 minoura
676 1.3 drochner #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
677 1.2 minoura
678 1.2 minoura /*
679 1.2 minoura * DMA segment
680 1.2 minoura */
681 1.2 minoura struct x68k_bus_dma_segment {
682 1.2 minoura bus_addr_t ds_addr;
683 1.2 minoura bus_size_t ds_len;
684 1.2 minoura };
685 1.2 minoura typedef struct x68k_bus_dma_segment bus_dma_segment_t;
686 1.2 minoura
687 1.2 minoura /*
688 1.2 minoura * DMA descriptor
689 1.2 minoura */
690 1.2 minoura /* Forwards needed by prototypes below. */
691 1.2 minoura struct mbuf;
692 1.2 minoura struct uio;
693 1.2 minoura
694 1.2 minoura typedef struct x68k_bus_dma *bus_dma_tag_t;
695 1.2 minoura typedef struct x68k_bus_dmamap *bus_dmamap_t;
696 1.11 fvdl
697 1.11 fvdl #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
698 1.11 fvdl
699 1.2 minoura struct x68k_bus_dma {
700 1.2 minoura /*
701 1.2 minoura * The `bounce threshold' is checked while we are loading
702 1.2 minoura * the DMA map. If the physical address of the segment
703 1.2 minoura * exceeds the threshold, an error will be returned. The
704 1.2 minoura * caller can then take whatever action is necessary to
705 1.2 minoura * bounce the transfer. If this value is 0, it will be
706 1.2 minoura * ignored.
707 1.2 minoura */
708 1.2 minoura bus_addr_t _bounce_thresh;
709 1.2 minoura
710 1.2 minoura /*
711 1.2 minoura * DMA mapping methods.
712 1.2 minoura */
713 1.12 chs int (*x68k_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
714 1.12 chs bus_size_t, bus_size_t, int, bus_dmamap_t *);
715 1.12 chs void (*x68k_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
716 1.12 chs int (*x68k_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
717 1.12 chs bus_size_t, struct proc *, int);
718 1.12 chs int (*x68k_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
719 1.12 chs struct mbuf *, int);
720 1.12 chs int (*x68k_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
721 1.12 chs struct uio *, int);
722 1.12 chs int (*x68k_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
723 1.12 chs bus_dma_segment_t *, int, bus_size_t, int);
724 1.12 chs void (*x68k_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
725 1.12 chs void (*x68k_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
726 1.12 chs bus_addr_t, bus_size_t, int);
727 1.2 minoura
728 1.2 minoura /*
729 1.2 minoura * DMA memory utility functions.
730 1.2 minoura */
731 1.12 chs int (*x68k_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
732 1.12 chs bus_size_t, bus_dma_segment_t *, int, int *, int);
733 1.12 chs void (*x68k_dmamem_free)(bus_dma_tag_t,
734 1.12 chs bus_dma_segment_t *, int);
735 1.12 chs int (*x68k_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
736 1.17 christos int, size_t, void **, int);
737 1.17 christos void (*x68k_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
738 1.12 chs paddr_t (*x68k_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
739 1.12 chs int, off_t, int, int);
740 1.2 minoura };
741 1.2 minoura
742 1.2 minoura /*
743 1.2 minoura * bus_dmamap_t
744 1.2 minoura *
745 1.2 minoura * Describes a DMA mapping.
746 1.2 minoura */
747 1.2 minoura struct x68k_bus_dmamap {
748 1.2 minoura /*
749 1.2 minoura * PRIVATE MEMBERS: not for use my machine-independent code.
750 1.2 minoura */
751 1.2 minoura bus_size_t x68k_dm_size; /* largest DMA transfer mappable */
752 1.2 minoura int x68k_dm_segcnt; /* number of segs this map can map */
753 1.13 matt bus_size_t x68k_dm_maxmaxsegsz; /* fixed largest possible segment*/
754 1.2 minoura bus_size_t x68k_dm_boundary; /* don't cross this */
755 1.2 minoura bus_addr_t x68k_dm_bounce_thresh; /* bounce threshold */
756 1.2 minoura int x68k_dm_flags; /* misc. flags */
757 1.2 minoura
758 1.2 minoura void *x68k_dm_cookie; /* cookie for bus-specific functions */
759 1.2 minoura
760 1.2 minoura /*
761 1.2 minoura * PUBLIC MEMBERS: these are used by machine-independent code.
762 1.2 minoura */
763 1.13 matt bus_size_t dm_maxsegsz; /* largest possible segment */
764 1.2 minoura bus_size_t dm_mapsize; /* size of the mapping */
765 1.2 minoura int dm_nsegs; /* # valid segments in mapping */
766 1.2 minoura bus_dma_segment_t dm_segs[1]; /* segments; variable length */
767 1.2 minoura };
768 1.2 minoura
769 1.12 chs int x68k_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
770 1.12 chs bus_size_t, int, bus_dmamap_t *);
771 1.12 chs void x68k_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
772 1.12 chs int x68k_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
773 1.12 chs bus_size_t, struct proc *, int);
774 1.12 chs int x68k_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
775 1.12 chs struct mbuf *, int);
776 1.12 chs int x68k_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
777 1.12 chs struct uio *, int);
778 1.12 chs int x68k_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
779 1.12 chs bus_dma_segment_t *, int, bus_size_t, int);
780 1.12 chs void x68k_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
781 1.12 chs void x68k_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
782 1.12 chs bus_size_t, int);
783 1.2 minoura
784 1.12 chs int x68k_bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
785 1.2 minoura bus_size_t alignment, bus_size_t boundary,
786 1.12 chs bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
787 1.12 chs void x68k_bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
788 1.12 chs int nsegs);
789 1.12 chs int x68k_bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
790 1.17 christos int nsegs, size_t size, void **kvap, int flags);
791 1.17 christos void x68k_bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
792 1.12 chs size_t size);
793 1.12 chs paddr_t x68k_bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
794 1.12 chs int nsegs, off_t off, int prot, int flags);
795 1.12 chs
796 1.12 chs int x68k_bus_dmamap_load_buffer(bus_dmamap_t, void *,
797 1.12 chs bus_size_t buflen, struct proc *, int, paddr_t *, int *, int);
798 1.12 chs int x68k_bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
799 1.2 minoura bus_size_t alignment, bus_size_t boundary,
800 1.2 minoura bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
801 1.12 chs paddr_t low, paddr_t high);
802 1.2 minoura
803 1.2 minoura #define bus_dmamap_create(t,s,n,m,b,f,p) \
804 1.2 minoura ((*((t)->x68k_dmamap_create)) ((t),(s),(n),(m),(b),(f),(p)))
805 1.2 minoura #define bus_dmamap_destroy(t,p) \
806 1.2 minoura ((*((t)->x68k_dmamap_destroy)) ((t),(p)))
807 1.2 minoura #define bus_dmamap_load(t,m,b,s,p,f) \
808 1.2 minoura ((*((t)->x68k_dmamap_load)) ((t),(m),(b),(s),(p),(f)))
809 1.2 minoura #define bus_dmamap_load_mbuf(t,m,b,f) \
810 1.2 minoura ((*((t)->x68k_dmamap_load_mbuf)) ((t),(m),(b),(f)))
811 1.2 minoura #define bus_dmamap_load_uio(t,m,u,f) \
812 1.2 minoura ((*((t)->x68k_dmamap_load_uio)) ((t),(m),(u),(f)))
813 1.2 minoura #define bus_dmamap_load_raw(t,m,sg,n,s,f) \
814 1.2 minoura ((*((t)->x68k_dmamap_load_raw)) ((t),(m),(sg),(n),(s),(f)))
815 1.2 minoura #define bus_dmamap_unload(t,p) \
816 1.2 minoura ((*((t)->x68k_dmamap_unload)) ((t),(p)))
817 1.2 minoura #define bus_dmamap_sync(t,p,o,l,ops) \
818 1.2 minoura ((*((t)->x68k_dmamap_sync)) ((t),(p),(o),(l),(ops)))
819 1.2 minoura
820 1.2 minoura #define bus_dmamem_alloc(t,s,a,b,sg,n,r,f) \
821 1.2 minoura ((*((t)->x68k_dmamem_alloc)) ((t),(s),(a),(b),(sg),(n),(r),(f)))
822 1.2 minoura #define bus_dmamem_free(t,sg,n) \
823 1.2 minoura ((*((t)->x68k_dmamem_free)) ((t),(sg),(n)))
824 1.2 minoura #define bus_dmamem_map(t,sg,n,s,k,f) \
825 1.2 minoura ((*((t)->x68k_dmamem_map)) ((t),(sg),(n),(s),(k),(f)))
826 1.2 minoura #define bus_dmamem_unmap(t,k,s) \
827 1.2 minoura ((*((t)->x68k_dmamem_unmap)) ((t),(k),(s)))
828 1.2 minoura #define bus_dmamem_mmap(t,sg,n,o,p,f) \
829 1.2 minoura ((*((t)->x68k_dmamem_mmap)) ((t),(sg),(n),(o),(p),(f)))
830 1.2 minoura
831 1.16 mrg #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
832 1.16 mrg #define bus_dmatag_destroy(t)
833 1.16 mrg
834 1.2 minoura /*
835 1.2 minoura * Flags used in various bus DMA methods.
836 1.2 minoura */
837 1.8 thorpej #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
838 1.8 thorpej #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
839 1.8 thorpej #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
840 1.8 thorpej #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
841 1.8 thorpej #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
842 1.8 thorpej #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
843 1.8 thorpej #define BUS_DMA_BUS2 0x020
844 1.8 thorpej #define BUS_DMA_BUS3 0x040
845 1.8 thorpej #define BUS_DMA_BUS4 0x080
846 1.8 thorpej #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
847 1.8 thorpej #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
848 1.10 kent #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
849 1.2 minoura
850 1.2 minoura /*
851 1.2 minoura * Operations performed by bus_dmamap_sync().
852 1.2 minoura */
853 1.2 minoura #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
854 1.2 minoura #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
855 1.2 minoura #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
856 1.2 minoura #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
857 1.2 minoura
858 1.2 minoura #endif /* _X68K_BUS_H_ */
859