cpu.h revision 1.10 1 /* $NetBSD: cpu.h,v 1.10 1998/10/06 20:50:18 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1990, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 *
42 * @(#)cpu.h 8.4 (Berkeley) 1/5/94
43 */
44
45 #ifndef _X68K_CPU_H_
46 #define _X68K_CPU_H_
47
48 /*
49 * Exported definitions unique to x68k/68k cpu support.
50 */
51
52 /*
53 * Get common m68k CPU definitions.
54 */
55 #include <m68k/cpu.h>
56 #define M68K_MMU_MOTOROLA
57
58 /*
59 * definitions of cpu-dependent requirements
60 * referenced in generic code
61 */
62 #define cpu_swapin(p) /* nothing */
63 #define cpu_wait(p) /* nothing */
64 #define cpu_swapout(p) /* nothing */
65
66 /*
67 * Arguments to hardclock and gatherstats encapsulate the previous
68 * machine state in an opaque clockframe. One the x68k, we use
69 * what the hardware pushes on an interrupt (frame format 0).
70 */
71 struct clockframe {
72 u_short sr; /* sr at time of interrupt */
73 u_long pc; /* pc at time of interrupt */
74 u_short vo; /* vector offset (4-word frame) */
75 };
76
77 #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
78 #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
79 #define CLKF_PC(framep) ((framep)->pc)
80 #if 0
81 /* We would like to do it this way... */
82 #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
83 #else
84 /* but until we start using PSL_M, we have to do this instead */
85 #define CLKF_INTR(framep) (0) /* XXX */
86 #endif
87
88
89 /*
90 * Preempt the current process if in interrupt from user mode,
91 * or after the current trap/syscall if in system mode.
92 */
93 extern int want_resched; /* resched() was called */
94 #define need_resched() { want_resched++; aston(); }
95
96 /*
97 * Give a profiling tick to the current process when the user profiling
98 * buffer pages are invalid. On the x68k, request an ast to send us
99 * through trap, marking the proc as needing a profiling tick.
100 */
101 #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
102
103 /*
104 * Notify the current process (p) that it has a signal pending,
105 * process as soon as possible.
106 */
107 #define signotify(p) aston()
108
109 extern int astpending; /* need to trap before returning to user mode */
110 #define aston() (astpending++)
111
112 /*
113 * simulated software interrupt register
114 */
115 extern unsigned char ssir;
116
117 #define SIR_NET 0x1
118 #define SIR_CLOCK 0x2
119 #define SIR_SERIAL 0x4
120 #define SIR_KBD 0x8
121
122 #define siroff(x) ssir &= ~(x)
123 #define setsoftnet() ssir |= SIR_NET
124 #define setsoftclock() ssir |= SIR_CLOCK
125 #define setsoftserial() ssir |= SIR_SERIAL
126 #define setsoftkbd() ssir |= SIR_KBD
127
128 /*
129 * CTL_MACHDEP definitions.
130 */
131 #define CPU_CONSDEV 1 /* dev_t: console terminal device */
132 #define CPU_MAXID 2 /* number of valid machdep ids */
133
134 #define CTL_MACHDEP_NAMES { \
135 { 0, 0 }, \
136 { "console_device", CTLTYPE_STRUCT }, \
137 }
138
139 /*
140 * The rest of this should probably be moved to ../x68k/x68kcpu.h,
141 * although some of it could probably be put into generic 68k headers.
142 */
143
144 /* values for cpuspeed (not really related to clock speed due to caches) */
145 #define MHZ_8 1
146 #define MHZ_16 2
147 #define MHZ_25 3
148 #define MHZ_33 4
149 #define MHZ_50 6
150
151 #ifdef _KERNEL
152 extern int machineid;
153 extern char *intiolimit;
154
155 /* autoconf.c functions */
156 void config_console __P((void));
157
158 /* fpu.c functions */
159 int fpu_probe __P((void));
160
161 /* machdep.c functions */
162 void dumpconf __P((void));
163 void dumpsys __P((void));
164
165 /* locore.s functions */
166 struct pcb;
167 struct fpframe;
168 void savectx __P((struct pcb *));
169 void switch_exit __P((struct proc *));
170 void proc_trampoline __P((void));
171 void loadustp __P((int));
172 void m68881_save __P((struct fpframe *));
173 void m68881_restore __P((struct fpframe *));
174 void DCIS __P((void));
175 void DCIU __P((void));
176 void ICIA __P((void));
177 void ICPA __P((void));
178 void PCIA __P((void));
179 void TBIA __P((void));
180 void TBIS __P((vaddr_t));
181 void TBIAS __P((void));
182 void TBIAU __P((void));
183 #if defined(M68040) || defined(M68060)
184 void DCFA __P((void));
185 void DCFP __P((vaddr_t));
186 void DCFL __P((vaddr_t));
187 void DCPL __P((vaddr_t));
188 void DCPP __P((vaddr_t));
189 void ICPL __P((vaddr_t));
190 void ICPP __P((vaddr_t));
191 #endif
192
193 /* sys_machdep.c functions */
194 int cachectl __P((int, caddr_t, int));
195 int dma_cachectl __P((caddr_t, int));
196
197 /* vm_machdep.c functions */
198 void physaccess __P((caddr_t, caddr_t, int, int));
199 void physunaccess __P((caddr_t, int));
200 int kvtop __P((caddr_t));
201
202 /* trap.c functions */
203 void child_return __P((struct proc *, void *));
204
205 #endif
206
207 /* physical memory sections */
208 #define INTIOBASE (0x00C00000)
209 #define INTIOTOP (0x01000000)
210
211 /*
212 * Internal IO space:
213 *
214 * Ranges from 0xC00000 to 0x1000000 (IIOMAPSIZE).
215 *
216 * Internal IO space is mapped in the kernel from ``IODEVbase'' to
217 * ``intiolimit'' (defined in locore.s). Since it is always mapped,
218 * conversion between physical and kernel virtual addresses is easy.
219 */
220 #define IIOPOFF(pa) ((int)(pa)-INTIOBASE)
221 #define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 4mb */
222
223 #endif /* _X68K_CPU_H_ */
224