intr.h revision 1.1
11.1Sminoura/* $NetBSD: intr.h,v 1.1 1998/12/13 15:04:01 minoura Exp $ */ 21.1Sminoura 31.1Sminoura/* 41.1Sminoura * 51.1Sminoura * Copyright (c) 1998 NetBSD Foundation, Inc. 61.1Sminoura * All rights reserved. 71.1Sminoura * 81.1Sminoura * This code is derived from software contributed to The NetBSD Foundation 91.1Sminoura * by Minoura Makoto and Jason R. Thorpe. 101.1Sminoura * 111.1Sminoura * Redistribution and use in source and binary forms, with or without 121.1Sminoura * modification, are permitted provided that the following conditions 131.1Sminoura * are met: 141.1Sminoura * 1. Redistributions of source code must retain the above copyright 151.1Sminoura * notice, this list of conditions and the following disclaimer. 161.1Sminoura * 2. Redistributions in binary form must reproduce the above copyright 171.1Sminoura * notice, this list of conditions and the following disclaimer in the 181.1Sminoura * documentation and/or other materials provided with the distribution. 191.1Sminoura * 3. All advertising materials mentioning features or use of this software 201.1Sminoura * must display the following acknowledgement: 211.1Sminoura * This product includes software developed by Charles D. Cranor and 221.1Sminoura * Washington University. 231.1Sminoura * 4. The name of the author may not be used to endorse or promote products 241.1Sminoura * derived from this software without specific prior written permission. 251.1Sminoura * 261.1Sminoura * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 271.1Sminoura * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 281.1Sminoura * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 291.1Sminoura * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 301.1Sminoura * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 311.1Sminoura * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 321.1Sminoura * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 331.1Sminoura * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 341.1Sminoura * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 351.1Sminoura * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 361.1Sminoura */ 371.1Sminoura 381.1Sminoura#ifndef _X68K_INTR_H_ 391.1Sminoura#define _X68K_INTR_H_ 401.1Sminoura 411.1Sminoura/* 421.1Sminoura * spl functions; all but spl0 are done in-line 431.1Sminoura */ 441.1Sminoura#include <machine/psl.h> 451.1Sminoura 461.1Sminoura#define _spl(s) \ 471.1Sminoura({ \ 481.1Sminoura register int _spl_r; \ 491.1Sminoura \ 501.1Sminoura __asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" : \ 511.1Sminoura "&=d" (_spl_r) : "di" (s)); \ 521.1Sminoura _spl_r; \ 531.1Sminoura}) 541.1Sminoura 551.1Sminoura#define _splraise(s) \ 561.1Sminoura({ \ 571.1Sminoura int _spl_r; \ 581.1Sminoura \ 591.1Sminoura __asm __volatile (" \ 601.1Sminoura clrl d0 ; \ 611.1Sminoura movw sr,d0 ; \ 621.1Sminoura movl d0,%0 ; \ 631.1Sminoura andw #0x700,d0 ; \ 641.1Sminoura movw %1,d1 ; \ 651.1Sminoura andw #0x700,d1 ; \ 661.1Sminoura cmpw d0,d1 ; \ 671.1Sminoura jle 1f ; \ 681.1Sminoura movw %1,sr ; \ 691.1Sminoura 1:" : \ 701.1Sminoura "&=d" (_spl_r) : \ 711.1Sminoura "di" (s) : \ 721.1Sminoura "d0", "d1"); \ 731.1Sminoura _spl_r; \ 741.1Sminoura}) 751.1Sminoura 761.1Sminoura/* spl0 requires checking for software interrupts */ 771.1Sminouravoid spl0 __P((void)); 781.1Sminoura#define spl1() _spl(PSL_S|PSL_IPL1) 791.1Sminoura#define spl2() _spl(PSL_S|PSL_IPL2) 801.1Sminoura#define spl3() _spl(PSL_S|PSL_IPL3) 811.1Sminoura#define spl4() _spl(PSL_S|PSL_IPL4) 821.1Sminoura#define spl5() _spl(PSL_S|PSL_IPL5) 831.1Sminoura#define spl6() _spl(PSL_S|PSL_IPL6) 841.1Sminoura#define spl7() _spl(PSL_S|PSL_IPL7) 851.1Sminoura 861.1Sminoura#define splnone() spl0() 871.1Sminoura#define splsoftclock() spl1() /* disallow softclock */ 881.1Sminoura#define splsoftnet() spl1() /* disallow softnet */ 891.1Sminoura#define splnet() _splraise(PSL_S|PSL_IPL4) /* disallow network */ 901.1Sminoura#define splbio() _splraise(PSL_S|PSL_IPL3) /* disallow block I/O */ 911.1Sminoura#define splimp() _splraise(PSL_S|PSL_IPL4) /* disallow imput */ 921.1Sminoura#define spltty() _splraise(PSL_S|PSL_IPL4) /* disallow tty interrupts */ 931.1Sminoura#define splzs() spl5() /* disallow serial interrupts */ 941.1Sminoura#define splclock() spl6() /* disallow clock interrupt */ 951.1Sminoura#define splstatclock() spl6() /* disallow clock interrupt */ 961.1Sminoura#define splvm() _splraise(PSL_S|PSL_IPL4) /* disallow virtual memory operations */ 971.1Sminoura#define splhigh() spl7() /* disallow everything */ 981.1Sminoura#define splsched() spl7() /* disallow scheduling */ 991.1Sminoura 1001.1Sminoura/* watch out for side effects */ 1011.1Sminoura#define splx(s) ((s) & PSL_IPL ? _spl(s) : spl0()) 1021.1Sminoura 1031.1Sminoura/* 1041.1Sminoura * simulated software interrupt register 1051.1Sminoura */ 1061.1Sminouraextern unsigned char ssir; 1071.1Sminoura 1081.1Sminoura#define SIR_NET 0x1 1091.1Sminoura#define SIR_CLOCK 0x2 1101.1Sminoura#define SIR_SERIAL 0x4 1111.1Sminoura#define SIR_KBD 0x8 1121.1Sminoura 1131.1Sminoura#define siroff(x) ssir &= ~(x) 1141.1Sminoura#define setsoftnet() ssir |= SIR_NET 1151.1Sminoura#define setsoftclock() ssir |= SIR_CLOCK 1161.1Sminoura#define setsoftserial() ssir |= SIR_SERIAL 1171.1Sminoura#define setsoftkbd() ssir |= SIR_KBD 1181.1Sminoura 1191.1Sminoura#endif 120