intr.h revision 1.2 
1/*	$NetBSD: intr.h,v 1.2 1999/03/16 16:30:21 minoura Exp $	*/
2
3/*
4 *
5 * Copyright (c) 1998 NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Minoura Makoto and Jason R. Thorpe.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *      This product includes software developed by Charles D. Cranor and
22 *      Washington University.
23 * 4. The name of the author may not be used to endorse or promote products
24 *    derived from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
28 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
30 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
35 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#ifndef _X68K_INTR_H_
39#define	_X68K_INTR_H_
40
41/*
42 * spl functions; all but spl0 are done in-line
43 */
44#include <machine/psl.h>
45
46#define _spl(s)								\
47({									\
48	register int _spl_r;						\
49									\
50	__asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" :		\
51	    "&=d" (_spl_r) : "di" (s));					\
52	_spl_r;								\
53})
54
55#define	_splraise(s)							\
56({									\
57	int _spl_r;							\
58									\
59	__asm __volatile ("						\
60		clrl	d0					;	\
61		movw	sr,d0					;	\
62		movl	d0,%0					;	\
63		andw	#0x700,d0				;	\
64		movw	%1,d1					;	\
65		andw	#0x700,d1				;	\
66		cmpw	d0,d1					;	\
67		jle	1f					;	\
68		movw	%1,sr					;	\
69	    1:"							:	\
70		    "&=d" (_spl_r)				:	\
71		    "di" (s)					:	\
72		    "d0", "d1");					\
73	_spl_r;								\
74})
75
76/* spl0 requires checking for software interrupts */
77void	spl0 __P((void));
78#define spl1()  _spl(PSL_S|PSL_IPL1)
79#define spl2()  _spl(PSL_S|PSL_IPL2)
80#define spl3()  _spl(PSL_S|PSL_IPL3)
81#define spl4()  _spl(PSL_S|PSL_IPL4)
82#define spl5()  _spl(PSL_S|PSL_IPL5)
83#define spl6()  _spl(PSL_S|PSL_IPL6)
84#define spl7()  _spl(PSL_S|PSL_IPL7)
85
86#define splnone()       spl0()
87#define splsoftclock()  spl1()  /* disallow softclock */
88#define splsoftnet()	spl1()	/* disallow softnet */
89#define splnet()        _splraise(PSL_S|PSL_IPL4) /* disallow network */
90#define splbio()        _splraise(PSL_S|PSL_IPL3) /* disallow block I/O */
91#define splimp()        _splraise(PSL_S|PSL_IPL4) /* disallow imput */
92#define spltty()        _splraise(PSL_S|PSL_IPL4) /* disallow tty interrupts */
93#define splzs()         spl5()	/* disallow serial interrupts */
94#define splclock()      spl6()	/* disallow clock interrupt */
95#define splstatclock()  spl6()	/* disallow clock interrupt */
96#define splvm()         _splraise(PSL_S|PSL_IPL4) /* disallow virtual memory operations */
97#define splhigh()       spl7()	/* disallow everything */
98#define splsched()      spl7()	/* disallow scheduling */
99
100/* watch out for side effects */
101#define splx(s)         ((s) & PSL_IPL ? _spl(s) : spl0())
102
103/*
104 * simulated software interrupt register
105 */
106extern unsigned char ssir;
107
108#define SIR_NET		0x1
109#define SIR_CLOCK	0x2
110#define SIR_SERIAL	0x4
111#define SIR_KBD		0x8
112
113#define siroff(x)	ssir &= ~(x)
114#define setsoftnet()	ssir |= SIR_NET
115#define setsoftclock()	ssir |= SIR_CLOCK
116#define setsoftserial() ssir |= SIR_SERIAL
117#define setsoftkbd()    ssir |= SIR_KBD
118
119#endif
120