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acpi_cpu_md.c revision 1.11
      1 /* $NetBSD: acpi_cpu_md.c,v 1.11 2010/08/13 18:44:24 jruoho Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2010 Jukka Ruohonen <jruohonen (at) iki.fi>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  *
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     27  * SUCH DAMAGE.
     28  */
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: acpi_cpu_md.c,v 1.11 2010/08/13 18:44:24 jruoho Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/bus.h>
     34 #include <sys/kcore.h>
     35 #include <sys/sysctl.h>
     36 #include <sys/xcall.h>
     37 
     38 #include <x86/cpu.h>
     39 #include <x86/cpufunc.h>
     40 #include <x86/cputypes.h>
     41 #include <x86/cpuvar.h>
     42 #include <x86/cpu_msr.h>
     43 #include <x86/machdep.h>
     44 
     45 #include <dev/acpi/acpica.h>
     46 #include <dev/acpi/acpi_cpu.h>
     47 
     48 static char	  native_idle_text[16];
     49 void		(*native_idle)(void) = NULL;
     50 void		(*native_cpu_freq_init)(int) = NULL;
     51 
     52 static int	 acpicpu_md_pstate_sysctl_get(SYSCTLFN_PROTO);
     53 static int	 acpicpu_md_pstate_sysctl_set(SYSCTLFN_PROTO);
     54 static int	 acpicpu_md_pstate_sysctl_all(SYSCTLFN_PROTO);
     55 static int	 acpicpu_md_tstate_get_status(uint64_t *);
     56 
     57 extern uint32_t cpus_running;
     58 extern struct acpicpu_softc **acpicpu_sc;
     59 
     60 uint32_t
     61 acpicpu_md_cap(void)
     62 {
     63 	struct cpu_info *ci = curcpu();
     64 	uint32_t val = 0;
     65 
     66 	if (cpu_vendor != CPUVENDOR_INTEL)
     67 		return val;
     68 
     69 	/*
     70 	 * Basic SMP C-states (required for _CST).
     71 	 */
     72 	val |= ACPICPU_PDC_C_C1PT | ACPICPU_PDC_C_C2C3;
     73 
     74         /*
     75 	 * If MONITOR/MWAIT is available, announce
     76 	 * support for native instructions in all C-states.
     77 	 */
     78         if ((ci->ci_feat_val[1] & CPUID2_MONITOR) != 0)
     79 		val |= ACPICPU_PDC_C_C1_FFH | ACPICPU_PDC_C_C2C3_FFH;
     80 
     81 	/*
     82 	 * Set native P- and T-states, if available.
     83 	 */
     84         if ((ci->ci_feat_val[1] & CPUID2_EST) != 0)
     85 		val |= ACPICPU_PDC_P_FFH;
     86 
     87 	if ((ci->ci_feat_val[0] & CPUID_ACPI) != 0)
     88 		val |= ACPICPU_PDC_T_FFH;
     89 
     90 	return val;
     91 }
     92 
     93 uint32_t
     94 acpicpu_md_quirks(void)
     95 {
     96 	struct cpu_info *ci = curcpu();
     97 	uint32_t val = 0;
     98 
     99 	if (acpicpu_md_cpus_running() == 1)
    100 		val |= ACPICPU_FLAG_C_BM;
    101 
    102 	if ((ci->ci_feat_val[1] & CPUID2_MONITOR) != 0)
    103 		val |= ACPICPU_FLAG_C_FFH;
    104 
    105 	switch (cpu_vendor) {
    106 
    107 	case CPUVENDOR_INTEL:
    108 
    109 		val |= ACPICPU_FLAG_C_BM | ACPICPU_FLAG_C_ARB;
    110 
    111 		if ((ci->ci_feat_val[1] & CPUID2_EST) != 0)
    112 			val |= ACPICPU_FLAG_P_FFH;
    113 
    114 		if ((ci->ci_feat_val[0] & CPUID_ACPI) != 0)
    115 			val |= ACPICPU_FLAG_T_FFH;
    116 
    117 		/*
    118 		 * Bus master arbitration is not
    119 		 * needed on some recent Intel CPUs.
    120 		 */
    121 		if (CPUID2FAMILY(ci->ci_signature) > 15)
    122 			val &= ~ACPICPU_FLAG_C_ARB;
    123 
    124 		if (CPUID2FAMILY(ci->ci_signature) == 6 &&
    125 		    CPUID2MODEL(ci->ci_signature) >= 15)
    126 			val &= ~ACPICPU_FLAG_C_ARB;
    127 
    128 		break;
    129 
    130 	case CPUVENDOR_AMD:
    131 
    132 		/*
    133 		 * XXX: Deal with PowerNow! and C1E here.
    134 		 */
    135 		break;
    136 	}
    137 
    138 	return val;
    139 }
    140 
    141 uint32_t
    142 acpicpu_md_cpus_running(void)
    143 {
    144 
    145 	return popcount32(cpus_running);
    146 }
    147 
    148 int
    149 acpicpu_md_idle_start(void)
    150 {
    151 	const size_t size = sizeof(native_idle_text);
    152 
    153 	x86_disable_intr();
    154 	x86_cpu_idle_get(&native_idle, native_idle_text, size);
    155 	x86_cpu_idle_set(acpicpu_cstate_idle, "acpi");
    156 	x86_enable_intr();
    157 
    158 	return 0;
    159 }
    160 
    161 int
    162 acpicpu_md_idle_stop(void)
    163 {
    164 	uint64_t xc;
    165 
    166 	x86_disable_intr();
    167 	x86_cpu_idle_set(native_idle, native_idle_text);
    168 	x86_enable_intr();
    169 
    170 	/*
    171 	 * Run a cross-call to ensure that all CPUs are
    172 	 * out from the ACPI idle-loop before detachment.
    173 	 */
    174 	xc = xc_broadcast(0, (xcfunc_t)nullop, NULL, NULL);
    175 	xc_wait(xc);
    176 
    177 	return 0;
    178 }
    179 
    180 /*
    181  * The MD idle loop. Called with interrupts disabled.
    182  */
    183 void
    184 acpicpu_md_idle_enter(int method, int state)
    185 {
    186 	struct cpu_info *ci = curcpu();
    187 
    188 	switch (method) {
    189 
    190 	case ACPICPU_C_STATE_FFH:
    191 
    192 		x86_enable_intr();
    193 		x86_monitor(&ci->ci_want_resched, 0, 0);
    194 
    195 		if (__predict_false(ci->ci_want_resched) != 0)
    196 			return;
    197 
    198 		x86_mwait((state - 1) << 4, 0);
    199 		break;
    200 
    201 	case ACPICPU_C_STATE_HALT:
    202 
    203 		if (__predict_false(ci->ci_want_resched) != 0) {
    204 			x86_enable_intr();
    205 			return;
    206 		}
    207 
    208 		x86_stihlt();
    209 		break;
    210 	}
    211 }
    212 
    213 int
    214 acpicpu_md_pstate_start(void)
    215 {
    216 	const struct sysctlnode	*fnode, *mnode, *rnode;
    217 	const char *str;
    218 	int rv;
    219 
    220 	switch (cpu_vendor) {
    221 
    222 	case CPUVENDOR_INTEL:
    223 		str = "est";
    224 		break;
    225 
    226 	default:
    227 		return ENODEV;
    228 	}
    229 
    230 	/*
    231 	 * A kludge for backwards compatibility.
    232 	 */
    233 	native_cpu_freq_init = cpu_freq_init;
    234 
    235 	if (cpu_freq_sysctllog != NULL) {
    236 		sysctl_teardown(&cpu_freq_sysctllog);
    237 		cpu_freq_sysctllog = NULL;
    238 	}
    239 
    240 	rv = sysctl_createv(&cpu_freq_sysctllog, 0, NULL, &rnode,
    241 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL,
    242 	    NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL);
    243 
    244 	if (rv != 0)
    245 		goto fail;
    246 
    247 	rv = sysctl_createv(&cpu_freq_sysctllog, 0, &rnode, &mnode,
    248 	    0, CTLTYPE_NODE, str, NULL,
    249 	    NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL);
    250 
    251 	if (rv != 0)
    252 		goto fail;
    253 
    254 	rv = sysctl_createv(&cpu_freq_sysctllog, 0, &mnode, &fnode,
    255 	    0, CTLTYPE_NODE, "frequency", NULL,
    256 	    NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL);
    257 
    258 	if (rv != 0)
    259 		goto fail;
    260 
    261 	rv = sysctl_createv(&cpu_freq_sysctllog, 0, &fnode, &rnode,
    262 	    CTLFLAG_READWRITE, CTLTYPE_INT, "target", NULL,
    263 	    acpicpu_md_pstate_sysctl_set, 0, NULL, 0, CTL_CREATE, CTL_EOL);
    264 
    265 	if (rv != 0)
    266 		goto fail;
    267 
    268 	rv = sysctl_createv(&cpu_freq_sysctllog, 0, &fnode, &rnode,
    269 	    CTLFLAG_READONLY, CTLTYPE_INT, "current", NULL,
    270 	    acpicpu_md_pstate_sysctl_get, 0, NULL, 0, CTL_CREATE, CTL_EOL);
    271 
    272 	if (rv != 0)
    273 		goto fail;
    274 
    275 	rv = sysctl_createv(&cpu_freq_sysctllog, 0, &fnode, &rnode,
    276 	    CTLFLAG_READONLY, CTLTYPE_STRING, "available", NULL,
    277 	    acpicpu_md_pstate_sysctl_all, 0, NULL, 0, CTL_CREATE, CTL_EOL);
    278 
    279 	if (rv != 0)
    280 		goto fail;
    281 
    282 	return 0;
    283 
    284 fail:
    285 	if (cpu_freq_sysctllog != NULL) {
    286 		sysctl_teardown(&cpu_freq_sysctllog);
    287 		cpu_freq_sysctllog = NULL;
    288 	}
    289 
    290 	if (native_cpu_freq_init != NULL)
    291 		(*native_cpu_freq_init)(cpu_vendor);
    292 
    293 	return rv;
    294 }
    295 
    296 int
    297 acpicpu_md_pstate_stop(void)
    298 {
    299 
    300 	if (cpu_freq_sysctllog != NULL) {
    301 		sysctl_teardown(&cpu_freq_sysctllog);
    302 		cpu_freq_sysctllog = NULL;
    303 	}
    304 
    305 	if (native_cpu_freq_init != NULL)
    306 		(*native_cpu_freq_init)(cpu_vendor);
    307 
    308 	return 0;
    309 }
    310 
    311 static int
    312 acpicpu_md_pstate_sysctl_get(SYSCTLFN_ARGS)
    313 {
    314 	struct cpu_info *ci = curcpu();
    315 	struct acpicpu_softc *sc;
    316 	struct sysctlnode node;
    317 	uint32_t freq;
    318 	int err;
    319 
    320 	sc = acpicpu_sc[ci->ci_acpiid];
    321 
    322 	if (sc == NULL)
    323 		return ENXIO;
    324 
    325 	err = acpicpu_pstate_get(sc, &freq);
    326 
    327 	if (err != 0)
    328 		return err;
    329 
    330 	node = *rnode;
    331 	node.sysctl_data = &freq;
    332 
    333 	err = sysctl_lookup(SYSCTLFN_CALL(&node));
    334 
    335 	if (err != 0 || newp == NULL)
    336 		return err;
    337 
    338 	return 0;
    339 }
    340 
    341 static int
    342 acpicpu_md_pstate_sysctl_set(SYSCTLFN_ARGS)
    343 {
    344 	struct cpu_info *ci = curcpu();
    345 	struct acpicpu_softc *sc;
    346 	struct sysctlnode node;
    347 	uint32_t freq;
    348 	int err;
    349 
    350 	sc = acpicpu_sc[ci->ci_acpiid];
    351 
    352 	if (sc == NULL)
    353 		return ENXIO;
    354 
    355 	err = acpicpu_pstate_get(sc, &freq);
    356 
    357 	if (err != 0)
    358 		return err;
    359 
    360 	node = *rnode;
    361 	node.sysctl_data = &freq;
    362 
    363 	err = sysctl_lookup(SYSCTLFN_CALL(&node));
    364 
    365 	if (err != 0 || newp == NULL)
    366 		return err;
    367 
    368 	err = acpicpu_pstate_set(sc, freq);
    369 
    370 	if (err != 0)
    371 		return err;
    372 
    373 	return 0;
    374 }
    375 
    376 static int
    377 acpicpu_md_pstate_sysctl_all(SYSCTLFN_ARGS)
    378 {
    379 	struct cpu_info *ci = curcpu();
    380 	struct acpicpu_softc *sc;
    381 	struct sysctlnode node;
    382 	char buf[1024];
    383 	size_t len;
    384 	uint32_t i;
    385 	int err;
    386 
    387 	sc = acpicpu_sc[ci->ci_acpiid];
    388 
    389 	if (sc == NULL)
    390 		return ENXIO;
    391 
    392 	(void)memset(&buf, 0, sizeof(buf));
    393 
    394 	mutex_enter(&sc->sc_mtx);
    395 
    396 	for (len = 0, i = sc->sc_pstate_max; i < sc->sc_pstate_count; i++) {
    397 
    398 		if (sc->sc_pstate[i].ps_freq == 0)
    399 			continue;
    400 
    401 		len += snprintf(buf + len, sizeof(buf) - len, "%u%s",
    402 		    sc->sc_pstate[i].ps_freq,
    403 		    i < (sc->sc_pstate_count - 1) ? " " : "");
    404 	}
    405 
    406 	mutex_exit(&sc->sc_mtx);
    407 
    408 	node = *rnode;
    409 	node.sysctl_data = buf;
    410 
    411 	err = sysctl_lookup(SYSCTLFN_CALL(&node));
    412 
    413 	if (err != 0 || newp == NULL)
    414 		return err;
    415 
    416 	return 0;
    417 }
    418 
    419 int
    420 acpicpu_md_pstate_get(struct acpicpu_softc *sc, uint32_t *freq)
    421 {
    422 	struct acpicpu_pstate *ps;
    423 	uint64_t val;
    424 	uint32_t i;
    425 
    426 	switch (cpu_vendor) {
    427 
    428 	case CPUVENDOR_INTEL:
    429 
    430 		val = rdmsr(MSR_PERF_STATUS);
    431 		val = val & 0xffff;
    432 
    433 		for (i = 0; i < sc->sc_pstate_count; i++) {
    434 
    435 			ps = &sc->sc_pstate[i];
    436 
    437 			if (ps->ps_freq == 0)
    438 				continue;
    439 
    440 			if (val == ps->ps_status) {
    441 				*freq = ps->ps_freq;
    442 				return 0;
    443 			}
    444 		}
    445 
    446 		return EIO;
    447 
    448 	default:
    449 		return ENODEV;
    450 	}
    451 
    452 	return 0;
    453 }
    454 
    455 int
    456 acpicpu_md_pstate_set(struct acpicpu_pstate *ps)
    457 {
    458 	struct msr_rw_info msr;
    459 	uint64_t xc, val;
    460 	int i;
    461 
    462 	switch (cpu_vendor) {
    463 
    464 	case CPUVENDOR_INTEL:
    465 		msr.msr_read  = true;
    466 		msr.msr_type  = MSR_PERF_CTL;
    467 		msr.msr_value = ps->ps_control;
    468 		msr.msr_mask  = 0xffffULL;
    469 		break;
    470 
    471 	default:
    472 		return ENODEV;
    473 	}
    474 
    475 	xc = xc_broadcast(0, (xcfunc_t)x86_msr_xcall, &msr, NULL);
    476 	xc_wait(xc);
    477 
    478 	for (i = val = 0; i < ACPICPU_P_STATE_RETRY; i++) {
    479 
    480 		val = rdmsr(MSR_PERF_STATUS);
    481 		val = val & 0xffff;
    482 
    483 		if (val == ps->ps_status)
    484 			return 0;
    485 
    486 		DELAY(ps->ps_latency);
    487 	}
    488 
    489 	return EAGAIN;
    490 }
    491 
    492 int
    493 acpicpu_md_tstate_get(struct acpicpu_softc *sc, uint32_t *percent)
    494 {
    495 	struct acpicpu_tstate *ts;
    496 	uint64_t val;
    497 	uint32_t i;
    498 	int rv;
    499 
    500 	rv = acpicpu_md_tstate_get_status(&val);
    501 
    502 	if (rv != 0)
    503 		return rv;
    504 
    505 	for (i = 0; i < sc->sc_tstate_count; i++) {
    506 
    507 		ts = &sc->sc_tstate[i];
    508 
    509 		if (ts->ts_percent == 0)
    510 			continue;
    511 
    512 		if (val == ts->ts_control || val == ts->ts_status) {
    513 			*percent = ts->ts_percent;
    514 			return 0;
    515 		}
    516 	}
    517 
    518 	return EIO;
    519 }
    520 
    521 static int
    522 acpicpu_md_tstate_get_status(uint64_t *val)
    523 {
    524 
    525 	switch (cpu_vendor) {
    526 
    527 	case CPUVENDOR_INTEL:
    528 		*val = rdmsr(MSR_THERM_CONTROL);
    529 		break;
    530 
    531 	default:
    532 		return ENODEV;
    533 	}
    534 
    535 	return 0;
    536 }
    537 
    538 int
    539 acpicpu_md_tstate_set(struct acpicpu_tstate *ts)
    540 {
    541 	struct msr_rw_info msr;
    542 	uint64_t xc, val;
    543 	int i;
    544 
    545 	switch (cpu_vendor) {
    546 
    547 	case CPUVENDOR_INTEL:
    548 		msr.msr_read  = true;
    549 		msr.msr_type  = MSR_THERM_CONTROL;
    550 		msr.msr_value = ts->ts_control;
    551 		msr.msr_mask = __BITS(1, 4);
    552 		break;
    553 
    554 	default:
    555 		return ENODEV;
    556 	}
    557 
    558 	xc = xc_broadcast(0, (xcfunc_t)x86_msr_xcall, &msr, NULL);
    559 	xc_wait(xc);
    560 
    561 	if (ts->ts_status == 0)
    562 		return 0;
    563 
    564 	for (i = val = 0; i < ACPICPU_T_STATE_RETRY; i++) {
    565 
    566 		(void)acpicpu_md_tstate_get_status(&val);
    567 
    568 		if (val == ts->ts_status)
    569 			return 0;
    570 
    571 		DELAY(ts->ts_latency);
    572 	}
    573 
    574 	return EAGAIN;
    575 }
    576