acpi_cpu_md.c revision 1.2 1 /* $NetBSD: acpi_cpu_md.c,v 1.2 2010/07/18 09:39:45 jruoho Exp $ */
2
3 /*-
4 * Copyright (c) 2010 Jukka Ruohonen <jruohonen (at) iki.fi>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: acpi_cpu_md.c,v 1.2 2010/07/18 09:39:45 jruoho Exp $");
31
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/kcore.h>
35
36 #include <x86/cpu.h>
37 #include <x86/cpuvar.h>
38 #include <x86/machdep.h>
39 #include <x86/cputypes.h>
40
41 #include <dev/acpi/acpica.h>
42 #include <dev/acpi/acpi_cpu.h>
43
44 static char native_idle_text[16];
45 void (*native_idle)(void) = NULL;
46
47 extern uint32_t cpus_running;
48
49 uint32_t
50 acpicpu_md_cap(void)
51 {
52 struct cpu_info *ci = curcpu();
53 uint32_t val = 0;
54
55 if (cpu_vendor != CPUVENDOR_INTEL)
56 return val;
57
58 /*
59 * Basic SMP C-states (required for _CST).
60 */
61 val |= ACPICPU_PDC_C_C1PT | ACPICPU_PDC_C_C2C3;
62
63 /*
64 * If MONITOR/MWAIT is available, announce
65 * support for native instructions in all C-states.
66 */
67 if ((ci->ci_feat_val[1] & CPUID2_MONITOR) != 0)
68 val |= ACPICPU_PDC_C_C1_FFH | ACPICPU_PDC_C_C2C3_FFH;
69
70 return val;
71 }
72
73 uint32_t
74 acpicpu_md_quirks(void)
75 {
76 struct cpu_info *ci = curcpu();
77 uint32_t val = 0;
78
79 if (acpicpu_md_cpus_running() == 1)
80 val |= ACPICPU_FLAG_C_BM;
81
82 if ((ci->ci_feat_val[1] & CPUID2_MONITOR) != 0)
83 val |= ACPICPU_FLAG_C_MWAIT;
84
85 switch (cpu_vendor) {
86
87 case CPUVENDOR_INTEL:
88 val |= ACPICPU_FLAG_C_BM | ACPICPU_FLAG_C_ARB;
89
90 /*
91 * Bus master arbitration is not
92 * needed on some recent Intel CPUs.
93 */
94 if (CPUID2FAMILY(ci->ci_signature) > 15)
95 val &= ~ACPICPU_FLAG_C_ARB;
96
97 if (CPUID2FAMILY(ci->ci_signature) == 6 &&
98 CPUID2MODEL(ci->ci_signature) >= 15)
99 val &= ~ACPICPU_FLAG_C_ARB;
100
101 break;
102
103 case CPUVENDOR_AMD:
104
105 /*
106 * XXX: Deal with the AMD C1E extension here.
107 */
108 break;
109 }
110
111 return val;
112 }
113
114 uint32_t
115 acpicpu_md_cpus_running(void)
116 {
117
118 return popcount32(cpus_running);
119 }
120
121 int
122 acpicpu_md_idle_init(void)
123 {
124 const size_t size = sizeof(native_idle_text);
125
126 KASSERT(native_idle == NULL);
127
128 x86_disable_intr();
129 x86_cpu_idle_get(&native_idle, native_idle_text, size);
130 x86_enable_intr();
131
132 return 0;
133 }
134
135 int
136 acpicpu_md_idle_start(void)
137 {
138
139 KASSERT(native_idle != NULL);
140 KASSERT(native_idle_text[0] != '\0');
141
142 x86_disable_intr();
143 x86_cpu_idle_set(acpicpu_cstate_idle, "acpi");
144 x86_enable_intr();
145
146 DELAY(10000);
147
148 return 0;
149 }
150
151 int
152 acpicpu_md_idle_stop(void)
153 {
154
155 KASSERT(native_idle != NULL);
156 KASSERT(native_idle_text[0] != '\0');
157
158 x86_disable_intr();
159 x86_cpu_idle_set(native_idle, native_idle_text);
160 x86_enable_intr();
161
162 DELAY(10000);
163
164 return 0;
165 }
166
167 void
168 acpicpu_md_idle_enter(int method, int state)
169 {
170
171 KASSERT(native_idle != NULL);
172
173 switch (method) {
174
175 case ACPICPU_C_STATE_FFH:
176 x86_mwait((state - 1) << 4, 0);
177 break;
178
179 case ACPICPU_C_STATE_HALT:
180 x86_stihlt();
181 break;
182
183 default:
184 (*native_idle)();
185 break;
186 }
187 }
188