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cpu.h revision 1.101
      1  1.101    cherry /*	$NetBSD: cpu.h,v 1.101 2018/12/25 06:50:11 cherry Exp $	*/
      2    1.1        ad 
      3   1.84      maxv /*
      4    1.1        ad  * Copyright (c) 1990 The Regents of the University of California.
      5    1.1        ad  * All rights reserved.
      6    1.1        ad  *
      7    1.1        ad  * This code is derived from software contributed to Berkeley by
      8    1.1        ad  * William Jolitz.
      9    1.1        ad  *
     10    1.1        ad  * Redistribution and use in source and binary forms, with or without
     11    1.1        ad  * modification, are permitted provided that the following conditions
     12    1.1        ad  * are met:
     13    1.1        ad  * 1. Redistributions of source code must retain the above copyright
     14    1.1        ad  *    notice, this list of conditions and the following disclaimer.
     15    1.1        ad  * 2. Redistributions in binary form must reproduce the above copyright
     16    1.1        ad  *    notice, this list of conditions and the following disclaimer in the
     17    1.1        ad  *    documentation and/or other materials provided with the distribution.
     18    1.1        ad  * 3. Neither the name of the University nor the names of its contributors
     19    1.1        ad  *    may be used to endorse or promote products derived from this software
     20    1.1        ad  *    without specific prior written permission.
     21    1.1        ad  *
     22    1.1        ad  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     23    1.1        ad  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24    1.1        ad  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25    1.1        ad  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     26    1.1        ad  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27    1.1        ad  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28    1.1        ad  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29    1.1        ad  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30    1.1        ad  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31    1.1        ad  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32    1.1        ad  * SUCH DAMAGE.
     33    1.1        ad  *
     34    1.1        ad  *	@(#)cpu.h	5.4 (Berkeley) 5/9/91
     35    1.1        ad  */
     36    1.1        ad 
     37    1.1        ad #ifndef _X86_CPU_H_
     38    1.1        ad #define _X86_CPU_H_
     39    1.1        ad 
     40   1.32       mrg #if defined(_KERNEL) || defined(_STANDALONE)
     41   1.32       mrg #include <sys/types.h>
     42   1.32       mrg #else
     43   1.63       dsl #include <stdint.h>
     44   1.32       mrg #include <stdbool.h>
     45   1.32       mrg #endif /* _KERNEL || _STANDALONE */
     46   1.32       mrg 
     47   1.11        ad #if defined(_KERNEL) || defined(_KMEMUSER)
     48    1.1        ad #if defined(_KERNEL_OPT)
     49    1.1        ad #include "opt_xen.h"
     50   1.88      maxv #include "opt_svs.h"
     51    1.1        ad #ifdef i386
     52    1.1        ad #include "opt_user_ldt.h"
     53    1.1        ad #endif
     54    1.1        ad #endif
     55    1.1        ad 
     56    1.1        ad /*
     57    1.1        ad  * Definitions unique to x86 cpu support.
     58    1.1        ad  */
     59    1.1        ad #include <machine/frame.h>
     60   1.23       jym #include <machine/pte.h>
     61    1.1        ad #include <machine/segments.h>
     62    1.1        ad #include <machine/tss.h>
     63    1.1        ad #include <machine/intrdefs.h>
     64    1.1        ad 
     65    1.1        ad #include <x86/cacheinfo.h>
     66    1.1        ad 
     67    1.1        ad #include <sys/cpu_data.h>
     68    1.9       mrg #include <sys/evcnt.h>
     69   1.19    cegger #include <sys/device_if.h> /* for device_t */
     70    1.1        ad 
     71   1.36    cherry #ifdef XEN
     72   1.44    cegger #include <xen/xen-public/xen.h>
     73   1.44    cegger #include <xen/xen-public/event_channel.h>
     74   1.48    bouyer #include <sys/mutex.h>
     75   1.36    cherry #endif /* XEN */
     76   1.36    cherry 
     77    1.1        ad struct intrsource;
     78    1.1        ad struct pmap;
     79    1.1        ad 
     80    1.1        ad #ifdef __x86_64__
     81    1.1        ad #define	i386tss	x86_64_tss
     82    1.1        ad #endif
     83    1.1        ad 
     84    1.1        ad #define	NIOPORTS	1024		/* # of ports we allow to be mapped */
     85    1.1        ad #define	IOMAPSIZE	(NIOPORTS / 8)	/* I/O bitmap size in bytes */
     86    1.1        ad 
     87   1.85      maxv struct cpu_tss {
     88   1.85      maxv #ifdef i386
     89   1.85      maxv 	struct i386tss dblflt_tss;
     90   1.85      maxv 	struct i386tss ddbipi_tss;
     91   1.85      maxv #endif
     92   1.85      maxv 	struct i386tss tss;
     93   1.85      maxv 	uint8_t iomap[IOMAPSIZE];
     94   1.85      maxv } __packed;
     95   1.85      maxv 
     96    1.1        ad /*
     97   1.99    cherry  * Arguments to hardclock, softclock and statclock
     98   1.99    cherry  * encapsulate the previous machine state in an opaque
     99   1.99    cherry  * clockframe; for now, use generic intrframe.
    100   1.99    cherry  */
    101   1.99    cherry struct clockframe {
    102   1.99    cherry 	struct intrframe cf_if;
    103   1.99    cherry };
    104   1.99    cherry 
    105   1.99    cherry /*
    106    1.1        ad  * a bunch of this belongs in cpuvar.h; move it later..
    107    1.1        ad  */
    108    1.1        ad 
    109    1.1        ad struct cpu_info {
    110   1.26  christos 	struct cpu_data ci_data;	/* MI per-cpu data */
    111   1.19    cegger 	device_t ci_dev;		/* pointer to our device */
    112    1.1        ad 	struct cpu_info *ci_self;	/* self-pointer */
    113    1.1        ad 	volatile struct vcpu_info *ci_vcpu; /* for XEN */
    114    1.1        ad 
    115    1.1        ad 	/*
    116    1.1        ad 	 * Will be accessed by other CPUs.
    117    1.1        ad 	 */
    118    1.1        ad 	struct cpu_info *ci_next;	/* next cpu */
    119    1.1        ad 	struct lwp *ci_curlwp;		/* current owner of the processor */
    120   1.58  christos 	struct lwp *ci_fpcurlwp;	/* current owner of the FPU */
    121    1.1        ad 	cpuid_t ci_cpuid;		/* our CPU ID */
    122   1.24    jruoho 	uint32_t ci_acpiid;		/* our ACPI/MADT ID */
    123   1.84      maxv 	uint32_t ci_initapicid;		/* our initial APIC ID */
    124    1.1        ad 
    125    1.1        ad 	/*
    126    1.1        ad 	 * Private members.
    127    1.1        ad 	 */
    128    1.1        ad 	struct pmap *ci_pmap;		/* current pmap */
    129    1.1        ad 	int ci_want_pmapload;		/* pmap_load() is needed */
    130    1.1        ad 	volatile int ci_tlbstate;	/* one of TLBSTATE_ states. see below */
    131    1.1        ad #define	TLBSTATE_VALID	0	/* all user tlbs are valid */
    132    1.1        ad #define	TLBSTATE_LAZY	1	/* tlbs are valid but won't be kept uptodate */
    133    1.1        ad #define	TLBSTATE_STALE	2	/* we might have stale user tlbs */
    134    1.3        ad 	int ci_curldt;		/* current LDT descriptor */
    135   1.16        ad 	int ci_nintrhand;	/* number of H/W interrupt handlers */
    136    1.1        ad 	uint64_t ci_scratch;
    137   1.35     rmind 	uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)];
    138    1.1        ad 
    139    1.1        ad 	struct intrsource *ci_isources[MAX_INTR_SOURCES];
    140  1.101    cherry #if defined(XEN)
    141  1.101    cherry 	struct intrsource *ci_xsources[NIPL];
    142  1.101    cherry 	uint32_t	ci_xmask[NIPL];
    143  1.101    cherry 	uint32_t	ci_xunmask[NIPL];
    144  1.101    cherry 	uint32_t	ci_xpending; /* XEN doesn't use the cmpxchg8 path */
    145  1.101    cherry #endif
    146  1.101    cherry 
    147    1.1        ad 	volatile int	ci_mtx_count;	/* Negative count of spin mutexes */
    148    1.1        ad 	volatile int	ci_mtx_oldspl;	/* Old SPL at this ci_idepth */
    149    1.1        ad 
    150    1.1        ad 	/* The following must be aligned for cmpxchg8b. */
    151    1.1        ad 	struct {
    152    1.1        ad 		uint32_t	ipending;
    153    1.1        ad 		int		ilevel;
    154    1.1        ad 	} ci_istate __aligned(8);
    155    1.1        ad #define ci_ipending	ci_istate.ipending
    156    1.1        ad #define	ci_ilevel	ci_istate.ilevel
    157    1.1        ad 	int		ci_idepth;
    158    1.1        ad 	void *		ci_intrstack;
    159    1.1        ad 	uint32_t	ci_imask[NIPL];
    160    1.1        ad 	uint32_t	ci_iunmask[NIPL];
    161    1.1        ad 
    162    1.1        ad 	uint32_t ci_flags;		/* flags; see below */
    163    1.1        ad 	uint32_t ci_ipis;		/* interprocessor interrupts pending */
    164    1.1        ad 
    165   1.64       dsl 	uint32_t	ci_signature;	 /* X86 cpuid type (cpuid.1.%eax) */
    166    1.1        ad 	uint32_t	ci_vendor[4];	 /* vendor string */
    167   1.64       dsl 	uint32_t	ci_max_cpuid;	/* cpuid.0:%eax */
    168   1.64       dsl 	uint32_t	ci_max_ext_cpuid; /* cpuid.80000000:%eax */
    169    1.1        ad 	volatile uint32_t	ci_lapic_counter;
    170    1.1        ad 
    171   1.90      maxv 	uint32_t	ci_feat_val[8]; /* X86 CPUID feature bits */
    172   1.64       dsl 			/* [0] basic features cpuid.1:%edx
    173   1.64       dsl 			 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits)
    174   1.64       dsl 			 * [2] extended features cpuid:80000001:%edx
    175   1.64       dsl 			 * [3] extended features cpuid:80000001:%ecx
    176   1.64       dsl 			 * [4] VIA padlock features
    177   1.67      maxv 			 * [5] structured extended features cpuid.7:%ebx
    178   1.67      maxv 			 * [6] structured extended features cpuid.7:%ecx
    179   1.90      maxv 			 * [7] structured extended features cpuid.7:%edx
    180   1.64       dsl 			 */
    181   1.21       jym 
    182    1.1        ad 	const struct cpu_functions *ci_func;  /* start/stop functions */
    183    1.1        ad 	struct trapframe *ci_ddb_regs;
    184    1.1        ad 
    185   1.70   msaitoh 	u_int ci_cflush_lsize;	/* CLFLUSH insn line size */
    186    1.1        ad 	struct x86_cache_info ci_cinfo[CAI_COUNT];
    187    1.1        ad 
    188   1.96  pgoyette 	device_t	ci_frequency;	/* Frequency scaling technology */
    189   1.96  pgoyette 	device_t	ci_padlock;	/* VIA PadLock private storage */
    190   1.96  pgoyette 	device_t	ci_temperature;	/* Intel coretemp(4) or equivalent */
    191   1.96  pgoyette 	device_t	ci_vm;		/* Virtual machine guest driver */
    192   1.96  pgoyette 
    193   1.96  pgoyette 	/*
    194   1.96  pgoyette 	 * Segmentation-related data.
    195   1.96  pgoyette 	 */
    196   1.96  pgoyette 	union descriptor *ci_gdt;
    197   1.96  pgoyette 	struct cpu_tss	*ci_tss;	/* Per-cpu TSSes; shared among LWPs */
    198   1.96  pgoyette 	int ci_tss_sel;			/* TSS selector of this cpu */
    199   1.96  pgoyette 
    200   1.96  pgoyette 	/*
    201   1.96  pgoyette 	 * The following two are actually region_descriptors,
    202   1.96  pgoyette 	 * but that would pollute the namespace.
    203   1.96  pgoyette 	 */
    204   1.96  pgoyette 	uintptr_t	ci_suspend_gdt;
    205   1.96  pgoyette 	uint16_t	ci_suspend_gdt_padding;
    206   1.96  pgoyette 	uintptr_t	ci_suspend_idt;
    207   1.96  pgoyette 	uint16_t	ci_suspend_idt_padding;
    208   1.96  pgoyette 
    209   1.96  pgoyette 	uint16_t	ci_suspend_tr;
    210   1.96  pgoyette 	uint16_t	ci_suspend_ldt;
    211   1.96  pgoyette 	uintptr_t	ci_suspend_fs;
    212   1.96  pgoyette 	uintptr_t	ci_suspend_gs;
    213   1.96  pgoyette 	uintptr_t	ci_suspend_kgs;
    214   1.96  pgoyette 	uintptr_t	ci_suspend_efer;
    215   1.96  pgoyette 	uintptr_t	ci_suspend_reg[12];
    216   1.96  pgoyette 	uintptr_t	ci_suspend_cr0;
    217   1.96  pgoyette 	uintptr_t	ci_suspend_cr2;
    218   1.96  pgoyette 	uintptr_t	ci_suspend_cr3;
    219   1.96  pgoyette 	uintptr_t	ci_suspend_cr4;
    220   1.96  pgoyette 	uintptr_t	ci_suspend_cr8;
    221   1.96  pgoyette 
    222   1.96  pgoyette 	/* The following must be in a single cache line. */
    223   1.96  pgoyette 	int		ci_want_resched __aligned(64);
    224   1.96  pgoyette 	int		ci_padout __aligned(64);
    225   1.96  pgoyette 
    226   1.95      maxv #ifndef __HAVE_DIRECT_MAP
    227   1.95      maxv #define VPAGE_SRC 0
    228   1.95      maxv #define VPAGE_DST 1
    229   1.95      maxv #define VPAGE_ZER 2
    230   1.95      maxv #define VPAGE_PTP 3
    231   1.95      maxv #define VPAGE_MAX 4
    232   1.95      maxv 	vaddr_t		vpage[VPAGE_MAX];
    233   1.95      maxv 	pt_entry_t	*vpage_pte[VPAGE_MAX];
    234   1.95      maxv #endif
    235   1.95      maxv 
    236   1.23       jym #ifdef PAE
    237   1.45    cherry 	uint32_t	ci_pae_l3_pdirpa; /* PA of L3 PD */
    238   1.23       jym 	pd_entry_t *	ci_pae_l3_pdir; /* VA pointer to L3 PD */
    239   1.23       jym #endif
    240   1.23       jym 
    241   1.88      maxv #ifdef SVS
    242   1.88      maxv 	pd_entry_t *	ci_svs_updir;
    243   1.88      maxv 	paddr_t		ci_svs_updirpa;
    244   1.88      maxv 	paddr_t		ci_svs_kpdirpa;
    245   1.88      maxv 	kmutex_t	ci_svs_mtx;
    246   1.89      maxv 	pd_entry_t *	ci_svs_rsp0_pte;
    247   1.89      maxv 	vaddr_t		ci_svs_rsp0;
    248   1.89      maxv 	vaddr_t		ci_svs_ursp0;
    249   1.89      maxv 	vaddr_t		ci_svs_krsp0;
    250   1.89      maxv 	vaddr_t		ci_svs_utls;
    251   1.88      maxv #endif
    252   1.88      maxv 
    253   1.96  pgoyette #if defined(XEN)
    254   1.96  pgoyette #if defined(PAE) || defined(__x86_64__)
    255   1.23       jym 	/* Currently active user PGD (can't use rcr3() with Xen) */
    256   1.41    cherry 	pd_entry_t *	ci_kpm_pdir;	/* per-cpu PMD (va) */
    257   1.46    cherry 	paddr_t		ci_kpm_pdirpa;  /* per-cpu PMD (pa) */
    258   1.48    bouyer 	kmutex_t	ci_kpm_mtx;
    259   1.96  pgoyette #endif /* defined(PAE) || defined(__x86_64__) */
    260   1.96  pgoyette 
    261   1.41    cherry #if defined(__x86_64__)
    262   1.46    cherry 	/* per-cpu version of normal_pdes */
    263   1.46    cherry 	pd_entry_t *	ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */
    264   1.23       jym 	paddr_t		ci_xen_current_user_pgd;
    265   1.96  pgoyette #endif	/* defined(__x86_64__) */
    266   1.41    cherry 
    267   1.96  pgoyette 	u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */
    268   1.36    cherry 	struct evcnt ci_ipi_events[XEN_NIPIS];
    269   1.36    cherry 	evtchn_port_t ci_ipi_evtchn;
    270   1.96  pgoyette 	size_t		ci_xpq_idx;
    271   1.93  riastrad 	/* Xen raw system time at which we last ran hardclock.  */
    272   1.93  riastrad 	uint64_t	ci_xen_hardclock_systime_ns;
    273   1.93  riastrad 
    274   1.93  riastrad 	/*
    275   1.93  riastrad 	 * Last TSC-adjusted local Xen system time we observed.  Used
    276   1.93  riastrad 	 * to detect whether the Xen clock has gone backwards.
    277   1.93  riastrad 	 */
    278   1.93  riastrad 	uint64_t	ci_xen_last_systime_ns;
    279   1.93  riastrad 
    280   1.93  riastrad 	/*
    281   1.93  riastrad 	 * Distance in nanoseconds from the local view of system time
    282   1.93  riastrad 	 * to the global view of system time, if the local time is
    283   1.93  riastrad 	 * behind the global time.
    284   1.93  riastrad 	 */
    285   1.93  riastrad 	uint64_t	ci_xen_systime_ns_skew;
    286   1.93  riastrad 
    287   1.94  riastrad 	/* Xen periodic timer interrupt handle.  */
    288   1.94  riastrad 	struct intrhand	*ci_xen_timer_intrhand;
    289   1.94  riastrad 
    290   1.99    cherry 	/*
    291   1.99    cherry 	 * Clockframe for timer interrupt handler.
    292   1.99    cherry 	 * Saved at entry via event callback.
    293   1.99    cherry 	 */
    294  1.100    cherry 	vaddr_t ci_xen_clockf_pc; /* RIP at last event interrupt */
    295  1.100    cherry 	bool ci_xen_clockf_usermode; /* Was the guest in usermode ? */
    296   1.99    cherry 
    297   1.93  riastrad 	/* Event counters for various pathologies that might happen.  */
    298   1.93  riastrad 	struct evcnt	ci_xen_cpu_tsc_backwards_evcnt;
    299   1.93  riastrad 	struct evcnt	ci_xen_tsc_delta_negative_evcnt;
    300   1.93  riastrad 	struct evcnt	ci_xen_raw_systime_wraparound_evcnt;
    301   1.93  riastrad 	struct evcnt	ci_xen_raw_systime_backwards_evcnt;
    302   1.93  riastrad 	struct evcnt	ci_xen_systime_backwards_hardclock_evcnt;
    303   1.93  riastrad 	struct evcnt	ci_xen_missed_hardclock_evcnt;
    304   1.96  pgoyette #else   /* defined(XEN) */
    305   1.96  pgoyette 	struct evcnt ci_ipi_events[X86_NIPI];
    306   1.96  pgoyette #endif	/* defined(XEN) */
    307   1.93  riastrad 
    308    1.1        ad };
    309    1.1        ad 
    310    1.1        ad /*
    311   1.15     rmind  * Macros to handle (some) trapframe registers for common x86 code.
    312   1.15     rmind  */
    313   1.15     rmind #ifdef __x86_64__
    314   1.15     rmind #define	X86_TF_RAX(tf)		tf->tf_rax
    315   1.15     rmind #define	X86_TF_RDX(tf)		tf->tf_rdx
    316   1.15     rmind #define	X86_TF_RSP(tf)		tf->tf_rsp
    317   1.15     rmind #define	X86_TF_RIP(tf)		tf->tf_rip
    318   1.15     rmind #define	X86_TF_RFLAGS(tf)	tf->tf_rflags
    319   1.15     rmind #else
    320   1.15     rmind #define	X86_TF_RAX(tf)		tf->tf_eax
    321   1.15     rmind #define	X86_TF_RDX(tf)		tf->tf_edx
    322   1.15     rmind #define	X86_TF_RSP(tf)		tf->tf_esp
    323   1.15     rmind #define	X86_TF_RIP(tf)		tf->tf_eip
    324   1.15     rmind #define	X86_TF_RFLAGS(tf)	tf->tf_eflags
    325   1.15     rmind #endif
    326   1.15     rmind 
    327   1.15     rmind /*
    328    1.1        ad  * Processor flag notes: The "primary" CPU has certain MI-defined
    329    1.1        ad  * roles (mostly relating to hardclock handling); we distinguish
    330   1.84      maxv  * between the processor which booted us, and the processor currently
    331    1.1        ad  * holding the "primary" role just to give us the flexibility later to
    332    1.1        ad  * change primaries should we be sufficiently twisted.
    333    1.1        ad  */
    334    1.1        ad 
    335    1.1        ad #define	CPUF_BSP	0x0001		/* CPU is the original BSP */
    336    1.1        ad #define	CPUF_AP		0x0002		/* CPU is an AP */
    337    1.1        ad #define	CPUF_SP		0x0004		/* CPU is only processor */
    338    1.1        ad #define	CPUF_PRIMARY	0x0008		/* CPU is active primary processor */
    339    1.1        ad 
    340    1.1        ad #define	CPUF_SYNCTSC	0x0800		/* Synchronize TSC */
    341    1.1        ad #define	CPUF_PRESENT	0x1000		/* CPU is present */
    342    1.1        ad #define	CPUF_RUNNING	0x2000		/* CPU is running */
    343    1.1        ad #define	CPUF_PAUSE	0x4000		/* CPU is paused in DDB */
    344    1.1        ad #define	CPUF_GO		0x8000		/* CPU should start running */
    345    1.1        ad 
    346   1.40     joerg #endif /* _KERNEL || __KMEMUSER */
    347   1.40     joerg 
    348   1.40     joerg #ifdef _KERNEL
    349    1.1        ad /*
    350    1.1        ad  * We statically allocate the CPU info for the primary CPU (or,
    351    1.1        ad  * the only CPU on uniprocessors), and the primary CPU is the
    352    1.1        ad  * first CPU on the CPU info list.
    353    1.1        ad  */
    354    1.1        ad extern struct cpu_info cpu_info_primary;
    355    1.1        ad extern struct cpu_info *cpu_info_list;
    356    1.1        ad 
    357   1.57  christos #define	CPU_INFO_ITERATOR		int __unused
    358   1.57  christos #define	CPU_INFO_FOREACH(cii, ci)	ci = cpu_info_list; \
    359    1.1        ad 					ci != NULL; ci = ci->ci_next
    360    1.1        ad 
    361    1.1        ad #define CPU_STARTUP(_ci, _target)	((_ci)->ci_func->start(_ci, _target))
    362    1.1        ad #define CPU_STOP(_ci)	        	((_ci)->ci_func->stop(_ci))
    363    1.1        ad #define CPU_START_CLEANUP(_ci)		((_ci)->ci_func->cleanup(_ci))
    364    1.1        ad 
    365   1.10     pooka #if !defined(__GNUC__) || defined(_MODULE)
    366    1.1        ad /* For non-GCC and modules */
    367    1.1        ad struct cpu_info	*x86_curcpu(void);
    368    1.1        ad void	cpu_set_curpri(int);
    369    1.5        ad # ifdef __GNUC__
    370    1.5        ad lwp_t	*x86_curlwp(void) __attribute__ ((const));
    371    1.5        ad # else
    372    1.5        ad lwp_t   *x86_curlwp(void);
    373    1.5        ad # endif
    374    1.1        ad #endif
    375    1.1        ad 
    376    1.4        ad #define cpu_number() 		(cpu_index(curcpu()))
    377    1.1        ad 
    378    1.1        ad #define CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
    379    1.1        ad 
    380    1.1        ad #define	X86_AST_GENERIC		0x01
    381    1.1        ad #define	X86_AST_PREEMPT		0x02
    382    1.1        ad 
    383    1.1        ad #define aston(l, why)		((l)->l_md.md_astpending |= (why))
    384    1.1        ad #define	cpu_did_resched(l)	((l)->l_md.md_astpending &= ~X86_AST_PREEMPT)
    385    1.1        ad 
    386    1.1        ad void cpu_boot_secondary_processors(void);
    387    1.1        ad void cpu_init_idle_lwps(void);
    388    1.1        ad void cpu_init_msrs(struct cpu_info *, bool);
    389   1.48    bouyer void cpu_load_pmap(struct pmap *, struct pmap *);
    390   1.37    cherry void cpu_broadcast_halt(void);
    391   1.37    cherry void cpu_kick(struct cpu_info *);
    392    1.1        ad 
    393   1.87      maxv void cpu_pcpuarea_init(struct cpu_info *);
    394   1.88      maxv void cpu_svs_init(struct cpu_info *);
    395   1.91      maxv void cpu_speculation_init(struct cpu_info *);
    396   1.87      maxv 
    397    1.1        ad #define	curcpu()		x86_curcpu()
    398    1.1        ad #define	curlwp			x86_curlwp()
    399   1.18     rmind #define	curpcb			((struct pcb *)lwp_getpcb(curlwp))
    400    1.1        ad 
    401    1.1        ad /*
    402    1.1        ad  * Give a profiling tick to the current process when the user profiling
    403    1.1        ad  * buffer pages are invalid.  On the i386, request an ast to send us
    404    1.1        ad  * through trap(), marking the proc as needing a profiling tick.
    405    1.1        ad  */
    406    1.1        ad extern void	cpu_need_proftick(struct lwp *l);
    407    1.1        ad 
    408    1.1        ad /*
    409    1.1        ad  * Notify the LWP l that it has a signal pending, process as soon as
    410    1.1        ad  * possible.
    411    1.1        ad  */
    412    1.1        ad extern void	cpu_signotify(struct lwp *);
    413    1.1        ad 
    414    1.1        ad /*
    415    1.1        ad  * We need a machine-independent name for this.
    416    1.1        ad  */
    417    1.1        ad extern void (*delay_func)(unsigned int);
    418    1.1        ad struct timeval;
    419    1.1        ad 
    420   1.72       chs #ifndef __HIDE_DELAY
    421    1.1        ad #define	DELAY(x)		(*delay_func)(x)
    422    1.1        ad #define delay(x)		(*delay_func)(x)
    423   1.72       chs #endif
    424    1.1        ad 
    425    1.1        ad extern int biosbasemem;
    426    1.1        ad extern int biosextmem;
    427   1.51       chs extern int cputype;
    428    1.1        ad extern int cpuid_level;
    429    1.1        ad extern int cpu_class;
    430    1.1        ad extern char cpu_brand_string[];
    431   1.42       jym extern int use_pae;
    432    1.1        ad 
    433   1.61       dsl #ifdef __i386__
    434   1.81     kamil #define	i386_fpu_present	1
    435   1.61       dsl int npx586bug1(int, int);
    436   1.61       dsl extern int i386_fpu_fdivbug;
    437    1.1        ad extern int i386_use_fxsave;
    438    1.1        ad extern int i386_has_sse;
    439    1.1        ad extern int i386_has_sse2;
    440   1.61       dsl #else
    441   1.81     kamil #define	i386_fpu_present	1
    442   1.61       dsl #define	i386_fpu_fdivbug	0
    443   1.61       dsl #define	i386_use_fxsave		1
    444   1.61       dsl #define	i386_has_sse		1
    445   1.61       dsl #define	i386_has_sse2		1
    446   1.61       dsl #endif
    447    1.1        ad 
    448   1.65       dsl extern int x86_fpu_save;
    449   1.65       dsl #define	FPU_SAVE_FSAVE		0
    450   1.65       dsl #define	FPU_SAVE_FXSAVE		1
    451   1.65       dsl #define	FPU_SAVE_XSAVE		2
    452   1.65       dsl #define	FPU_SAVE_XSAVEOPT	3
    453   1.66       dsl extern unsigned int x86_fpu_save_size;
    454   1.65       dsl extern uint64_t x86_xsave_features;
    455   1.98      maxv extern uint32_t x86_fpu_mxcsr_mask;
    456   1.92      maxv extern bool x86_fpu_eager;
    457   1.65       dsl 
    458    1.1        ad extern void (*x86_cpu_idle)(void);
    459    1.1        ad #define	cpu_idle() (*x86_cpu_idle)()
    460    1.1        ad 
    461    1.1        ad /* machdep.c */
    462   1.78      maxv #ifdef i386
    463   1.78      maxv void	cpu_set_tss_gates(struct cpu_info *);
    464   1.78      maxv #endif
    465    1.1        ad void	cpu_reset(void);
    466    1.1        ad 
    467    1.1        ad /* longrun.c */
    468    1.1        ad u_int 	tmx86_get_longrun_mode(void);
    469    1.1        ad void 	tmx86_get_longrun_status(u_int *, u_int *, u_int *);
    470    1.1        ad void 	tmx86_init_longrun(void);
    471    1.1        ad 
    472    1.1        ad /* identcpu.c */
    473    1.1        ad void 	cpu_probe(struct cpu_info *);
    474    1.1        ad void	cpu_identify(struct cpu_info *);
    475   1.71    nonaka void	identify_hypervisor(void);
    476   1.71    nonaka 
    477   1.71    nonaka typedef enum vm_guest {
    478   1.71    nonaka 	VM_GUEST_NO = 0,
    479   1.71    nonaka 	VM_GUEST_VM,
    480   1.71    nonaka 	VM_GUEST_XEN,
    481   1.71    nonaka 	VM_GUEST_HV,
    482   1.71    nonaka 	VM_GUEST_VMWARE,
    483   1.71    nonaka 	VM_GUEST_KVM,
    484   1.71    nonaka 	VM_LAST
    485   1.71    nonaka } vm_guest_t;
    486   1.71    nonaka extern vm_guest_t vm_guest;
    487    1.1        ad 
    488   1.17     rmind /* cpu_topology.c */
    489   1.20     rmind void	x86_cpu_topology(struct cpu_info *);
    490   1.17     rmind 
    491    1.1        ad /* locore.s */
    492    1.1        ad struct region_descriptor;
    493    1.1        ad void	lgdt(struct region_descriptor *);
    494    1.1        ad #ifdef XEN
    495    1.1        ad void	lgdt_finish(void);
    496    1.1        ad #endif
    497    1.1        ad 
    498    1.1        ad struct pcb;
    499    1.1        ad void	savectx(struct pcb *);
    500    1.1        ad void	lwp_trampoline(void);
    501    1.1        ad #ifdef XEN
    502    1.1        ad void	startrtclock(void);
    503    1.1        ad void	xen_delay(unsigned int);
    504    1.1        ad void	xen_initclocks(void);
    505   1.47       jym void	xen_suspendclocks(struct cpu_info *);
    506   1.47       jym void	xen_resumeclocks(struct cpu_info *);
    507    1.1        ad #else
    508    1.1        ad /* clock.c */
    509    1.1        ad void	initrtclock(u_long);
    510    1.1        ad void	startrtclock(void);
    511    1.1        ad void	i8254_delay(unsigned int);
    512    1.1        ad void	i8254_microtime(struct timeval *);
    513    1.1        ad void	i8254_initclocks(void);
    514    1.1        ad #endif
    515    1.1        ad 
    516    1.1        ad /* cpu.c */
    517    1.1        ad void	cpu_probe_features(struct cpu_info *);
    518    1.1        ad 
    519    1.1        ad /* vm_machdep.c */
    520   1.78      maxv void	cpu_proc_fork(struct proc *, struct proc *);
    521   1.13     rmind paddr_t	kvtop(void *);
    522    1.1        ad 
    523    1.1        ad #ifdef USER_LDT
    524    1.1        ad /* sys_machdep.h */
    525    1.1        ad int	x86_get_ldt(struct lwp *, void *, register_t *);
    526    1.1        ad int	x86_set_ldt(struct lwp *, void *, register_t *);
    527    1.1        ad #endif
    528    1.1        ad 
    529    1.1        ad /* isa_machdep.c */
    530    1.1        ad void	isa_defaultirq(void);
    531    1.1        ad int	isa_nmi(void);
    532    1.1        ad 
    533    1.1        ad /* consinit.c */
    534    1.1        ad void kgdb_port_init(void);
    535    1.1        ad 
    536    1.1        ad /* bus_machdep.c */
    537    1.1        ad void x86_bus_space_init(void);
    538    1.1        ad void x86_bus_space_mallocok(void);
    539    1.1        ad 
    540   1.40     joerg #endif /* _KERNEL */
    541   1.40     joerg 
    542   1.40     joerg #if defined(_KERNEL) || defined(_KMEMUSER)
    543    1.1        ad #include <machine/psl.h>	/* Must be after struct cpu_info declaration */
    544   1.11        ad #endif /* _KERNEL || __KMEMUSER */
    545    1.1        ad 
    546    1.1        ad /*
    547    1.1        ad  * CTL_MACHDEP definitions.
    548    1.1        ad  */
    549    1.1        ad #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    550    1.1        ad #define	CPU_BIOSBASEMEM		2	/* int: bios-reported base mem (K) */
    551    1.1        ad #define	CPU_BIOSEXTMEM		3	/* int: bios-reported ext. mem (K) */
    552    1.1        ad /* 	CPU_NKPDE		4	obsolete: int: number of kernel PDEs */
    553    1.1        ad #define	CPU_BOOTED_KERNEL	5	/* string: booted kernel name */
    554    1.1        ad #define CPU_DISKINFO		6	/* struct disklist *:
    555    1.1        ad 					 * disk geometry information */
    556    1.1        ad #define CPU_FPU_PRESENT		7	/* int: FPU is present */
    557    1.1        ad #define	CPU_OSFXSR		8	/* int: OS uses FXSAVE/FXRSTOR */
    558    1.1        ad #define	CPU_SSE			9	/* int: OS/CPU supports SSE */
    559    1.1        ad #define	CPU_SSE2		10	/* int: OS/CPU supports SSE2 */
    560    1.1        ad #define	CPU_TMLR_MODE		11	/* int: longrun mode
    561    1.1        ad 					 * 0: minimum frequency
    562    1.1        ad 					 * 1: economy
    563    1.1        ad 					 * 2: performance
    564    1.1        ad 					 * 3: maximum frequency
    565    1.1        ad 					 */
    566    1.1        ad #define	CPU_TMLR_FREQUENCY	12	/* int: current frequency */
    567   1.84      maxv #define	CPU_TMLR_VOLTAGE	13	/* int: current voltage */
    568    1.1        ad #define	CPU_TMLR_PERCENTAGE	14	/* int: current clock percentage */
    569   1.69     kamil #define	CPU_FPU_SAVE		15	/* int: FPU Instructions layout
    570   1.69     kamil 					 * to use this, CPU_OSFXSR must be true
    571   1.69     kamil 					 * 0: FSAVE
    572   1.69     kamil 					 * 1: FXSAVE
    573   1.69     kamil 					 * 2: XSAVE
    574   1.69     kamil 					 * 3: XSAVEOPT
    575   1.69     kamil 					 */
    576   1.69     kamil #define	CPU_FPU_SAVE_SIZE	16	/* int: FPU Instruction layout size */
    577   1.69     kamil #define	CPU_XSAVE_FEATURES	17	/* quad: XSAVE features */
    578   1.69     kamil 
    579    1.1        ad /*
    580    1.1        ad  * Structure for CPU_DISKINFO sysctl call.
    581    1.1        ad  * XXX this should be somewhere else.
    582    1.1        ad  */
    583    1.1        ad #define MAX_BIOSDISKS	16
    584    1.1        ad 
    585    1.1        ad struct disklist {
    586    1.1        ad 	int dl_nbiosdisks;			   /* number of bios disks */
    587   1.83  christos 	int dl_unused;
    588    1.1        ad 	struct biosdisk_info {
    589    1.1        ad 		int bi_dev;			   /* BIOS device # (0x80 ..) */
    590    1.1        ad 		int bi_cyl;			   /* cylinders on disk */
    591    1.1        ad 		int bi_head;			   /* heads per track */
    592    1.1        ad 		int bi_sec;			   /* sectors per track */
    593    1.1        ad 		uint64_t bi_lbasecs;		   /* total sec. (iff ext13) */
    594    1.1        ad #define BIFLAG_INVALID		0x01
    595    1.1        ad #define BIFLAG_EXTINT13		0x02
    596    1.1        ad 		int bi_flags;
    597   1.83  christos 		int bi_unused;
    598    1.1        ad 	} dl_biosdisks[MAX_BIOSDISKS];
    599    1.1        ad 
    600    1.1        ad 	int dl_nnativedisks;			   /* number of native disks */
    601    1.1        ad 	struct nativedisk_info {
    602    1.1        ad 		char ni_devname[16];		   /* native device name */
    603    1.1        ad 		int ni_nmatches; 		   /* # of matches w/ BIOS */
    604    1.1        ad 		int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
    605    1.1        ad 	} dl_nativedisks[1];			   /* actually longer */
    606    1.1        ad };
    607    1.1        ad #endif /* !_X86_CPU_H_ */
    608