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cpu.h revision 1.125
      1  1.125    bouyer /*	$NetBSD: cpu.h,v 1.125 2020/05/02 16:44:35 bouyer Exp $	*/
      2    1.1        ad 
      3   1.84      maxv /*
      4    1.1        ad  * Copyright (c) 1990 The Regents of the University of California.
      5    1.1        ad  * All rights reserved.
      6    1.1        ad  *
      7    1.1        ad  * This code is derived from software contributed to Berkeley by
      8    1.1        ad  * William Jolitz.
      9    1.1        ad  *
     10    1.1        ad  * Redistribution and use in source and binary forms, with or without
     11    1.1        ad  * modification, are permitted provided that the following conditions
     12    1.1        ad  * are met:
     13    1.1        ad  * 1. Redistributions of source code must retain the above copyright
     14    1.1        ad  *    notice, this list of conditions and the following disclaimer.
     15    1.1        ad  * 2. Redistributions in binary form must reproduce the above copyright
     16    1.1        ad  *    notice, this list of conditions and the following disclaimer in the
     17    1.1        ad  *    documentation and/or other materials provided with the distribution.
     18    1.1        ad  * 3. Neither the name of the University nor the names of its contributors
     19    1.1        ad  *    may be used to endorse or promote products derived from this software
     20    1.1        ad  *    without specific prior written permission.
     21    1.1        ad  *
     22    1.1        ad  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     23    1.1        ad  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24    1.1        ad  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25    1.1        ad  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     26    1.1        ad  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27    1.1        ad  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28    1.1        ad  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29    1.1        ad  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30    1.1        ad  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31    1.1        ad  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32    1.1        ad  * SUCH DAMAGE.
     33    1.1        ad  *
     34    1.1        ad  *	@(#)cpu.h	5.4 (Berkeley) 5/9/91
     35    1.1        ad  */
     36    1.1        ad 
     37    1.1        ad #ifndef _X86_CPU_H_
     38    1.1        ad #define _X86_CPU_H_
     39    1.1        ad 
     40   1.32       mrg #if defined(_KERNEL) || defined(_STANDALONE)
     41   1.32       mrg #include <sys/types.h>
     42   1.32       mrg #else
     43   1.63       dsl #include <stdint.h>
     44   1.32       mrg #include <stdbool.h>
     45   1.32       mrg #endif /* _KERNEL || _STANDALONE */
     46   1.32       mrg 
     47   1.11        ad #if defined(_KERNEL) || defined(_KMEMUSER)
     48    1.1        ad #if defined(_KERNEL_OPT)
     49    1.1        ad #include "opt_xen.h"
     50   1.88      maxv #include "opt_svs.h"
     51    1.1        ad #ifdef i386
     52    1.1        ad #include "opt_user_ldt.h"
     53    1.1        ad #endif
     54    1.1        ad #endif
     55    1.1        ad 
     56    1.1        ad /*
     57    1.1        ad  * Definitions unique to x86 cpu support.
     58    1.1        ad  */
     59    1.1        ad #include <machine/frame.h>
     60   1.23       jym #include <machine/pte.h>
     61    1.1        ad #include <machine/segments.h>
     62    1.1        ad #include <machine/tss.h>
     63    1.1        ad #include <machine/intrdefs.h>
     64    1.1        ad 
     65    1.1        ad #include <x86/cacheinfo.h>
     66    1.1        ad 
     67    1.1        ad #include <sys/cpu_data.h>
     68    1.9       mrg #include <sys/evcnt.h>
     69   1.19    cegger #include <sys/device_if.h> /* for device_t */
     70    1.1        ad 
     71   1.36    cherry #ifdef XEN
     72  1.102    cherry #include <xen/include/public/xen.h>
     73  1.102    cherry #include <xen/include/public/event_channel.h>
     74   1.48    bouyer #include <sys/mutex.h>
     75   1.36    cherry #endif /* XEN */
     76   1.36    cherry 
     77    1.1        ad struct intrsource;
     78    1.1        ad struct pmap;
     79  1.112        ad struct kcpuset;
     80    1.1        ad 
     81    1.1        ad #ifdef __x86_64__
     82    1.1        ad #define	i386tss	x86_64_tss
     83    1.1        ad #endif
     84    1.1        ad 
     85    1.1        ad #define	NIOPORTS	1024		/* # of ports we allow to be mapped */
     86    1.1        ad #define	IOMAPSIZE	(NIOPORTS / 8)	/* I/O bitmap size in bytes */
     87    1.1        ad 
     88   1.85      maxv struct cpu_tss {
     89   1.85      maxv #ifdef i386
     90   1.85      maxv 	struct i386tss dblflt_tss;
     91   1.85      maxv 	struct i386tss ddbipi_tss;
     92   1.85      maxv #endif
     93   1.85      maxv 	struct i386tss tss;
     94   1.85      maxv 	uint8_t iomap[IOMAPSIZE];
     95   1.85      maxv } __packed;
     96   1.85      maxv 
     97    1.1        ad /*
     98   1.99    cherry  * Arguments to hardclock, softclock and statclock
     99   1.99    cherry  * encapsulate the previous machine state in an opaque
    100   1.99    cherry  * clockframe; for now, use generic intrframe.
    101   1.99    cherry  */
    102   1.99    cherry struct clockframe {
    103   1.99    cherry 	struct intrframe cf_if;
    104   1.99    cherry };
    105   1.99    cherry 
    106   1.99    cherry /*
    107    1.1        ad  * a bunch of this belongs in cpuvar.h; move it later..
    108    1.1        ad  */
    109    1.1        ad 
    110    1.1        ad struct cpu_info {
    111   1.26  christos 	struct cpu_data ci_data;	/* MI per-cpu data */
    112   1.19    cegger 	device_t ci_dev;		/* pointer to our device */
    113    1.1        ad 	struct cpu_info *ci_self;	/* self-pointer */
    114    1.1        ad 
    115    1.1        ad 	/*
    116    1.1        ad 	 * Private members.
    117    1.1        ad 	 */
    118    1.1        ad 	struct pmap *ci_pmap;		/* current pmap */
    119    1.1        ad 	int ci_want_pmapload;		/* pmap_load() is needed */
    120    1.1        ad 	volatile int ci_tlbstate;	/* one of TLBSTATE_ states. see below */
    121    1.1        ad #define	TLBSTATE_VALID	0	/* all user tlbs are valid */
    122    1.1        ad #define	TLBSTATE_LAZY	1	/* tlbs are valid but won't be kept uptodate */
    123    1.1        ad #define	TLBSTATE_STALE	2	/* we might have stale user tlbs */
    124    1.3        ad 	int ci_curldt;		/* current LDT descriptor */
    125   1.16        ad 	int ci_nintrhand;	/* number of H/W interrupt handlers */
    126    1.1        ad 	uint64_t ci_scratch;
    127  1.117        ad 	uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)];
    128  1.112        ad 	struct kcpuset *ci_tlb_cpuset;
    129    1.1        ad 
    130  1.114      maxv 	int ci_kfpu_spl;
    131  1.114      maxv 
    132    1.1        ad 	struct intrsource *ci_isources[MAX_INTR_SOURCES];
    133  1.101    cherry 
    134    1.1        ad 	volatile int	ci_mtx_count;	/* Negative count of spin mutexes */
    135    1.1        ad 	volatile int	ci_mtx_oldspl;	/* Old SPL at this ci_idepth */
    136    1.1        ad 
    137    1.1        ad 	/* The following must be aligned for cmpxchg8b. */
    138    1.1        ad 	struct {
    139    1.1        ad 		uint32_t	ipending;
    140    1.1        ad 		int		ilevel;
    141  1.116   thorpej 		uint32_t	imasked;
    142    1.1        ad 	} ci_istate __aligned(8);
    143    1.1        ad #define ci_ipending	ci_istate.ipending
    144    1.1        ad #define	ci_ilevel	ci_istate.ilevel
    145  1.116   thorpej #define	ci_imasked	ci_istate.imasked
    146    1.1        ad 	int		ci_idepth;
    147    1.1        ad 	void *		ci_intrstack;
    148    1.1        ad 	uint32_t	ci_imask[NIPL];
    149    1.1        ad 	uint32_t	ci_iunmask[NIPL];
    150    1.1        ad 
    151  1.115        ad 	uint32_t	ci_signature;	/* X86 cpuid type (cpuid.1.%eax) */
    152  1.115        ad 	uint32_t	ci_vendor[4];	/* vendor string */
    153   1.64       dsl 	uint32_t	ci_max_cpuid;	/* cpuid.0:%eax */
    154   1.64       dsl 	uint32_t	ci_max_ext_cpuid; /* cpuid.80000000:%eax */
    155    1.1        ad 	volatile uint32_t	ci_lapic_counter;
    156    1.1        ad 
    157   1.90      maxv 	uint32_t	ci_feat_val[8]; /* X86 CPUID feature bits */
    158   1.64       dsl 			/* [0] basic features cpuid.1:%edx
    159   1.64       dsl 			 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits)
    160   1.64       dsl 			 * [2] extended features cpuid:80000001:%edx
    161   1.64       dsl 			 * [3] extended features cpuid:80000001:%ecx
    162   1.64       dsl 			 * [4] VIA padlock features
    163   1.67      maxv 			 * [5] structured extended features cpuid.7:%ebx
    164   1.67      maxv 			 * [6] structured extended features cpuid.7:%ecx
    165   1.90      maxv 			 * [7] structured extended features cpuid.7:%edx
    166   1.64       dsl 			 */
    167   1.21       jym 
    168    1.1        ad 	const struct cpu_functions *ci_func;  /* start/stop functions */
    169    1.1        ad 	struct trapframe *ci_ddb_regs;
    170    1.1        ad 
    171   1.70   msaitoh 	u_int ci_cflush_lsize;	/* CLFLUSH insn line size */
    172    1.1        ad 	struct x86_cache_info ci_cinfo[CAI_COUNT];
    173    1.1        ad 
    174   1.96  pgoyette 	device_t	ci_frequency;	/* Frequency scaling technology */
    175   1.96  pgoyette 	device_t	ci_padlock;	/* VIA PadLock private storage */
    176   1.96  pgoyette 	device_t	ci_temperature;	/* Intel coretemp(4) or equivalent */
    177   1.96  pgoyette 	device_t	ci_vm;		/* Virtual machine guest driver */
    178   1.96  pgoyette 
    179   1.96  pgoyette 	/*
    180   1.96  pgoyette 	 * Segmentation-related data.
    181   1.96  pgoyette 	 */
    182   1.96  pgoyette 	union descriptor *ci_gdt;
    183   1.96  pgoyette 	struct cpu_tss	*ci_tss;	/* Per-cpu TSSes; shared among LWPs */
    184   1.96  pgoyette 	int ci_tss_sel;			/* TSS selector of this cpu */
    185   1.96  pgoyette 
    186   1.96  pgoyette 	/*
    187   1.96  pgoyette 	 * The following two are actually region_descriptors,
    188   1.96  pgoyette 	 * but that would pollute the namespace.
    189   1.96  pgoyette 	 */
    190   1.96  pgoyette 	uintptr_t	ci_suspend_gdt;
    191   1.96  pgoyette 	uint16_t	ci_suspend_gdt_padding;
    192   1.96  pgoyette 	uintptr_t	ci_suspend_idt;
    193   1.96  pgoyette 	uint16_t	ci_suspend_idt_padding;
    194   1.96  pgoyette 
    195   1.96  pgoyette 	uint16_t	ci_suspend_tr;
    196   1.96  pgoyette 	uint16_t	ci_suspend_ldt;
    197   1.96  pgoyette 	uintptr_t	ci_suspend_fs;
    198   1.96  pgoyette 	uintptr_t	ci_suspend_gs;
    199   1.96  pgoyette 	uintptr_t	ci_suspend_kgs;
    200   1.96  pgoyette 	uintptr_t	ci_suspend_efer;
    201   1.96  pgoyette 	uintptr_t	ci_suspend_reg[12];
    202   1.96  pgoyette 	uintptr_t	ci_suspend_cr0;
    203   1.96  pgoyette 	uintptr_t	ci_suspend_cr2;
    204   1.96  pgoyette 	uintptr_t	ci_suspend_cr3;
    205   1.96  pgoyette 	uintptr_t	ci_suspend_cr4;
    206   1.96  pgoyette 	uintptr_t	ci_suspend_cr8;
    207   1.96  pgoyette 
    208  1.115        ad 	/*
    209  1.115        ad 	 * The following must be in their own cache line, as they are
    210  1.115        ad 	 * stored to regularly by remote CPUs; when they were mixed with
    211  1.115        ad 	 * other fields we observed frequent cache misses.
    212  1.115        ad 	 */
    213   1.96  pgoyette 	int		ci_want_resched __aligned(64);
    214  1.115        ad 	uint32_t	ci_ipis; /* interprocessor interrupts pending */
    215  1.115        ad 
    216  1.115        ad 	/*
    217  1.115        ad 	 * These are largely static, and will be frequently fetched by other
    218  1.115        ad 	 * CPUs.  For that reason they get their own cache line, too.
    219  1.115        ad 	 */
    220  1.115        ad 	uint32_t 	ci_flags __aligned(64);/* general flags */
    221  1.115        ad 	uint32_t 	ci_acpiid;	/* our ACPI/MADT ID */
    222  1.115        ad 	uint32_t 	ci_initapicid;	/* our initial APIC ID */
    223  1.122    bouyer 	uint32_t 	ci_vcpuid;	/* our CPU id for hypervisor */
    224  1.115        ad 	cpuid_t		ci_cpuid;	/* our CPU ID */
    225  1.115        ad 	struct cpu_info	*ci_next;	/* next cpu */
    226  1.115        ad 
    227  1.115        ad 	/*
    228  1.115        ad 	 * This is stored frequently, and is fetched by remote CPUs.
    229  1.115        ad 	 */
    230  1.115        ad 	struct lwp	*ci_curlwp __aligned(64);/* general flags */
    231  1.115        ad 	struct lwp	*ci_onproc;	/* current user LWP / kthread */
    232  1.115        ad 
    233  1.115        ad 	/* Here ends the cachline-aligned sections. */
    234   1.96  pgoyette 	int		ci_padout __aligned(64);
    235   1.96  pgoyette 
    236   1.95      maxv #ifndef __HAVE_DIRECT_MAP
    237   1.95      maxv #define VPAGE_SRC 0
    238   1.95      maxv #define VPAGE_DST 1
    239   1.95      maxv #define VPAGE_ZER 2
    240   1.95      maxv #define VPAGE_PTP 3
    241   1.95      maxv #define VPAGE_MAX 4
    242   1.95      maxv 	vaddr_t		vpage[VPAGE_MAX];
    243   1.95      maxv 	pt_entry_t	*vpage_pte[VPAGE_MAX];
    244   1.95      maxv #endif
    245   1.95      maxv 
    246   1.23       jym #ifdef PAE
    247   1.45    cherry 	uint32_t	ci_pae_l3_pdirpa; /* PA of L3 PD */
    248   1.23       jym 	pd_entry_t *	ci_pae_l3_pdir; /* VA pointer to L3 PD */
    249   1.23       jym #endif
    250   1.23       jym 
    251   1.88      maxv #ifdef SVS
    252   1.88      maxv 	pd_entry_t *	ci_svs_updir;
    253   1.88      maxv 	paddr_t		ci_svs_updirpa;
    254  1.108      maxv 	int		ci_svs_ldt_sel;
    255   1.88      maxv 	kmutex_t	ci_svs_mtx;
    256   1.89      maxv 	pd_entry_t *	ci_svs_rsp0_pte;
    257   1.89      maxv 	vaddr_t		ci_svs_rsp0;
    258   1.89      maxv 	vaddr_t		ci_svs_ursp0;
    259   1.89      maxv 	vaddr_t		ci_svs_krsp0;
    260   1.89      maxv 	vaddr_t		ci_svs_utls;
    261   1.88      maxv #endif
    262   1.88      maxv 
    263  1.122    bouyer #ifndef XENPV
    264  1.122    bouyer 	struct evcnt ci_ipi_events[X86_NIPI];
    265  1.122    bouyer #else
    266  1.122    bouyer 	struct evcnt ci_ipi_events[XEN_NIPIS];
    267  1.122    bouyer #endif
    268  1.103    cherry #ifdef XEN
    269  1.123    bouyer 	volatile struct vcpu_info *ci_vcpu; /* for XEN */
    270  1.103    cherry 	u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */
    271  1.103    cherry 	evtchn_port_t ci_ipi_evtchn;
    272  1.103    cherry #if defined(XENPV)
    273   1.96  pgoyette #if defined(PAE) || defined(__x86_64__)
    274   1.23       jym 	/* Currently active user PGD (can't use rcr3() with Xen) */
    275   1.41    cherry 	pd_entry_t *	ci_kpm_pdir;	/* per-cpu PMD (va) */
    276   1.46    cherry 	paddr_t		ci_kpm_pdirpa;  /* per-cpu PMD (pa) */
    277   1.48    bouyer 	kmutex_t	ci_kpm_mtx;
    278   1.96  pgoyette #endif /* defined(PAE) || defined(__x86_64__) */
    279   1.96  pgoyette 
    280   1.41    cherry #if defined(__x86_64__)
    281   1.46    cherry 	/* per-cpu version of normal_pdes */
    282  1.103    cherry 	pd_entry_t *	ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XENPV */
    283   1.23       jym 	paddr_t		ci_xen_current_user_pgd;
    284   1.96  pgoyette #endif	/* defined(__x86_64__) */
    285   1.41    cherry 
    286   1.96  pgoyette 	size_t		ci_xpq_idx;
    287  1.104    cherry #endif /* XENPV */
    288  1.104    cherry 
    289   1.93  riastrad 	/* Xen raw system time at which we last ran hardclock.  */
    290   1.93  riastrad 	uint64_t	ci_xen_hardclock_systime_ns;
    291   1.93  riastrad 
    292   1.93  riastrad 	/*
    293   1.93  riastrad 	 * Last TSC-adjusted local Xen system time we observed.  Used
    294   1.93  riastrad 	 * to detect whether the Xen clock has gone backwards.
    295   1.93  riastrad 	 */
    296   1.93  riastrad 	uint64_t	ci_xen_last_systime_ns;
    297   1.93  riastrad 
    298   1.93  riastrad 	/*
    299   1.93  riastrad 	 * Distance in nanoseconds from the local view of system time
    300   1.93  riastrad 	 * to the global view of system time, if the local time is
    301   1.93  riastrad 	 * behind the global time.
    302   1.93  riastrad 	 */
    303   1.93  riastrad 	uint64_t	ci_xen_systime_ns_skew;
    304   1.93  riastrad 
    305   1.99    cherry 	/*
    306   1.99    cherry 	 * Clockframe for timer interrupt handler.
    307   1.99    cherry 	 * Saved at entry via event callback.
    308   1.99    cherry 	 */
    309  1.100    cherry 	vaddr_t ci_xen_clockf_pc; /* RIP at last event interrupt */
    310  1.100    cherry 	bool ci_xen_clockf_usermode; /* Was the guest in usermode ? */
    311   1.99    cherry 
    312   1.93  riastrad 	/* Event counters for various pathologies that might happen.  */
    313   1.93  riastrad 	struct evcnt	ci_xen_cpu_tsc_backwards_evcnt;
    314   1.93  riastrad 	struct evcnt	ci_xen_tsc_delta_negative_evcnt;
    315   1.93  riastrad 	struct evcnt	ci_xen_raw_systime_wraparound_evcnt;
    316   1.93  riastrad 	struct evcnt	ci_xen_raw_systime_backwards_evcnt;
    317   1.93  riastrad 	struct evcnt	ci_xen_systime_backwards_hardclock_evcnt;
    318   1.93  riastrad 	struct evcnt	ci_xen_missed_hardclock_evcnt;
    319  1.103    cherry #endif	/* XEN */
    320    1.1        ad };
    321  1.124    bouyer 
    322  1.124    bouyer #if defined(XEN) && !defined(XENPV)
    323  1.122    bouyer 	__CTASSERT(XEN_NIPIS <= X86_NIPI);
    324  1.122    bouyer #endif
    325    1.1        ad 
    326    1.1        ad /*
    327   1.15     rmind  * Macros to handle (some) trapframe registers for common x86 code.
    328   1.15     rmind  */
    329   1.15     rmind #ifdef __x86_64__
    330   1.15     rmind #define	X86_TF_RAX(tf)		tf->tf_rax
    331   1.15     rmind #define	X86_TF_RDX(tf)		tf->tf_rdx
    332   1.15     rmind #define	X86_TF_RSP(tf)		tf->tf_rsp
    333   1.15     rmind #define	X86_TF_RIP(tf)		tf->tf_rip
    334   1.15     rmind #define	X86_TF_RFLAGS(tf)	tf->tf_rflags
    335   1.15     rmind #else
    336   1.15     rmind #define	X86_TF_RAX(tf)		tf->tf_eax
    337   1.15     rmind #define	X86_TF_RDX(tf)		tf->tf_edx
    338   1.15     rmind #define	X86_TF_RSP(tf)		tf->tf_esp
    339   1.15     rmind #define	X86_TF_RIP(tf)		tf->tf_eip
    340   1.15     rmind #define	X86_TF_RFLAGS(tf)	tf->tf_eflags
    341   1.15     rmind #endif
    342   1.15     rmind 
    343   1.15     rmind /*
    344    1.1        ad  * Processor flag notes: The "primary" CPU has certain MI-defined
    345    1.1        ad  * roles (mostly relating to hardclock handling); we distinguish
    346   1.84      maxv  * between the processor which booted us, and the processor currently
    347    1.1        ad  * holding the "primary" role just to give us the flexibility later to
    348    1.1        ad  * change primaries should we be sufficiently twisted.
    349    1.1        ad  */
    350    1.1        ad 
    351    1.1        ad #define	CPUF_BSP	0x0001		/* CPU is the original BSP */
    352    1.1        ad #define	CPUF_AP		0x0002		/* CPU is an AP */
    353    1.1        ad #define	CPUF_SP		0x0004		/* CPU is only processor */
    354    1.1        ad #define	CPUF_PRIMARY	0x0008		/* CPU is active primary processor */
    355    1.1        ad 
    356    1.1        ad #define	CPUF_SYNCTSC	0x0800		/* Synchronize TSC */
    357    1.1        ad #define	CPUF_PRESENT	0x1000		/* CPU is present */
    358    1.1        ad #define	CPUF_RUNNING	0x2000		/* CPU is running */
    359    1.1        ad #define	CPUF_PAUSE	0x4000		/* CPU is paused in DDB */
    360    1.1        ad #define	CPUF_GO		0x8000		/* CPU should start running */
    361    1.1        ad 
    362   1.40     joerg #endif /* _KERNEL || __KMEMUSER */
    363   1.40     joerg 
    364   1.40     joerg #ifdef _KERNEL
    365    1.1        ad /*
    366    1.1        ad  * We statically allocate the CPU info for the primary CPU (or,
    367    1.1        ad  * the only CPU on uniprocessors), and the primary CPU is the
    368    1.1        ad  * first CPU on the CPU info list.
    369    1.1        ad  */
    370    1.1        ad extern struct cpu_info cpu_info_primary;
    371    1.1        ad extern struct cpu_info *cpu_info_list;
    372    1.1        ad 
    373   1.57  christos #define	CPU_INFO_ITERATOR		int __unused
    374   1.57  christos #define	CPU_INFO_FOREACH(cii, ci)	ci = cpu_info_list; \
    375    1.1        ad 					ci != NULL; ci = ci->ci_next
    376    1.1        ad 
    377    1.1        ad #define CPU_STARTUP(_ci, _target)	((_ci)->ci_func->start(_ci, _target))
    378    1.1        ad #define CPU_STOP(_ci)	        	((_ci)->ci_func->stop(_ci))
    379    1.1        ad #define CPU_START_CLEANUP(_ci)		((_ci)->ci_func->cleanup(_ci))
    380    1.1        ad 
    381   1.10     pooka #if !defined(__GNUC__) || defined(_MODULE)
    382    1.1        ad /* For non-GCC and modules */
    383    1.1        ad struct cpu_info	*x86_curcpu(void);
    384    1.5        ad # ifdef __GNUC__
    385    1.5        ad lwp_t	*x86_curlwp(void) __attribute__ ((const));
    386    1.5        ad # else
    387    1.5        ad lwp_t   *x86_curlwp(void);
    388    1.5        ad # endif
    389    1.1        ad #endif
    390    1.1        ad 
    391    1.4        ad #define cpu_number() 		(cpu_index(curcpu()))
    392    1.1        ad 
    393    1.1        ad #define CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
    394    1.1        ad 
    395  1.113        ad #define aston(l)		((l)->l_md.md_astpending = 1)
    396    1.1        ad 
    397    1.1        ad void cpu_boot_secondary_processors(void);
    398    1.1        ad void cpu_init_idle_lwps(void);
    399    1.1        ad void cpu_init_msrs(struct cpu_info *, bool);
    400   1.48    bouyer void cpu_load_pmap(struct pmap *, struct pmap *);
    401   1.37    cherry void cpu_broadcast_halt(void);
    402   1.37    cherry void cpu_kick(struct cpu_info *);
    403    1.1        ad 
    404   1.87      maxv void cpu_pcpuarea_init(struct cpu_info *);
    405   1.88      maxv void cpu_svs_init(struct cpu_info *);
    406   1.91      maxv void cpu_speculation_init(struct cpu_info *);
    407   1.87      maxv 
    408    1.1        ad #define	curcpu()		x86_curcpu()
    409    1.1        ad #define	curlwp			x86_curlwp()
    410   1.18     rmind #define	curpcb			((struct pcb *)lwp_getpcb(curlwp))
    411    1.1        ad 
    412    1.1        ad /*
    413    1.1        ad  * Give a profiling tick to the current process when the user profiling
    414    1.1        ad  * buffer pages are invalid.  On the i386, request an ast to send us
    415    1.1        ad  * through trap(), marking the proc as needing a profiling tick.
    416    1.1        ad  */
    417    1.1        ad extern void	cpu_need_proftick(struct lwp *l);
    418    1.1        ad 
    419    1.1        ad /*
    420    1.1        ad  * Notify the LWP l that it has a signal pending, process as soon as
    421    1.1        ad  * possible.
    422    1.1        ad  */
    423    1.1        ad extern void	cpu_signotify(struct lwp *);
    424    1.1        ad 
    425    1.1        ad /*
    426    1.1        ad  * We need a machine-independent name for this.
    427    1.1        ad  */
    428    1.1        ad extern void (*delay_func)(unsigned int);
    429    1.1        ad struct timeval;
    430    1.1        ad 
    431   1.72       chs #ifndef __HIDE_DELAY
    432    1.1        ad #define	DELAY(x)		(*delay_func)(x)
    433    1.1        ad #define delay(x)		(*delay_func)(x)
    434   1.72       chs #endif
    435    1.1        ad 
    436    1.1        ad extern int biosbasemem;
    437    1.1        ad extern int biosextmem;
    438   1.51       chs extern int cputype;
    439    1.1        ad extern int cpuid_level;
    440    1.1        ad extern int cpu_class;
    441    1.1        ad extern char cpu_brand_string[];
    442   1.42       jym extern int use_pae;
    443    1.1        ad 
    444   1.61       dsl #ifdef __i386__
    445   1.81     kamil #define	i386_fpu_present	1
    446   1.61       dsl int npx586bug1(int, int);
    447   1.61       dsl extern int i386_fpu_fdivbug;
    448    1.1        ad extern int i386_use_fxsave;
    449    1.1        ad extern int i386_has_sse;
    450    1.1        ad extern int i386_has_sse2;
    451   1.61       dsl #else
    452   1.81     kamil #define	i386_fpu_present	1
    453   1.61       dsl #define	i386_fpu_fdivbug	0
    454   1.61       dsl #define	i386_use_fxsave		1
    455   1.61       dsl #define	i386_has_sse		1
    456   1.61       dsl #define	i386_has_sse2		1
    457   1.61       dsl #endif
    458    1.1        ad 
    459   1.65       dsl extern int x86_fpu_save;
    460   1.65       dsl #define	FPU_SAVE_FSAVE		0
    461   1.65       dsl #define	FPU_SAVE_FXSAVE		1
    462   1.65       dsl #define	FPU_SAVE_XSAVE		2
    463   1.65       dsl #define	FPU_SAVE_XSAVEOPT	3
    464   1.66       dsl extern unsigned int x86_fpu_save_size;
    465   1.65       dsl extern uint64_t x86_xsave_features;
    466  1.107    mgorny extern size_t x86_xsave_offsets[];
    467  1.107    mgorny extern size_t x86_xsave_sizes[];
    468   1.98      maxv extern uint32_t x86_fpu_mxcsr_mask;
    469   1.65       dsl 
    470    1.1        ad extern void (*x86_cpu_idle)(void);
    471    1.1        ad #define	cpu_idle() (*x86_cpu_idle)()
    472    1.1        ad 
    473    1.1        ad /* machdep.c */
    474   1.78      maxv #ifdef i386
    475   1.78      maxv void	cpu_set_tss_gates(struct cpu_info *);
    476   1.78      maxv #endif
    477    1.1        ad void	cpu_reset(void);
    478    1.1        ad 
    479    1.1        ad /* longrun.c */
    480    1.1        ad u_int 	tmx86_get_longrun_mode(void);
    481    1.1        ad void 	tmx86_get_longrun_status(u_int *, u_int *, u_int *);
    482    1.1        ad void 	tmx86_init_longrun(void);
    483    1.1        ad 
    484    1.1        ad /* identcpu.c */
    485    1.1        ad void 	cpu_probe(struct cpu_info *);
    486    1.1        ad void	cpu_identify(struct cpu_info *);
    487   1.71    nonaka void	identify_hypervisor(void);
    488   1.71    nonaka 
    489  1.121   msaitoh /* identcpu_subr.c */
    490  1.121   msaitoh uint64_t cpu_tsc_freq_cpuid(struct cpu_info *);
    491  1.121   msaitoh 
    492   1.71    nonaka typedef enum vm_guest {
    493   1.71    nonaka 	VM_GUEST_NO = 0,
    494   1.71    nonaka 	VM_GUEST_VM,
    495  1.122    bouyer 	VM_GUEST_XENPV,
    496  1.122    bouyer 	VM_GUEST_XENPVH,
    497  1.122    bouyer 	VM_GUEST_XENHVM,
    498  1.104    cherry 	VM_GUEST_XENPVHVM,
    499   1.71    nonaka 	VM_GUEST_HV,
    500   1.71    nonaka 	VM_GUEST_VMWARE,
    501   1.71    nonaka 	VM_GUEST_KVM,
    502   1.71    nonaka 	VM_LAST
    503   1.71    nonaka } vm_guest_t;
    504   1.71    nonaka extern vm_guest_t vm_guest;
    505    1.1        ad 
    506  1.122    bouyer static __inline bool __unused
    507  1.122    bouyer vm_guest_is_xenpv(void)
    508  1.122    bouyer {
    509  1.122    bouyer 	switch(vm_guest) {
    510  1.122    bouyer 	case VM_GUEST_XENPV:
    511  1.122    bouyer 	case VM_GUEST_XENPVH:
    512  1.122    bouyer 	case VM_GUEST_XENPVHVM:
    513  1.122    bouyer 		return true;
    514  1.122    bouyer 	default:
    515  1.122    bouyer 		return false;
    516  1.122    bouyer 	}
    517  1.122    bouyer }
    518  1.122    bouyer 
    519  1.125    bouyer static __inline bool __unused
    520  1.125    bouyer vm_guest_is_xenpvh_or_pvhvm(void)
    521  1.125    bouyer {
    522  1.125    bouyer 	switch(vm_guest) {
    523  1.125    bouyer 	case VM_GUEST_XENPVH:
    524  1.125    bouyer 	case VM_GUEST_XENPVHVM:
    525  1.125    bouyer 		return true;
    526  1.125    bouyer 	default:
    527  1.125    bouyer 		return false;
    528  1.125    bouyer 	}
    529  1.125    bouyer }
    530  1.125    bouyer 
    531   1.17     rmind /* cpu_topology.c */
    532   1.20     rmind void	x86_cpu_topology(struct cpu_info *);
    533   1.17     rmind 
    534    1.1        ad /* locore.s */
    535    1.1        ad struct region_descriptor;
    536    1.1        ad void	lgdt(struct region_descriptor *);
    537  1.103    cherry #ifdef XENPV
    538    1.1        ad void	lgdt_finish(void);
    539    1.1        ad #endif
    540    1.1        ad 
    541    1.1        ad struct pcb;
    542    1.1        ad void	savectx(struct pcb *);
    543    1.1        ad void	lwp_trampoline(void);
    544  1.104    cherry #ifdef XEN
    545  1.104    cherry void	xen_startrtclock(void);
    546    1.1        ad void	xen_delay(unsigned int);
    547    1.1        ad void	xen_initclocks(void);
    548  1.122    bouyer void	xen_cpu_initclocks(void);
    549   1.47       jym void	xen_suspendclocks(struct cpu_info *);
    550   1.47       jym void	xen_resumeclocks(struct cpu_info *);
    551  1.104    cherry #endif /* XEN */
    552    1.1        ad /* clock.c */
    553    1.1        ad void	initrtclock(u_long);
    554    1.1        ad void	startrtclock(void);
    555    1.1        ad void	i8254_delay(unsigned int);
    556    1.1        ad void	i8254_microtime(struct timeval *);
    557    1.1        ad void	i8254_initclocks(void);
    558  1.105    nonaka unsigned int gettick(void);
    559  1.105    nonaka extern void (*x86_delay)(unsigned int);
    560    1.1        ad 
    561    1.1        ad /* cpu.c */
    562    1.1        ad void	cpu_probe_features(struct cpu_info *);
    563    1.1        ad 
    564    1.1        ad /* vm_machdep.c */
    565   1.78      maxv void	cpu_proc_fork(struct proc *, struct proc *);
    566   1.13     rmind paddr_t	kvtop(void *);
    567    1.1        ad 
    568    1.1        ad #ifdef USER_LDT
    569    1.1        ad /* sys_machdep.h */
    570    1.1        ad int	x86_get_ldt(struct lwp *, void *, register_t *);
    571    1.1        ad int	x86_set_ldt(struct lwp *, void *, register_t *);
    572    1.1        ad #endif
    573    1.1        ad 
    574    1.1        ad /* isa_machdep.c */
    575    1.1        ad void	isa_defaultirq(void);
    576    1.1        ad int	isa_nmi(void);
    577    1.1        ad 
    578    1.1        ad /* consinit.c */
    579    1.1        ad void kgdb_port_init(void);
    580    1.1        ad 
    581    1.1        ad /* bus_machdep.c */
    582    1.1        ad void x86_bus_space_init(void);
    583    1.1        ad void x86_bus_space_mallocok(void);
    584    1.1        ad 
    585   1.40     joerg #endif /* _KERNEL */
    586   1.40     joerg 
    587   1.40     joerg #if defined(_KERNEL) || defined(_KMEMUSER)
    588    1.1        ad #include <machine/psl.h>	/* Must be after struct cpu_info declaration */
    589   1.11        ad #endif /* _KERNEL || __KMEMUSER */
    590    1.1        ad 
    591    1.1        ad /*
    592    1.1        ad  * CTL_MACHDEP definitions.
    593    1.1        ad  */
    594    1.1        ad #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    595    1.1        ad #define	CPU_BIOSBASEMEM		2	/* int: bios-reported base mem (K) */
    596    1.1        ad #define	CPU_BIOSEXTMEM		3	/* int: bios-reported ext. mem (K) */
    597    1.1        ad /* 	CPU_NKPDE		4	obsolete: int: number of kernel PDEs */
    598    1.1        ad #define	CPU_BOOTED_KERNEL	5	/* string: booted kernel name */
    599    1.1        ad #define CPU_DISKINFO		6	/* struct disklist *:
    600    1.1        ad 					 * disk geometry information */
    601    1.1        ad #define CPU_FPU_PRESENT		7	/* int: FPU is present */
    602    1.1        ad #define	CPU_OSFXSR		8	/* int: OS uses FXSAVE/FXRSTOR */
    603    1.1        ad #define	CPU_SSE			9	/* int: OS/CPU supports SSE */
    604    1.1        ad #define	CPU_SSE2		10	/* int: OS/CPU supports SSE2 */
    605    1.1        ad #define	CPU_TMLR_MODE		11	/* int: longrun mode
    606    1.1        ad 					 * 0: minimum frequency
    607    1.1        ad 					 * 1: economy
    608    1.1        ad 					 * 2: performance
    609    1.1        ad 					 * 3: maximum frequency
    610    1.1        ad 					 */
    611    1.1        ad #define	CPU_TMLR_FREQUENCY	12	/* int: current frequency */
    612   1.84      maxv #define	CPU_TMLR_VOLTAGE	13	/* int: current voltage */
    613    1.1        ad #define	CPU_TMLR_PERCENTAGE	14	/* int: current clock percentage */
    614   1.69     kamil #define	CPU_FPU_SAVE		15	/* int: FPU Instructions layout
    615   1.69     kamil 					 * to use this, CPU_OSFXSR must be true
    616   1.69     kamil 					 * 0: FSAVE
    617   1.69     kamil 					 * 1: FXSAVE
    618   1.69     kamil 					 * 2: XSAVE
    619   1.69     kamil 					 * 3: XSAVEOPT
    620   1.69     kamil 					 */
    621   1.69     kamil #define	CPU_FPU_SAVE_SIZE	16	/* int: FPU Instruction layout size */
    622   1.69     kamil #define	CPU_XSAVE_FEATURES	17	/* quad: XSAVE features */
    623   1.69     kamil 
    624    1.1        ad /*
    625    1.1        ad  * Structure for CPU_DISKINFO sysctl call.
    626    1.1        ad  * XXX this should be somewhere else.
    627    1.1        ad  */
    628    1.1        ad #define MAX_BIOSDISKS	16
    629    1.1        ad 
    630    1.1        ad struct disklist {
    631    1.1        ad 	int dl_nbiosdisks;			   /* number of bios disks */
    632   1.83  christos 	int dl_unused;
    633    1.1        ad 	struct biosdisk_info {
    634    1.1        ad 		int bi_dev;			   /* BIOS device # (0x80 ..) */
    635    1.1        ad 		int bi_cyl;			   /* cylinders on disk */
    636    1.1        ad 		int bi_head;			   /* heads per track */
    637    1.1        ad 		int bi_sec;			   /* sectors per track */
    638    1.1        ad 		uint64_t bi_lbasecs;		   /* total sec. (iff ext13) */
    639    1.1        ad #define BIFLAG_INVALID		0x01
    640    1.1        ad #define BIFLAG_EXTINT13		0x02
    641    1.1        ad 		int bi_flags;
    642   1.83  christos 		int bi_unused;
    643    1.1        ad 	} dl_biosdisks[MAX_BIOSDISKS];
    644    1.1        ad 
    645    1.1        ad 	int dl_nnativedisks;			   /* number of native disks */
    646    1.1        ad 	struct nativedisk_info {
    647    1.1        ad 		char ni_devname[16];		   /* native device name */
    648    1.1        ad 		int ni_nmatches; 		   /* # of matches w/ BIOS */
    649    1.1        ad 		int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
    650    1.1        ad 	} dl_nativedisks[1];			   /* actually longer */
    651    1.1        ad };
    652    1.1        ad #endif /* !_X86_CPU_H_ */
    653