cpu.h revision 1.101
1 /* $NetBSD: cpu.h,v 1.101 2018/12/25 06:50:11 cherry Exp $ */ 2 3 /* 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #include "opt_svs.h" 51 #ifdef i386 52 #include "opt_user_ldt.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/xen-public/xen.h> 73 #include <xen/xen-public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 80 #ifdef __x86_64__ 81 #define i386tss x86_64_tss 82 #endif 83 84 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 85 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 86 87 struct cpu_tss { 88 #ifdef i386 89 struct i386tss dblflt_tss; 90 struct i386tss ddbipi_tss; 91 #endif 92 struct i386tss tss; 93 uint8_t iomap[IOMAPSIZE]; 94 } __packed; 95 96 /* 97 * Arguments to hardclock, softclock and statclock 98 * encapsulate the previous machine state in an opaque 99 * clockframe; for now, use generic intrframe. 100 */ 101 struct clockframe { 102 struct intrframe cf_if; 103 }; 104 105 /* 106 * a bunch of this belongs in cpuvar.h; move it later.. 107 */ 108 109 struct cpu_info { 110 struct cpu_data ci_data; /* MI per-cpu data */ 111 device_t ci_dev; /* pointer to our device */ 112 struct cpu_info *ci_self; /* self-pointer */ 113 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 114 115 /* 116 * Will be accessed by other CPUs. 117 */ 118 struct cpu_info *ci_next; /* next cpu */ 119 struct lwp *ci_curlwp; /* current owner of the processor */ 120 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 121 cpuid_t ci_cpuid; /* our CPU ID */ 122 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 123 uint32_t ci_initapicid; /* our initial APIC ID */ 124 125 /* 126 * Private members. 127 */ 128 struct pmap *ci_pmap; /* current pmap */ 129 int ci_want_pmapload; /* pmap_load() is needed */ 130 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 131 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 132 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 133 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 134 int ci_curldt; /* current LDT descriptor */ 135 int ci_nintrhand; /* number of H/W interrupt handlers */ 136 uint64_t ci_scratch; 137 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 138 139 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 140 #if defined(XEN) 141 struct intrsource *ci_xsources[NIPL]; 142 uint32_t ci_xmask[NIPL]; 143 uint32_t ci_xunmask[NIPL]; 144 uint32_t ci_xpending; /* XEN doesn't use the cmpxchg8 path */ 145 #endif 146 147 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 148 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 149 150 /* The following must be aligned for cmpxchg8b. */ 151 struct { 152 uint32_t ipending; 153 int ilevel; 154 } ci_istate __aligned(8); 155 #define ci_ipending ci_istate.ipending 156 #define ci_ilevel ci_istate.ilevel 157 int ci_idepth; 158 void * ci_intrstack; 159 uint32_t ci_imask[NIPL]; 160 uint32_t ci_iunmask[NIPL]; 161 162 uint32_t ci_flags; /* flags; see below */ 163 uint32_t ci_ipis; /* interprocessor interrupts pending */ 164 165 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 166 uint32_t ci_vendor[4]; /* vendor string */ 167 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 168 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 169 volatile uint32_t ci_lapic_counter; 170 171 uint32_t ci_feat_val[8]; /* X86 CPUID feature bits */ 172 /* [0] basic features cpuid.1:%edx 173 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 174 * [2] extended features cpuid:80000001:%edx 175 * [3] extended features cpuid:80000001:%ecx 176 * [4] VIA padlock features 177 * [5] structured extended features cpuid.7:%ebx 178 * [6] structured extended features cpuid.7:%ecx 179 * [7] structured extended features cpuid.7:%edx 180 */ 181 182 const struct cpu_functions *ci_func; /* start/stop functions */ 183 struct trapframe *ci_ddb_regs; 184 185 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 186 struct x86_cache_info ci_cinfo[CAI_COUNT]; 187 188 device_t ci_frequency; /* Frequency scaling technology */ 189 device_t ci_padlock; /* VIA PadLock private storage */ 190 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 191 device_t ci_vm; /* Virtual machine guest driver */ 192 193 /* 194 * Segmentation-related data. 195 */ 196 union descriptor *ci_gdt; 197 struct cpu_tss *ci_tss; /* Per-cpu TSSes; shared among LWPs */ 198 int ci_tss_sel; /* TSS selector of this cpu */ 199 200 /* 201 * The following two are actually region_descriptors, 202 * but that would pollute the namespace. 203 */ 204 uintptr_t ci_suspend_gdt; 205 uint16_t ci_suspend_gdt_padding; 206 uintptr_t ci_suspend_idt; 207 uint16_t ci_suspend_idt_padding; 208 209 uint16_t ci_suspend_tr; 210 uint16_t ci_suspend_ldt; 211 uintptr_t ci_suspend_fs; 212 uintptr_t ci_suspend_gs; 213 uintptr_t ci_suspend_kgs; 214 uintptr_t ci_suspend_efer; 215 uintptr_t ci_suspend_reg[12]; 216 uintptr_t ci_suspend_cr0; 217 uintptr_t ci_suspend_cr2; 218 uintptr_t ci_suspend_cr3; 219 uintptr_t ci_suspend_cr4; 220 uintptr_t ci_suspend_cr8; 221 222 /* The following must be in a single cache line. */ 223 int ci_want_resched __aligned(64); 224 int ci_padout __aligned(64); 225 226 #ifndef __HAVE_DIRECT_MAP 227 #define VPAGE_SRC 0 228 #define VPAGE_DST 1 229 #define VPAGE_ZER 2 230 #define VPAGE_PTP 3 231 #define VPAGE_MAX 4 232 vaddr_t vpage[VPAGE_MAX]; 233 pt_entry_t *vpage_pte[VPAGE_MAX]; 234 #endif 235 236 #ifdef PAE 237 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 238 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 239 #endif 240 241 #ifdef SVS 242 pd_entry_t * ci_svs_updir; 243 paddr_t ci_svs_updirpa; 244 paddr_t ci_svs_kpdirpa; 245 kmutex_t ci_svs_mtx; 246 pd_entry_t * ci_svs_rsp0_pte; 247 vaddr_t ci_svs_rsp0; 248 vaddr_t ci_svs_ursp0; 249 vaddr_t ci_svs_krsp0; 250 vaddr_t ci_svs_utls; 251 #endif 252 253 #if defined(XEN) 254 #if defined(PAE) || defined(__x86_64__) 255 /* Currently active user PGD (can't use rcr3() with Xen) */ 256 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 257 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 258 kmutex_t ci_kpm_mtx; 259 #endif /* defined(PAE) || defined(__x86_64__) */ 260 261 #if defined(__x86_64__) 262 /* per-cpu version of normal_pdes */ 263 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */ 264 paddr_t ci_xen_current_user_pgd; 265 #endif /* defined(__x86_64__) */ 266 267 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 268 struct evcnt ci_ipi_events[XEN_NIPIS]; 269 evtchn_port_t ci_ipi_evtchn; 270 size_t ci_xpq_idx; 271 /* Xen raw system time at which we last ran hardclock. */ 272 uint64_t ci_xen_hardclock_systime_ns; 273 274 /* 275 * Last TSC-adjusted local Xen system time we observed. Used 276 * to detect whether the Xen clock has gone backwards. 277 */ 278 uint64_t ci_xen_last_systime_ns; 279 280 /* 281 * Distance in nanoseconds from the local view of system time 282 * to the global view of system time, if the local time is 283 * behind the global time. 284 */ 285 uint64_t ci_xen_systime_ns_skew; 286 287 /* Xen periodic timer interrupt handle. */ 288 struct intrhand *ci_xen_timer_intrhand; 289 290 /* 291 * Clockframe for timer interrupt handler. 292 * Saved at entry via event callback. 293 */ 294 vaddr_t ci_xen_clockf_pc; /* RIP at last event interrupt */ 295 bool ci_xen_clockf_usermode; /* Was the guest in usermode ? */ 296 297 /* Event counters for various pathologies that might happen. */ 298 struct evcnt ci_xen_cpu_tsc_backwards_evcnt; 299 struct evcnt ci_xen_tsc_delta_negative_evcnt; 300 struct evcnt ci_xen_raw_systime_wraparound_evcnt; 301 struct evcnt ci_xen_raw_systime_backwards_evcnt; 302 struct evcnt ci_xen_systime_backwards_hardclock_evcnt; 303 struct evcnt ci_xen_missed_hardclock_evcnt; 304 #else /* defined(XEN) */ 305 struct evcnt ci_ipi_events[X86_NIPI]; 306 #endif /* defined(XEN) */ 307 308 }; 309 310 /* 311 * Macros to handle (some) trapframe registers for common x86 code. 312 */ 313 #ifdef __x86_64__ 314 #define X86_TF_RAX(tf) tf->tf_rax 315 #define X86_TF_RDX(tf) tf->tf_rdx 316 #define X86_TF_RSP(tf) tf->tf_rsp 317 #define X86_TF_RIP(tf) tf->tf_rip 318 #define X86_TF_RFLAGS(tf) tf->tf_rflags 319 #else 320 #define X86_TF_RAX(tf) tf->tf_eax 321 #define X86_TF_RDX(tf) tf->tf_edx 322 #define X86_TF_RSP(tf) tf->tf_esp 323 #define X86_TF_RIP(tf) tf->tf_eip 324 #define X86_TF_RFLAGS(tf) tf->tf_eflags 325 #endif 326 327 /* 328 * Processor flag notes: The "primary" CPU has certain MI-defined 329 * roles (mostly relating to hardclock handling); we distinguish 330 * between the processor which booted us, and the processor currently 331 * holding the "primary" role just to give us the flexibility later to 332 * change primaries should we be sufficiently twisted. 333 */ 334 335 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 336 #define CPUF_AP 0x0002 /* CPU is an AP */ 337 #define CPUF_SP 0x0004 /* CPU is only processor */ 338 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 339 340 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 341 #define CPUF_PRESENT 0x1000 /* CPU is present */ 342 #define CPUF_RUNNING 0x2000 /* CPU is running */ 343 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 344 #define CPUF_GO 0x8000 /* CPU should start running */ 345 346 #endif /* _KERNEL || __KMEMUSER */ 347 348 #ifdef _KERNEL 349 /* 350 * We statically allocate the CPU info for the primary CPU (or, 351 * the only CPU on uniprocessors), and the primary CPU is the 352 * first CPU on the CPU info list. 353 */ 354 extern struct cpu_info cpu_info_primary; 355 extern struct cpu_info *cpu_info_list; 356 357 #define CPU_INFO_ITERATOR int __unused 358 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 359 ci != NULL; ci = ci->ci_next 360 361 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 362 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 363 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 364 365 #if !defined(__GNUC__) || defined(_MODULE) 366 /* For non-GCC and modules */ 367 struct cpu_info *x86_curcpu(void); 368 void cpu_set_curpri(int); 369 # ifdef __GNUC__ 370 lwp_t *x86_curlwp(void) __attribute__ ((const)); 371 # else 372 lwp_t *x86_curlwp(void); 373 # endif 374 #endif 375 376 #define cpu_number() (cpu_index(curcpu())) 377 378 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 379 380 #define X86_AST_GENERIC 0x01 381 #define X86_AST_PREEMPT 0x02 382 383 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 384 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 385 386 void cpu_boot_secondary_processors(void); 387 void cpu_init_idle_lwps(void); 388 void cpu_init_msrs(struct cpu_info *, bool); 389 void cpu_load_pmap(struct pmap *, struct pmap *); 390 void cpu_broadcast_halt(void); 391 void cpu_kick(struct cpu_info *); 392 393 void cpu_pcpuarea_init(struct cpu_info *); 394 void cpu_svs_init(struct cpu_info *); 395 void cpu_speculation_init(struct cpu_info *); 396 397 #define curcpu() x86_curcpu() 398 #define curlwp x86_curlwp() 399 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 400 401 /* 402 * Give a profiling tick to the current process when the user profiling 403 * buffer pages are invalid. On the i386, request an ast to send us 404 * through trap(), marking the proc as needing a profiling tick. 405 */ 406 extern void cpu_need_proftick(struct lwp *l); 407 408 /* 409 * Notify the LWP l that it has a signal pending, process as soon as 410 * possible. 411 */ 412 extern void cpu_signotify(struct lwp *); 413 414 /* 415 * We need a machine-independent name for this. 416 */ 417 extern void (*delay_func)(unsigned int); 418 struct timeval; 419 420 #ifndef __HIDE_DELAY 421 #define DELAY(x) (*delay_func)(x) 422 #define delay(x) (*delay_func)(x) 423 #endif 424 425 extern int biosbasemem; 426 extern int biosextmem; 427 extern int cputype; 428 extern int cpuid_level; 429 extern int cpu_class; 430 extern char cpu_brand_string[]; 431 extern int use_pae; 432 433 #ifdef __i386__ 434 #define i386_fpu_present 1 435 int npx586bug1(int, int); 436 extern int i386_fpu_fdivbug; 437 extern int i386_use_fxsave; 438 extern int i386_has_sse; 439 extern int i386_has_sse2; 440 #else 441 #define i386_fpu_present 1 442 #define i386_fpu_fdivbug 0 443 #define i386_use_fxsave 1 444 #define i386_has_sse 1 445 #define i386_has_sse2 1 446 #endif 447 448 extern int x86_fpu_save; 449 #define FPU_SAVE_FSAVE 0 450 #define FPU_SAVE_FXSAVE 1 451 #define FPU_SAVE_XSAVE 2 452 #define FPU_SAVE_XSAVEOPT 3 453 extern unsigned int x86_fpu_save_size; 454 extern uint64_t x86_xsave_features; 455 extern uint32_t x86_fpu_mxcsr_mask; 456 extern bool x86_fpu_eager; 457 458 extern void (*x86_cpu_idle)(void); 459 #define cpu_idle() (*x86_cpu_idle)() 460 461 /* machdep.c */ 462 #ifdef i386 463 void cpu_set_tss_gates(struct cpu_info *); 464 #endif 465 void cpu_reset(void); 466 467 /* longrun.c */ 468 u_int tmx86_get_longrun_mode(void); 469 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 470 void tmx86_init_longrun(void); 471 472 /* identcpu.c */ 473 void cpu_probe(struct cpu_info *); 474 void cpu_identify(struct cpu_info *); 475 void identify_hypervisor(void); 476 477 typedef enum vm_guest { 478 VM_GUEST_NO = 0, 479 VM_GUEST_VM, 480 VM_GUEST_XEN, 481 VM_GUEST_HV, 482 VM_GUEST_VMWARE, 483 VM_GUEST_KVM, 484 VM_LAST 485 } vm_guest_t; 486 extern vm_guest_t vm_guest; 487 488 /* cpu_topology.c */ 489 void x86_cpu_topology(struct cpu_info *); 490 491 /* locore.s */ 492 struct region_descriptor; 493 void lgdt(struct region_descriptor *); 494 #ifdef XEN 495 void lgdt_finish(void); 496 #endif 497 498 struct pcb; 499 void savectx(struct pcb *); 500 void lwp_trampoline(void); 501 #ifdef XEN 502 void startrtclock(void); 503 void xen_delay(unsigned int); 504 void xen_initclocks(void); 505 void xen_suspendclocks(struct cpu_info *); 506 void xen_resumeclocks(struct cpu_info *); 507 #else 508 /* clock.c */ 509 void initrtclock(u_long); 510 void startrtclock(void); 511 void i8254_delay(unsigned int); 512 void i8254_microtime(struct timeval *); 513 void i8254_initclocks(void); 514 #endif 515 516 /* cpu.c */ 517 void cpu_probe_features(struct cpu_info *); 518 519 /* vm_machdep.c */ 520 void cpu_proc_fork(struct proc *, struct proc *); 521 paddr_t kvtop(void *); 522 523 #ifdef USER_LDT 524 /* sys_machdep.h */ 525 int x86_get_ldt(struct lwp *, void *, register_t *); 526 int x86_set_ldt(struct lwp *, void *, register_t *); 527 #endif 528 529 /* isa_machdep.c */ 530 void isa_defaultirq(void); 531 int isa_nmi(void); 532 533 /* consinit.c */ 534 void kgdb_port_init(void); 535 536 /* bus_machdep.c */ 537 void x86_bus_space_init(void); 538 void x86_bus_space_mallocok(void); 539 540 #endif /* _KERNEL */ 541 542 #if defined(_KERNEL) || defined(_KMEMUSER) 543 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 544 #endif /* _KERNEL || __KMEMUSER */ 545 546 /* 547 * CTL_MACHDEP definitions. 548 */ 549 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 550 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 551 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 552 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 553 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 554 #define CPU_DISKINFO 6 /* struct disklist *: 555 * disk geometry information */ 556 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 557 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 558 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 559 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 560 #define CPU_TMLR_MODE 11 /* int: longrun mode 561 * 0: minimum frequency 562 * 1: economy 563 * 2: performance 564 * 3: maximum frequency 565 */ 566 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 567 #define CPU_TMLR_VOLTAGE 13 /* int: current voltage */ 568 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 569 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 570 * to use this, CPU_OSFXSR must be true 571 * 0: FSAVE 572 * 1: FXSAVE 573 * 2: XSAVE 574 * 3: XSAVEOPT 575 */ 576 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 577 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 578 579 /* 580 * Structure for CPU_DISKINFO sysctl call. 581 * XXX this should be somewhere else. 582 */ 583 #define MAX_BIOSDISKS 16 584 585 struct disklist { 586 int dl_nbiosdisks; /* number of bios disks */ 587 int dl_unused; 588 struct biosdisk_info { 589 int bi_dev; /* BIOS device # (0x80 ..) */ 590 int bi_cyl; /* cylinders on disk */ 591 int bi_head; /* heads per track */ 592 int bi_sec; /* sectors per track */ 593 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 594 #define BIFLAG_INVALID 0x01 595 #define BIFLAG_EXTINT13 0x02 596 int bi_flags; 597 int bi_unused; 598 } dl_biosdisks[MAX_BIOSDISKS]; 599 600 int dl_nnativedisks; /* number of native disks */ 601 struct nativedisk_info { 602 char ni_devname[16]; /* native device name */ 603 int ni_nmatches; /* # of matches w/ BIOS */ 604 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 605 } dl_nativedisks[1]; /* actually longer */ 606 }; 607 #endif /* !_X86_CPU_H_ */ 608
Indexes created Tue Sep 23 22:09:46 GMT 2025