cpu.h revision 1.103
1 /* $NetBSD: cpu.h,v 1.103 2019/02/11 14:59:32 cherry Exp $ */ 2 3 /* 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #include "opt_svs.h" 51 #ifdef i386 52 #include "opt_user_ldt.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/include/public/xen.h> 73 #include <xen/include/public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 80 #ifdef __x86_64__ 81 #define i386tss x86_64_tss 82 #endif 83 84 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 85 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 86 87 struct cpu_tss { 88 #ifdef i386 89 struct i386tss dblflt_tss; 90 struct i386tss ddbipi_tss; 91 #endif 92 struct i386tss tss; 93 uint8_t iomap[IOMAPSIZE]; 94 } __packed; 95 96 /* 97 * Arguments to hardclock, softclock and statclock 98 * encapsulate the previous machine state in an opaque 99 * clockframe; for now, use generic intrframe. 100 */ 101 struct clockframe { 102 struct intrframe cf_if; 103 }; 104 105 /* 106 * a bunch of this belongs in cpuvar.h; move it later.. 107 */ 108 109 struct cpu_info { 110 struct cpu_data ci_data; /* MI per-cpu data */ 111 device_t ci_dev; /* pointer to our device */ 112 struct cpu_info *ci_self; /* self-pointer */ 113 #ifdef XEN 114 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 115 #endif 116 117 /* 118 * Will be accessed by other CPUs. 119 */ 120 struct cpu_info *ci_next; /* next cpu */ 121 struct lwp *ci_curlwp; /* current owner of the processor */ 122 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 123 cpuid_t ci_cpuid; /* our CPU ID */ 124 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 125 uint32_t ci_initapicid; /* our initial APIC ID */ 126 127 /* 128 * Private members. 129 */ 130 struct pmap *ci_pmap; /* current pmap */ 131 int ci_want_pmapload; /* pmap_load() is needed */ 132 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 133 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 134 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 135 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 136 int ci_curldt; /* current LDT descriptor */ 137 int ci_nintrhand; /* number of H/W interrupt handlers */ 138 uint64_t ci_scratch; 139 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 140 141 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 142 #if defined(XEN) 143 struct intrsource *ci_xsources[NIPL]; 144 uint32_t ci_xmask[NIPL]; 145 uint32_t ci_xunmask[NIPL]; 146 uint32_t ci_xpending; /* XEN doesn't use the cmpxchg8 path */ 147 #endif 148 149 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 150 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 151 152 /* The following must be aligned for cmpxchg8b. */ 153 struct { 154 uint32_t ipending; 155 int ilevel; 156 } ci_istate __aligned(8); 157 #define ci_ipending ci_istate.ipending 158 #define ci_ilevel ci_istate.ilevel 159 int ci_idepth; 160 void * ci_intrstack; 161 uint32_t ci_imask[NIPL]; 162 uint32_t ci_iunmask[NIPL]; 163 164 uint32_t ci_flags; /* flags; see below */ 165 uint32_t ci_ipis; /* interprocessor interrupts pending */ 166 167 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 168 uint32_t ci_vendor[4]; /* vendor string */ 169 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 170 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 171 volatile uint32_t ci_lapic_counter; 172 173 uint32_t ci_feat_val[8]; /* X86 CPUID feature bits */ 174 /* [0] basic features cpuid.1:%edx 175 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 176 * [2] extended features cpuid:80000001:%edx 177 * [3] extended features cpuid:80000001:%ecx 178 * [4] VIA padlock features 179 * [5] structured extended features cpuid.7:%ebx 180 * [6] structured extended features cpuid.7:%ecx 181 * [7] structured extended features cpuid.7:%edx 182 */ 183 184 const struct cpu_functions *ci_func; /* start/stop functions */ 185 struct trapframe *ci_ddb_regs; 186 187 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 188 struct x86_cache_info ci_cinfo[CAI_COUNT]; 189 190 device_t ci_frequency; /* Frequency scaling technology */ 191 device_t ci_padlock; /* VIA PadLock private storage */ 192 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 193 device_t ci_vm; /* Virtual machine guest driver */ 194 195 /* 196 * Segmentation-related data. 197 */ 198 union descriptor *ci_gdt; 199 struct cpu_tss *ci_tss; /* Per-cpu TSSes; shared among LWPs */ 200 int ci_tss_sel; /* TSS selector of this cpu */ 201 202 /* 203 * The following two are actually region_descriptors, 204 * but that would pollute the namespace. 205 */ 206 uintptr_t ci_suspend_gdt; 207 uint16_t ci_suspend_gdt_padding; 208 uintptr_t ci_suspend_idt; 209 uint16_t ci_suspend_idt_padding; 210 211 uint16_t ci_suspend_tr; 212 uint16_t ci_suspend_ldt; 213 uintptr_t ci_suspend_fs; 214 uintptr_t ci_suspend_gs; 215 uintptr_t ci_suspend_kgs; 216 uintptr_t ci_suspend_efer; 217 uintptr_t ci_suspend_reg[12]; 218 uintptr_t ci_suspend_cr0; 219 uintptr_t ci_suspend_cr2; 220 uintptr_t ci_suspend_cr3; 221 uintptr_t ci_suspend_cr4; 222 uintptr_t ci_suspend_cr8; 223 224 /* The following must be in a single cache line. */ 225 int ci_want_resched __aligned(64); 226 int ci_padout __aligned(64); 227 228 #ifndef __HAVE_DIRECT_MAP 229 #define VPAGE_SRC 0 230 #define VPAGE_DST 1 231 #define VPAGE_ZER 2 232 #define VPAGE_PTP 3 233 #define VPAGE_MAX 4 234 vaddr_t vpage[VPAGE_MAX]; 235 pt_entry_t *vpage_pte[VPAGE_MAX]; 236 #endif 237 238 #ifdef PAE 239 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 240 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 241 #endif 242 243 #ifdef SVS 244 pd_entry_t * ci_svs_updir; 245 paddr_t ci_svs_updirpa; 246 paddr_t ci_svs_kpdirpa; 247 kmutex_t ci_svs_mtx; 248 pd_entry_t * ci_svs_rsp0_pte; 249 vaddr_t ci_svs_rsp0; 250 vaddr_t ci_svs_ursp0; 251 vaddr_t ci_svs_krsp0; 252 vaddr_t ci_svs_utls; 253 #endif 254 255 #ifdef XEN 256 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 257 struct evcnt ci_ipi_events[XEN_NIPIS]; 258 evtchn_port_t ci_ipi_evtchn; 259 #if defined(XENPV) 260 #if defined(PAE) || defined(__x86_64__) 261 /* Currently active user PGD (can't use rcr3() with Xen) */ 262 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 263 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 264 kmutex_t ci_kpm_mtx; 265 #endif /* defined(PAE) || defined(__x86_64__) */ 266 267 #if defined(__x86_64__) 268 /* per-cpu version of normal_pdes */ 269 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XENPV */ 270 paddr_t ci_xen_current_user_pgd; 271 #endif /* defined(__x86_64__) */ 272 273 size_t ci_xpq_idx; 274 /* Xen raw system time at which we last ran hardclock. */ 275 uint64_t ci_xen_hardclock_systime_ns; 276 277 /* 278 * Last TSC-adjusted local Xen system time we observed. Used 279 * to detect whether the Xen clock has gone backwards. 280 */ 281 uint64_t ci_xen_last_systime_ns; 282 283 /* 284 * Distance in nanoseconds from the local view of system time 285 * to the global view of system time, if the local time is 286 * behind the global time. 287 */ 288 uint64_t ci_xen_systime_ns_skew; 289 290 /* Xen periodic timer interrupt handle. */ 291 struct intrhand *ci_xen_timer_intrhand; 292 293 /* 294 * Clockframe for timer interrupt handler. 295 * Saved at entry via event callback. 296 */ 297 vaddr_t ci_xen_clockf_pc; /* RIP at last event interrupt */ 298 bool ci_xen_clockf_usermode; /* Was the guest in usermode ? */ 299 300 /* Event counters for various pathologies that might happen. */ 301 struct evcnt ci_xen_cpu_tsc_backwards_evcnt; 302 struct evcnt ci_xen_tsc_delta_negative_evcnt; 303 struct evcnt ci_xen_raw_systime_wraparound_evcnt; 304 struct evcnt ci_xen_raw_systime_backwards_evcnt; 305 struct evcnt ci_xen_systime_backwards_hardclock_evcnt; 306 struct evcnt ci_xen_missed_hardclock_evcnt; 307 #endif /* XENPV */ 308 #else /* XEN */ 309 struct evcnt ci_ipi_events[X86_NIPI]; 310 #endif /* XEN */ 311 312 }; 313 314 /* 315 * Macros to handle (some) trapframe registers for common x86 code. 316 */ 317 #ifdef __x86_64__ 318 #define X86_TF_RAX(tf) tf->tf_rax 319 #define X86_TF_RDX(tf) tf->tf_rdx 320 #define X86_TF_RSP(tf) tf->tf_rsp 321 #define X86_TF_RIP(tf) tf->tf_rip 322 #define X86_TF_RFLAGS(tf) tf->tf_rflags 323 #else 324 #define X86_TF_RAX(tf) tf->tf_eax 325 #define X86_TF_RDX(tf) tf->tf_edx 326 #define X86_TF_RSP(tf) tf->tf_esp 327 #define X86_TF_RIP(tf) tf->tf_eip 328 #define X86_TF_RFLAGS(tf) tf->tf_eflags 329 #endif 330 331 /* 332 * Processor flag notes: The "primary" CPU has certain MI-defined 333 * roles (mostly relating to hardclock handling); we distinguish 334 * between the processor which booted us, and the processor currently 335 * holding the "primary" role just to give us the flexibility later to 336 * change primaries should we be sufficiently twisted. 337 */ 338 339 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 340 #define CPUF_AP 0x0002 /* CPU is an AP */ 341 #define CPUF_SP 0x0004 /* CPU is only processor */ 342 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 343 344 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 345 #define CPUF_PRESENT 0x1000 /* CPU is present */ 346 #define CPUF_RUNNING 0x2000 /* CPU is running */ 347 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 348 #define CPUF_GO 0x8000 /* CPU should start running */ 349 350 #endif /* _KERNEL || __KMEMUSER */ 351 352 #ifdef _KERNEL 353 /* 354 * We statically allocate the CPU info for the primary CPU (or, 355 * the only CPU on uniprocessors), and the primary CPU is the 356 * first CPU on the CPU info list. 357 */ 358 extern struct cpu_info cpu_info_primary; 359 extern struct cpu_info *cpu_info_list; 360 361 #define CPU_INFO_ITERATOR int __unused 362 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 363 ci != NULL; ci = ci->ci_next 364 365 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 366 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 367 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 368 369 #if !defined(__GNUC__) || defined(_MODULE) 370 /* For non-GCC and modules */ 371 struct cpu_info *x86_curcpu(void); 372 void cpu_set_curpri(int); 373 # ifdef __GNUC__ 374 lwp_t *x86_curlwp(void) __attribute__ ((const)); 375 # else 376 lwp_t *x86_curlwp(void); 377 # endif 378 #endif 379 380 #define cpu_number() (cpu_index(curcpu())) 381 382 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 383 384 #define X86_AST_GENERIC 0x01 385 #define X86_AST_PREEMPT 0x02 386 387 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 388 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 389 390 void cpu_boot_secondary_processors(void); 391 void cpu_init_idle_lwps(void); 392 void cpu_init_msrs(struct cpu_info *, bool); 393 void cpu_load_pmap(struct pmap *, struct pmap *); 394 void cpu_broadcast_halt(void); 395 void cpu_kick(struct cpu_info *); 396 397 void cpu_pcpuarea_init(struct cpu_info *); 398 void cpu_svs_init(struct cpu_info *); 399 void cpu_speculation_init(struct cpu_info *); 400 401 #define curcpu() x86_curcpu() 402 #define curlwp x86_curlwp() 403 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 404 405 /* 406 * Give a profiling tick to the current process when the user profiling 407 * buffer pages are invalid. On the i386, request an ast to send us 408 * through trap(), marking the proc as needing a profiling tick. 409 */ 410 extern void cpu_need_proftick(struct lwp *l); 411 412 /* 413 * Notify the LWP l that it has a signal pending, process as soon as 414 * possible. 415 */ 416 extern void cpu_signotify(struct lwp *); 417 418 /* 419 * We need a machine-independent name for this. 420 */ 421 extern void (*delay_func)(unsigned int); 422 struct timeval; 423 424 #ifndef __HIDE_DELAY 425 #define DELAY(x) (*delay_func)(x) 426 #define delay(x) (*delay_func)(x) 427 #endif 428 429 extern int biosbasemem; 430 extern int biosextmem; 431 extern int cputype; 432 extern int cpuid_level; 433 extern int cpu_class; 434 extern char cpu_brand_string[]; 435 extern int use_pae; 436 437 #ifdef __i386__ 438 #define i386_fpu_present 1 439 int npx586bug1(int, int); 440 extern int i386_fpu_fdivbug; 441 extern int i386_use_fxsave; 442 extern int i386_has_sse; 443 extern int i386_has_sse2; 444 #else 445 #define i386_fpu_present 1 446 #define i386_fpu_fdivbug 0 447 #define i386_use_fxsave 1 448 #define i386_has_sse 1 449 #define i386_has_sse2 1 450 #endif 451 452 extern int x86_fpu_save; 453 #define FPU_SAVE_FSAVE 0 454 #define FPU_SAVE_FXSAVE 1 455 #define FPU_SAVE_XSAVE 2 456 #define FPU_SAVE_XSAVEOPT 3 457 extern unsigned int x86_fpu_save_size; 458 extern uint64_t x86_xsave_features; 459 extern uint32_t x86_fpu_mxcsr_mask; 460 extern bool x86_fpu_eager; 461 462 extern void (*x86_cpu_idle)(void); 463 #define cpu_idle() (*x86_cpu_idle)() 464 465 /* machdep.c */ 466 #ifdef i386 467 void cpu_set_tss_gates(struct cpu_info *); 468 #endif 469 void cpu_reset(void); 470 471 /* longrun.c */ 472 u_int tmx86_get_longrun_mode(void); 473 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 474 void tmx86_init_longrun(void); 475 476 /* identcpu.c */ 477 void cpu_probe(struct cpu_info *); 478 void cpu_identify(struct cpu_info *); 479 void identify_hypervisor(void); 480 481 typedef enum vm_guest { 482 VM_GUEST_NO = 0, 483 VM_GUEST_VM, 484 VM_GUEST_XEN, 485 VM_GUEST_HV, 486 VM_GUEST_VMWARE, 487 VM_GUEST_KVM, 488 VM_LAST 489 } vm_guest_t; 490 extern vm_guest_t vm_guest; 491 492 /* cpu_topology.c */ 493 void x86_cpu_topology(struct cpu_info *); 494 495 /* locore.s */ 496 struct region_descriptor; 497 void lgdt(struct region_descriptor *); 498 #ifdef XENPV 499 void lgdt_finish(void); 500 #endif 501 502 struct pcb; 503 void savectx(struct pcb *); 504 void lwp_trampoline(void); 505 #ifdef XENPV 506 void startrtclock(void); 507 void xen_delay(unsigned int); 508 void xen_initclocks(void); 509 void xen_suspendclocks(struct cpu_info *); 510 void xen_resumeclocks(struct cpu_info *); 511 #else 512 /* clock.c */ 513 void initrtclock(u_long); 514 void startrtclock(void); 515 void i8254_delay(unsigned int); 516 void i8254_microtime(struct timeval *); 517 void i8254_initclocks(void); 518 #endif 519 520 /* cpu.c */ 521 void cpu_probe_features(struct cpu_info *); 522 523 /* vm_machdep.c */ 524 void cpu_proc_fork(struct proc *, struct proc *); 525 paddr_t kvtop(void *); 526 527 #ifdef USER_LDT 528 /* sys_machdep.h */ 529 int x86_get_ldt(struct lwp *, void *, register_t *); 530 int x86_set_ldt(struct lwp *, void *, register_t *); 531 #endif 532 533 /* isa_machdep.c */ 534 void isa_defaultirq(void); 535 int isa_nmi(void); 536 537 /* consinit.c */ 538 void kgdb_port_init(void); 539 540 /* bus_machdep.c */ 541 void x86_bus_space_init(void); 542 void x86_bus_space_mallocok(void); 543 544 #endif /* _KERNEL */ 545 546 #if defined(_KERNEL) || defined(_KMEMUSER) 547 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 548 #endif /* _KERNEL || __KMEMUSER */ 549 550 /* 551 * CTL_MACHDEP definitions. 552 */ 553 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 554 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 555 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 556 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 557 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 558 #define CPU_DISKINFO 6 /* struct disklist *: 559 * disk geometry information */ 560 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 561 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 562 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 563 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 564 #define CPU_TMLR_MODE 11 /* int: longrun mode 565 * 0: minimum frequency 566 * 1: economy 567 * 2: performance 568 * 3: maximum frequency 569 */ 570 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 571 #define CPU_TMLR_VOLTAGE 13 /* int: current voltage */ 572 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 573 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 574 * to use this, CPU_OSFXSR must be true 575 * 0: FSAVE 576 * 1: FXSAVE 577 * 2: XSAVE 578 * 3: XSAVEOPT 579 */ 580 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 581 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 582 583 /* 584 * Structure for CPU_DISKINFO sysctl call. 585 * XXX this should be somewhere else. 586 */ 587 #define MAX_BIOSDISKS 16 588 589 struct disklist { 590 int dl_nbiosdisks; /* number of bios disks */ 591 int dl_unused; 592 struct biosdisk_info { 593 int bi_dev; /* BIOS device # (0x80 ..) */ 594 int bi_cyl; /* cylinders on disk */ 595 int bi_head; /* heads per track */ 596 int bi_sec; /* sectors per track */ 597 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 598 #define BIFLAG_INVALID 0x01 599 #define BIFLAG_EXTINT13 0x02 600 int bi_flags; 601 int bi_unused; 602 } dl_biosdisks[MAX_BIOSDISKS]; 603 604 int dl_nnativedisks; /* number of native disks */ 605 struct nativedisk_info { 606 char ni_devname[16]; /* native device name */ 607 int ni_nmatches; /* # of matches w/ BIOS */ 608 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 609 } dl_nativedisks[1]; /* actually longer */ 610 }; 611 #endif /* !_X86_CPU_H_ */ 612
Indexes created Mon Sep 22 13:09:51 GMT 2025