cpu.h revision 1.113
1 /* $NetBSD: cpu.h,v 1.113 2019/11/23 19:40:37 ad Exp $ */ 2 3 /* 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #include "opt_svs.h" 51 #ifdef i386 52 #include "opt_user_ldt.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/include/public/xen.h> 73 #include <xen/include/public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 struct kcpuset; 80 81 #ifdef __x86_64__ 82 #define i386tss x86_64_tss 83 #endif 84 85 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 86 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 87 88 struct cpu_tss { 89 #ifdef i386 90 struct i386tss dblflt_tss; 91 struct i386tss ddbipi_tss; 92 #endif 93 struct i386tss tss; 94 uint8_t iomap[IOMAPSIZE]; 95 } __packed; 96 97 /* 98 * Arguments to hardclock, softclock and statclock 99 * encapsulate the previous machine state in an opaque 100 * clockframe; for now, use generic intrframe. 101 */ 102 struct clockframe { 103 struct intrframe cf_if; 104 }; 105 106 /* 107 * a bunch of this belongs in cpuvar.h; move it later.. 108 */ 109 110 struct cpu_info { 111 struct cpu_data ci_data; /* MI per-cpu data */ 112 device_t ci_dev; /* pointer to our device */ 113 struct cpu_info *ci_self; /* self-pointer */ 114 #ifdef XEN 115 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 116 #endif 117 118 /* 119 * Will be accessed by other CPUs. 120 */ 121 struct cpu_info *ci_next; /* next cpu */ 122 struct lwp *ci_curlwp; /* current owner of the processor */ 123 cpuid_t ci_cpuid; /* our CPU ID */ 124 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 125 uint32_t ci_initapicid; /* our initial APIC ID */ 126 127 /* 128 * Private members. 129 */ 130 struct pmap *ci_pmap; /* current pmap */ 131 int ci_want_pmapload; /* pmap_load() is needed */ 132 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 133 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 134 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 135 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 136 int ci_curldt; /* current LDT descriptor */ 137 int ci_nintrhand; /* number of H/W interrupt handlers */ 138 uint64_t ci_scratch; 139 uintptr_t ci_pmap_data[64 / sizeof(uintptr_t)]; 140 struct kcpuset *ci_tlb_cpuset; 141 142 #ifndef XENPV 143 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 144 #endif 145 #if defined(XEN) 146 struct intrsource *ci_xsources[NIPL]; 147 uint32_t ci_xmask[NIPL]; 148 uint32_t ci_xunmask[NIPL]; 149 uint32_t ci_xpending; /* XEN doesn't use the cmpxchg8 path */ 150 #endif 151 152 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 153 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 154 155 /* The following must be aligned for cmpxchg8b. */ 156 struct { 157 uint32_t ipending; 158 int ilevel; 159 } ci_istate __aligned(8); 160 #define ci_ipending ci_istate.ipending 161 #define ci_ilevel ci_istate.ilevel 162 int ci_idepth; 163 void * ci_intrstack; 164 uint32_t ci_imask[NIPL]; 165 uint32_t ci_iunmask[NIPL]; 166 167 uint32_t ci_flags; /* flags; see below */ 168 uint32_t ci_ipis; /* interprocessor interrupts pending */ 169 170 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 171 uint32_t ci_vendor[4]; /* vendor string */ 172 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 173 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 174 volatile uint32_t ci_lapic_counter; 175 176 uint32_t ci_feat_val[8]; /* X86 CPUID feature bits */ 177 /* [0] basic features cpuid.1:%edx 178 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 179 * [2] extended features cpuid:80000001:%edx 180 * [3] extended features cpuid:80000001:%ecx 181 * [4] VIA padlock features 182 * [5] structured extended features cpuid.7:%ebx 183 * [6] structured extended features cpuid.7:%ecx 184 * [7] structured extended features cpuid.7:%edx 185 */ 186 187 const struct cpu_functions *ci_func; /* start/stop functions */ 188 struct trapframe *ci_ddb_regs; 189 190 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 191 struct x86_cache_info ci_cinfo[CAI_COUNT]; 192 193 device_t ci_frequency; /* Frequency scaling technology */ 194 device_t ci_padlock; /* VIA PadLock private storage */ 195 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 196 device_t ci_vm; /* Virtual machine guest driver */ 197 198 /* 199 * Segmentation-related data. 200 */ 201 union descriptor *ci_gdt; 202 struct cpu_tss *ci_tss; /* Per-cpu TSSes; shared among LWPs */ 203 int ci_tss_sel; /* TSS selector of this cpu */ 204 205 /* 206 * The following two are actually region_descriptors, 207 * but that would pollute the namespace. 208 */ 209 uintptr_t ci_suspend_gdt; 210 uint16_t ci_suspend_gdt_padding; 211 uintptr_t ci_suspend_idt; 212 uint16_t ci_suspend_idt_padding; 213 214 uint16_t ci_suspend_tr; 215 uint16_t ci_suspend_ldt; 216 uintptr_t ci_suspend_fs; 217 uintptr_t ci_suspend_gs; 218 uintptr_t ci_suspend_kgs; 219 uintptr_t ci_suspend_efer; 220 uintptr_t ci_suspend_reg[12]; 221 uintptr_t ci_suspend_cr0; 222 uintptr_t ci_suspend_cr2; 223 uintptr_t ci_suspend_cr3; 224 uintptr_t ci_suspend_cr4; 225 uintptr_t ci_suspend_cr8; 226 227 /* The following must be in a single cache line. */ 228 int ci_want_resched __aligned(64); 229 int ci_padout __aligned(64); 230 231 #ifndef __HAVE_DIRECT_MAP 232 #define VPAGE_SRC 0 233 #define VPAGE_DST 1 234 #define VPAGE_ZER 2 235 #define VPAGE_PTP 3 236 #define VPAGE_MAX 4 237 vaddr_t vpage[VPAGE_MAX]; 238 pt_entry_t *vpage_pte[VPAGE_MAX]; 239 #endif 240 241 #ifdef PAE 242 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 243 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 244 #endif 245 246 #ifdef SVS 247 pd_entry_t * ci_svs_updir; 248 paddr_t ci_svs_updirpa; 249 int ci_svs_ldt_sel; 250 kmutex_t ci_svs_mtx; 251 pd_entry_t * ci_svs_rsp0_pte; 252 vaddr_t ci_svs_rsp0; 253 vaddr_t ci_svs_ursp0; 254 vaddr_t ci_svs_krsp0; 255 vaddr_t ci_svs_utls; 256 #endif 257 258 #ifdef XEN 259 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 260 struct evcnt ci_ipi_events[XEN_NIPIS]; 261 evtchn_port_t ci_ipi_evtchn; 262 #if defined(XENPV) 263 #if defined(PAE) || defined(__x86_64__) 264 /* Currently active user PGD (can't use rcr3() with Xen) */ 265 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 266 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 267 kmutex_t ci_kpm_mtx; 268 #endif /* defined(PAE) || defined(__x86_64__) */ 269 270 #if defined(__x86_64__) 271 /* per-cpu version of normal_pdes */ 272 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XENPV */ 273 paddr_t ci_xen_current_user_pgd; 274 #endif /* defined(__x86_64__) */ 275 276 size_t ci_xpq_idx; 277 #endif /* XENPV */ 278 279 /* Xen raw system time at which we last ran hardclock. */ 280 uint64_t ci_xen_hardclock_systime_ns; 281 282 /* 283 * Last TSC-adjusted local Xen system time we observed. Used 284 * to detect whether the Xen clock has gone backwards. 285 */ 286 uint64_t ci_xen_last_systime_ns; 287 288 /* 289 * Distance in nanoseconds from the local view of system time 290 * to the global view of system time, if the local time is 291 * behind the global time. 292 */ 293 uint64_t ci_xen_systime_ns_skew; 294 295 /* Xen periodic timer interrupt handle. */ 296 struct intrhand *ci_xen_timer_intrhand; 297 298 /* 299 * Clockframe for timer interrupt handler. 300 * Saved at entry via event callback. 301 */ 302 vaddr_t ci_xen_clockf_pc; /* RIP at last event interrupt */ 303 bool ci_xen_clockf_usermode; /* Was the guest in usermode ? */ 304 305 /* Event counters for various pathologies that might happen. */ 306 struct evcnt ci_xen_cpu_tsc_backwards_evcnt; 307 struct evcnt ci_xen_tsc_delta_negative_evcnt; 308 struct evcnt ci_xen_raw_systime_wraparound_evcnt; 309 struct evcnt ci_xen_raw_systime_backwards_evcnt; 310 struct evcnt ci_xen_systime_backwards_hardclock_evcnt; 311 struct evcnt ci_xen_missed_hardclock_evcnt; 312 #else /* XEN */ 313 struct evcnt ci_ipi_events[X86_NIPI]; 314 #endif /* XEN */ 315 316 }; 317 318 /* 319 * Macros to handle (some) trapframe registers for common x86 code. 320 */ 321 #ifdef __x86_64__ 322 #define X86_TF_RAX(tf) tf->tf_rax 323 #define X86_TF_RDX(tf) tf->tf_rdx 324 #define X86_TF_RSP(tf) tf->tf_rsp 325 #define X86_TF_RIP(tf) tf->tf_rip 326 #define X86_TF_RFLAGS(tf) tf->tf_rflags 327 #else 328 #define X86_TF_RAX(tf) tf->tf_eax 329 #define X86_TF_RDX(tf) tf->tf_edx 330 #define X86_TF_RSP(tf) tf->tf_esp 331 #define X86_TF_RIP(tf) tf->tf_eip 332 #define X86_TF_RFLAGS(tf) tf->tf_eflags 333 #endif 334 335 /* 336 * Processor flag notes: The "primary" CPU has certain MI-defined 337 * roles (mostly relating to hardclock handling); we distinguish 338 * between the processor which booted us, and the processor currently 339 * holding the "primary" role just to give us the flexibility later to 340 * change primaries should we be sufficiently twisted. 341 */ 342 343 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 344 #define CPUF_AP 0x0002 /* CPU is an AP */ 345 #define CPUF_SP 0x0004 /* CPU is only processor */ 346 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 347 348 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 349 #define CPUF_PRESENT 0x1000 /* CPU is present */ 350 #define CPUF_RUNNING 0x2000 /* CPU is running */ 351 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 352 #define CPUF_GO 0x8000 /* CPU should start running */ 353 354 #endif /* _KERNEL || __KMEMUSER */ 355 356 #ifdef _KERNEL 357 /* 358 * We statically allocate the CPU info for the primary CPU (or, 359 * the only CPU on uniprocessors), and the primary CPU is the 360 * first CPU on the CPU info list. 361 */ 362 extern struct cpu_info cpu_info_primary; 363 extern struct cpu_info *cpu_info_list; 364 365 #define CPU_INFO_ITERATOR int __unused 366 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 367 ci != NULL; ci = ci->ci_next 368 369 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 370 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 371 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 372 373 #if !defined(__GNUC__) || defined(_MODULE) 374 /* For non-GCC and modules */ 375 struct cpu_info *x86_curcpu(void); 376 # ifdef __GNUC__ 377 lwp_t *x86_curlwp(void) __attribute__ ((const)); 378 # else 379 lwp_t *x86_curlwp(void); 380 # endif 381 #endif 382 383 #define cpu_number() (cpu_index(curcpu())) 384 385 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 386 387 #define aston(l) ((l)->l_md.md_astpending = 1) 388 389 void cpu_boot_secondary_processors(void); 390 void cpu_init_idle_lwps(void); 391 void cpu_init_msrs(struct cpu_info *, bool); 392 void cpu_load_pmap(struct pmap *, struct pmap *); 393 void cpu_broadcast_halt(void); 394 void cpu_kick(struct cpu_info *); 395 396 void cpu_pcpuarea_init(struct cpu_info *); 397 void cpu_svs_init(struct cpu_info *); 398 void cpu_speculation_init(struct cpu_info *); 399 400 #define curcpu() x86_curcpu() 401 #define curlwp x86_curlwp() 402 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 403 404 /* 405 * Give a profiling tick to the current process when the user profiling 406 * buffer pages are invalid. On the i386, request an ast to send us 407 * through trap(), marking the proc as needing a profiling tick. 408 */ 409 extern void cpu_need_proftick(struct lwp *l); 410 411 /* 412 * Notify the LWP l that it has a signal pending, process as soon as 413 * possible. 414 */ 415 extern void cpu_signotify(struct lwp *); 416 417 /* 418 * We need a machine-independent name for this. 419 */ 420 extern void (*delay_func)(unsigned int); 421 struct timeval; 422 423 #ifndef __HIDE_DELAY 424 #define DELAY(x) (*delay_func)(x) 425 #define delay(x) (*delay_func)(x) 426 #endif 427 428 extern int biosbasemem; 429 extern int biosextmem; 430 extern int cputype; 431 extern int cpuid_level; 432 extern int cpu_class; 433 extern char cpu_brand_string[]; 434 extern int use_pae; 435 436 #ifdef __i386__ 437 #define i386_fpu_present 1 438 int npx586bug1(int, int); 439 extern int i386_fpu_fdivbug; 440 extern int i386_use_fxsave; 441 extern int i386_has_sse; 442 extern int i386_has_sse2; 443 #else 444 #define i386_fpu_present 1 445 #define i386_fpu_fdivbug 0 446 #define i386_use_fxsave 1 447 #define i386_has_sse 1 448 #define i386_has_sse2 1 449 #endif 450 451 extern int x86_fpu_save; 452 #define FPU_SAVE_FSAVE 0 453 #define FPU_SAVE_FXSAVE 1 454 #define FPU_SAVE_XSAVE 2 455 #define FPU_SAVE_XSAVEOPT 3 456 extern unsigned int x86_fpu_save_size; 457 extern uint64_t x86_xsave_features; 458 extern size_t x86_xsave_offsets[]; 459 extern size_t x86_xsave_sizes[]; 460 extern uint32_t x86_fpu_mxcsr_mask; 461 462 extern void (*x86_cpu_idle)(void); 463 #define cpu_idle() (*x86_cpu_idle)() 464 465 /* machdep.c */ 466 #ifdef i386 467 void cpu_set_tss_gates(struct cpu_info *); 468 #endif 469 void cpu_reset(void); 470 471 /* longrun.c */ 472 u_int tmx86_get_longrun_mode(void); 473 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 474 void tmx86_init_longrun(void); 475 476 /* identcpu.c */ 477 void cpu_probe(struct cpu_info *); 478 void cpu_identify(struct cpu_info *); 479 void identify_hypervisor(void); 480 481 typedef enum vm_guest { 482 VM_GUEST_NO = 0, 483 VM_GUEST_VM, 484 VM_GUEST_XEN, 485 VM_GUEST_XENPVHVM, 486 VM_GUEST_HV, 487 VM_GUEST_VMWARE, 488 VM_GUEST_KVM, 489 VM_LAST 490 } vm_guest_t; 491 extern vm_guest_t vm_guest; 492 493 /* cpu_topology.c */ 494 void x86_cpu_topology(struct cpu_info *); 495 496 /* locore.s */ 497 struct region_descriptor; 498 void lgdt(struct region_descriptor *); 499 #ifdef XENPV 500 void lgdt_finish(void); 501 #endif 502 503 struct pcb; 504 void savectx(struct pcb *); 505 void lwp_trampoline(void); 506 #ifdef XEN 507 void xen_startrtclock(void); 508 void xen_delay(unsigned int); 509 void xen_initclocks(void); 510 void xen_suspendclocks(struct cpu_info *); 511 void xen_resumeclocks(struct cpu_info *); 512 #endif /* XEN */ 513 /* clock.c */ 514 void initrtclock(u_long); 515 void startrtclock(void); 516 void i8254_delay(unsigned int); 517 void i8254_microtime(struct timeval *); 518 void i8254_initclocks(void); 519 unsigned int gettick(void); 520 extern void (*x86_delay)(unsigned int); 521 522 /* cpu.c */ 523 void cpu_probe_features(struct cpu_info *); 524 525 /* vm_machdep.c */ 526 void cpu_proc_fork(struct proc *, struct proc *); 527 paddr_t kvtop(void *); 528 529 #ifdef USER_LDT 530 /* sys_machdep.h */ 531 int x86_get_ldt(struct lwp *, void *, register_t *); 532 int x86_set_ldt(struct lwp *, void *, register_t *); 533 #endif 534 535 /* isa_machdep.c */ 536 void isa_defaultirq(void); 537 int isa_nmi(void); 538 539 /* consinit.c */ 540 void kgdb_port_init(void); 541 542 /* bus_machdep.c */ 543 void x86_bus_space_init(void); 544 void x86_bus_space_mallocok(void); 545 546 #endif /* _KERNEL */ 547 548 #if defined(_KERNEL) || defined(_KMEMUSER) 549 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 550 #endif /* _KERNEL || __KMEMUSER */ 551 552 /* 553 * CTL_MACHDEP definitions. 554 */ 555 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 556 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 557 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 558 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 559 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 560 #define CPU_DISKINFO 6 /* struct disklist *: 561 * disk geometry information */ 562 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 563 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 564 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 565 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 566 #define CPU_TMLR_MODE 11 /* int: longrun mode 567 * 0: minimum frequency 568 * 1: economy 569 * 2: performance 570 * 3: maximum frequency 571 */ 572 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 573 #define CPU_TMLR_VOLTAGE 13 /* int: current voltage */ 574 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 575 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 576 * to use this, CPU_OSFXSR must be true 577 * 0: FSAVE 578 * 1: FXSAVE 579 * 2: XSAVE 580 * 3: XSAVEOPT 581 */ 582 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 583 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 584 585 /* 586 * Structure for CPU_DISKINFO sysctl call. 587 * XXX this should be somewhere else. 588 */ 589 #define MAX_BIOSDISKS 16 590 591 struct disklist { 592 int dl_nbiosdisks; /* number of bios disks */ 593 int dl_unused; 594 struct biosdisk_info { 595 int bi_dev; /* BIOS device # (0x80 ..) */ 596 int bi_cyl; /* cylinders on disk */ 597 int bi_head; /* heads per track */ 598 int bi_sec; /* sectors per track */ 599 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 600 #define BIFLAG_INVALID 0x01 601 #define BIFLAG_EXTINT13 0x02 602 int bi_flags; 603 int bi_unused; 604 } dl_biosdisks[MAX_BIOSDISKS]; 605 606 int dl_nnativedisks; /* number of native disks */ 607 struct nativedisk_info { 608 char ni_devname[16]; /* native device name */ 609 int ni_nmatches; /* # of matches w/ BIOS */ 610 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 611 } dl_nativedisks[1]; /* actually longer */ 612 }; 613 #endif /* !_X86_CPU_H_ */ 614
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