cpu.h revision 1.122
1 /* $NetBSD: cpu.h,v 1.122 2020/04/25 15:26:18 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #include "opt_svs.h" 51 #ifdef i386 52 #include "opt_user_ldt.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/include/public/xen.h> 73 #include <xen/include/public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 struct kcpuset; 80 81 #ifdef __x86_64__ 82 #define i386tss x86_64_tss 83 #endif 84 85 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 86 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 87 88 struct cpu_tss { 89 #ifdef i386 90 struct i386tss dblflt_tss; 91 struct i386tss ddbipi_tss; 92 #endif 93 struct i386tss tss; 94 uint8_t iomap[IOMAPSIZE]; 95 } __packed; 96 97 /* 98 * Arguments to hardclock, softclock and statclock 99 * encapsulate the previous machine state in an opaque 100 * clockframe; for now, use generic intrframe. 101 */ 102 struct clockframe { 103 struct intrframe cf_if; 104 }; 105 106 /* 107 * a bunch of this belongs in cpuvar.h; move it later.. 108 */ 109 110 struct cpu_info { 111 struct cpu_data ci_data; /* MI per-cpu data */ 112 device_t ci_dev; /* pointer to our device */ 113 struct cpu_info *ci_self; /* self-pointer */ 114 #ifdef XEN 115 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 116 #endif 117 118 /* 119 * Private members. 120 */ 121 struct pmap *ci_pmap; /* current pmap */ 122 int ci_want_pmapload; /* pmap_load() is needed */ 123 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 124 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 125 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 126 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 127 int ci_curldt; /* current LDT descriptor */ 128 int ci_nintrhand; /* number of H/W interrupt handlers */ 129 uint64_t ci_scratch; 130 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 131 struct kcpuset *ci_tlb_cpuset; 132 133 int ci_kfpu_spl; 134 135 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 136 137 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 138 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 139 140 /* The following must be aligned for cmpxchg8b. */ 141 struct { 142 uint32_t ipending; 143 int ilevel; 144 uint32_t imasked; 145 } ci_istate __aligned(8); 146 #define ci_ipending ci_istate.ipending 147 #define ci_ilevel ci_istate.ilevel 148 #define ci_imasked ci_istate.imasked 149 int ci_idepth; 150 void * ci_intrstack; 151 uint32_t ci_imask[NIPL]; 152 uint32_t ci_iunmask[NIPL]; 153 154 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 155 uint32_t ci_vendor[4]; /* vendor string */ 156 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 157 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 158 volatile uint32_t ci_lapic_counter; 159 160 uint32_t ci_feat_val[8]; /* X86 CPUID feature bits */ 161 /* [0] basic features cpuid.1:%edx 162 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 163 * [2] extended features cpuid:80000001:%edx 164 * [3] extended features cpuid:80000001:%ecx 165 * [4] VIA padlock features 166 * [5] structured extended features cpuid.7:%ebx 167 * [6] structured extended features cpuid.7:%ecx 168 * [7] structured extended features cpuid.7:%edx 169 */ 170 171 const struct cpu_functions *ci_func; /* start/stop functions */ 172 struct trapframe *ci_ddb_regs; 173 174 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 175 struct x86_cache_info ci_cinfo[CAI_COUNT]; 176 177 device_t ci_frequency; /* Frequency scaling technology */ 178 device_t ci_padlock; /* VIA PadLock private storage */ 179 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 180 device_t ci_vm; /* Virtual machine guest driver */ 181 182 /* 183 * Segmentation-related data. 184 */ 185 union descriptor *ci_gdt; 186 struct cpu_tss *ci_tss; /* Per-cpu TSSes; shared among LWPs */ 187 int ci_tss_sel; /* TSS selector of this cpu */ 188 189 /* 190 * The following two are actually region_descriptors, 191 * but that would pollute the namespace. 192 */ 193 uintptr_t ci_suspend_gdt; 194 uint16_t ci_suspend_gdt_padding; 195 uintptr_t ci_suspend_idt; 196 uint16_t ci_suspend_idt_padding; 197 198 uint16_t ci_suspend_tr; 199 uint16_t ci_suspend_ldt; 200 uintptr_t ci_suspend_fs; 201 uintptr_t ci_suspend_gs; 202 uintptr_t ci_suspend_kgs; 203 uintptr_t ci_suspend_efer; 204 uintptr_t ci_suspend_reg[12]; 205 uintptr_t ci_suspend_cr0; 206 uintptr_t ci_suspend_cr2; 207 uintptr_t ci_suspend_cr3; 208 uintptr_t ci_suspend_cr4; 209 uintptr_t ci_suspend_cr8; 210 211 /* 212 * The following must be in their own cache line, as they are 213 * stored to regularly by remote CPUs; when they were mixed with 214 * other fields we observed frequent cache misses. 215 */ 216 int ci_want_resched __aligned(64); 217 uint32_t ci_ipis; /* interprocessor interrupts pending */ 218 219 /* 220 * These are largely static, and will be frequently fetched by other 221 * CPUs. For that reason they get their own cache line, too. 222 */ 223 uint32_t ci_flags __aligned(64);/* general flags */ 224 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 225 uint32_t ci_initapicid; /* our initial APIC ID */ 226 uint32_t ci_vcpuid; /* our CPU id for hypervisor */ 227 cpuid_t ci_cpuid; /* our CPU ID */ 228 struct cpu_info *ci_next; /* next cpu */ 229 230 /* 231 * This is stored frequently, and is fetched by remote CPUs. 232 */ 233 struct lwp *ci_curlwp __aligned(64);/* general flags */ 234 struct lwp *ci_onproc; /* current user LWP / kthread */ 235 236 /* Here ends the cachline-aligned sections. */ 237 int ci_padout __aligned(64); 238 239 #ifndef __HAVE_DIRECT_MAP 240 #define VPAGE_SRC 0 241 #define VPAGE_DST 1 242 #define VPAGE_ZER 2 243 #define VPAGE_PTP 3 244 #define VPAGE_MAX 4 245 vaddr_t vpage[VPAGE_MAX]; 246 pt_entry_t *vpage_pte[VPAGE_MAX]; 247 #endif 248 249 #ifdef PAE 250 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 251 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 252 #endif 253 254 #ifdef SVS 255 pd_entry_t * ci_svs_updir; 256 paddr_t ci_svs_updirpa; 257 int ci_svs_ldt_sel; 258 kmutex_t ci_svs_mtx; 259 pd_entry_t * ci_svs_rsp0_pte; 260 vaddr_t ci_svs_rsp0; 261 vaddr_t ci_svs_ursp0; 262 vaddr_t ci_svs_krsp0; 263 vaddr_t ci_svs_utls; 264 #endif 265 266 #ifndef XENPV 267 struct evcnt ci_ipi_events[X86_NIPI]; 268 #else 269 struct evcnt ci_ipi_events[XEN_NIPIS]; 270 #endif 271 #ifdef XEN 272 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 273 evtchn_port_t ci_ipi_evtchn; 274 #if defined(XENPV) 275 #if defined(PAE) || defined(__x86_64__) 276 /* Currently active user PGD (can't use rcr3() with Xen) */ 277 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 278 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 279 kmutex_t ci_kpm_mtx; 280 #endif /* defined(PAE) || defined(__x86_64__) */ 281 282 #if defined(__x86_64__) 283 /* per-cpu version of normal_pdes */ 284 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XENPV */ 285 paddr_t ci_xen_current_user_pgd; 286 #endif /* defined(__x86_64__) */ 287 288 size_t ci_xpq_idx; 289 #endif /* XENPV */ 290 291 /* Xen raw system time at which we last ran hardclock. */ 292 uint64_t ci_xen_hardclock_systime_ns; 293 294 /* 295 * Last TSC-adjusted local Xen system time we observed. Used 296 * to detect whether the Xen clock has gone backwards. 297 */ 298 uint64_t ci_xen_last_systime_ns; 299 300 /* 301 * Distance in nanoseconds from the local view of system time 302 * to the global view of system time, if the local time is 303 * behind the global time. 304 */ 305 uint64_t ci_xen_systime_ns_skew; 306 307 /* 308 * Clockframe for timer interrupt handler. 309 * Saved at entry via event callback. 310 */ 311 vaddr_t ci_xen_clockf_pc; /* RIP at last event interrupt */ 312 bool ci_xen_clockf_usermode; /* Was the guest in usermode ? */ 313 314 /* Event counters for various pathologies that might happen. */ 315 struct evcnt ci_xen_cpu_tsc_backwards_evcnt; 316 struct evcnt ci_xen_tsc_delta_negative_evcnt; 317 struct evcnt ci_xen_raw_systime_wraparound_evcnt; 318 struct evcnt ci_xen_raw_systime_backwards_evcnt; 319 struct evcnt ci_xen_systime_backwards_hardclock_evcnt; 320 struct evcnt ci_xen_missed_hardclock_evcnt; 321 #endif /* XEN */ 322 }; 323 #ifndef XENPV 324 __CTASSERT(XEN_NIPIS <= X86_NIPI); 325 #endif 326 327 /* 328 * Macros to handle (some) trapframe registers for common x86 code. 329 */ 330 #ifdef __x86_64__ 331 #define X86_TF_RAX(tf) tf->tf_rax 332 #define X86_TF_RDX(tf) tf->tf_rdx 333 #define X86_TF_RSP(tf) tf->tf_rsp 334 #define X86_TF_RIP(tf) tf->tf_rip 335 #define X86_TF_RFLAGS(tf) tf->tf_rflags 336 #else 337 #define X86_TF_RAX(tf) tf->tf_eax 338 #define X86_TF_RDX(tf) tf->tf_edx 339 #define X86_TF_RSP(tf) tf->tf_esp 340 #define X86_TF_RIP(tf) tf->tf_eip 341 #define X86_TF_RFLAGS(tf) tf->tf_eflags 342 #endif 343 344 /* 345 * Processor flag notes: The "primary" CPU has certain MI-defined 346 * roles (mostly relating to hardclock handling); we distinguish 347 * between the processor which booted us, and the processor currently 348 * holding the "primary" role just to give us the flexibility later to 349 * change primaries should we be sufficiently twisted. 350 */ 351 352 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 353 #define CPUF_AP 0x0002 /* CPU is an AP */ 354 #define CPUF_SP 0x0004 /* CPU is only processor */ 355 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 356 357 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 358 #define CPUF_PRESENT 0x1000 /* CPU is present */ 359 #define CPUF_RUNNING 0x2000 /* CPU is running */ 360 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 361 #define CPUF_GO 0x8000 /* CPU should start running */ 362 363 #endif /* _KERNEL || __KMEMUSER */ 364 365 #ifdef _KERNEL 366 /* 367 * We statically allocate the CPU info for the primary CPU (or, 368 * the only CPU on uniprocessors), and the primary CPU is the 369 * first CPU on the CPU info list. 370 */ 371 extern struct cpu_info cpu_info_primary; 372 extern struct cpu_info *cpu_info_list; 373 374 #define CPU_INFO_ITERATOR int __unused 375 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 376 ci != NULL; ci = ci->ci_next 377 378 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 379 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 380 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 381 382 #if !defined(__GNUC__) || defined(_MODULE) 383 /* For non-GCC and modules */ 384 struct cpu_info *x86_curcpu(void); 385 # ifdef __GNUC__ 386 lwp_t *x86_curlwp(void) __attribute__ ((const)); 387 # else 388 lwp_t *x86_curlwp(void); 389 # endif 390 #endif 391 392 #define cpu_number() (cpu_index(curcpu())) 393 394 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 395 396 #define aston(l) ((l)->l_md.md_astpending = 1) 397 398 void cpu_boot_secondary_processors(void); 399 void cpu_init_idle_lwps(void); 400 void cpu_init_msrs(struct cpu_info *, bool); 401 void cpu_load_pmap(struct pmap *, struct pmap *); 402 void cpu_broadcast_halt(void); 403 void cpu_kick(struct cpu_info *); 404 405 void cpu_pcpuarea_init(struct cpu_info *); 406 void cpu_svs_init(struct cpu_info *); 407 void cpu_speculation_init(struct cpu_info *); 408 409 #define curcpu() x86_curcpu() 410 #define curlwp x86_curlwp() 411 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 412 413 /* 414 * Give a profiling tick to the current process when the user profiling 415 * buffer pages are invalid. On the i386, request an ast to send us 416 * through trap(), marking the proc as needing a profiling tick. 417 */ 418 extern void cpu_need_proftick(struct lwp *l); 419 420 /* 421 * Notify the LWP l that it has a signal pending, process as soon as 422 * possible. 423 */ 424 extern void cpu_signotify(struct lwp *); 425 426 /* 427 * We need a machine-independent name for this. 428 */ 429 extern void (*delay_func)(unsigned int); 430 struct timeval; 431 432 #ifndef __HIDE_DELAY 433 #define DELAY(x) (*delay_func)(x) 434 #define delay(x) (*delay_func)(x) 435 #endif 436 437 extern int biosbasemem; 438 extern int biosextmem; 439 extern int cputype; 440 extern int cpuid_level; 441 extern int cpu_class; 442 extern char cpu_brand_string[]; 443 extern int use_pae; 444 445 #ifdef __i386__ 446 #define i386_fpu_present 1 447 int npx586bug1(int, int); 448 extern int i386_fpu_fdivbug; 449 extern int i386_use_fxsave; 450 extern int i386_has_sse; 451 extern int i386_has_sse2; 452 #else 453 #define i386_fpu_present 1 454 #define i386_fpu_fdivbug 0 455 #define i386_use_fxsave 1 456 #define i386_has_sse 1 457 #define i386_has_sse2 1 458 #endif 459 460 extern int x86_fpu_save; 461 #define FPU_SAVE_FSAVE 0 462 #define FPU_SAVE_FXSAVE 1 463 #define FPU_SAVE_XSAVE 2 464 #define FPU_SAVE_XSAVEOPT 3 465 extern unsigned int x86_fpu_save_size; 466 extern uint64_t x86_xsave_features; 467 extern size_t x86_xsave_offsets[]; 468 extern size_t x86_xsave_sizes[]; 469 extern uint32_t x86_fpu_mxcsr_mask; 470 471 extern void (*x86_cpu_idle)(void); 472 #define cpu_idle() (*x86_cpu_idle)() 473 474 /* machdep.c */ 475 #ifdef i386 476 void cpu_set_tss_gates(struct cpu_info *); 477 #endif 478 void cpu_reset(void); 479 480 /* longrun.c */ 481 u_int tmx86_get_longrun_mode(void); 482 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 483 void tmx86_init_longrun(void); 484 485 /* identcpu.c */ 486 void cpu_probe(struct cpu_info *); 487 void cpu_identify(struct cpu_info *); 488 void identify_hypervisor(void); 489 490 /* identcpu_subr.c */ 491 uint64_t cpu_tsc_freq_cpuid(struct cpu_info *); 492 493 typedef enum vm_guest { 494 VM_GUEST_NO = 0, 495 VM_GUEST_VM, 496 VM_GUEST_XENPV, 497 VM_GUEST_XENPVH, 498 VM_GUEST_XENHVM, 499 VM_GUEST_XENPVHVM, 500 VM_GUEST_HV, 501 VM_GUEST_VMWARE, 502 VM_GUEST_KVM, 503 VM_LAST 504 } vm_guest_t; 505 extern vm_guest_t vm_guest; 506 507 static __inline bool __unused 508 vm_guest_is_xenpv(void) 509 { 510 switch(vm_guest) { 511 case VM_GUEST_XENPV: 512 case VM_GUEST_XENPVH: 513 case VM_GUEST_XENPVHVM: 514 return true; 515 default: 516 return false; 517 } 518 } 519 520 /* cpu_topology.c */ 521 void x86_cpu_topology(struct cpu_info *); 522 523 /* locore.s */ 524 struct region_descriptor; 525 void lgdt(struct region_descriptor *); 526 #ifdef XENPV 527 void lgdt_finish(void); 528 #endif 529 530 struct pcb; 531 void savectx(struct pcb *); 532 void lwp_trampoline(void); 533 #ifdef XEN 534 void xen_startrtclock(void); 535 void xen_delay(unsigned int); 536 void xen_initclocks(void); 537 void xen_cpu_initclocks(void); 538 void xen_suspendclocks(struct cpu_info *); 539 void xen_resumeclocks(struct cpu_info *); 540 #endif /* XEN */ 541 /* clock.c */ 542 void initrtclock(u_long); 543 void startrtclock(void); 544 void i8254_delay(unsigned int); 545 void i8254_microtime(struct timeval *); 546 void i8254_initclocks(void); 547 unsigned int gettick(void); 548 extern void (*x86_delay)(unsigned int); 549 550 /* cpu.c */ 551 void cpu_probe_features(struct cpu_info *); 552 553 /* vm_machdep.c */ 554 void cpu_proc_fork(struct proc *, struct proc *); 555 paddr_t kvtop(void *); 556 557 #ifdef USER_LDT 558 /* sys_machdep.h */ 559 int x86_get_ldt(struct lwp *, void *, register_t *); 560 int x86_set_ldt(struct lwp *, void *, register_t *); 561 #endif 562 563 /* isa_machdep.c */ 564 void isa_defaultirq(void); 565 int isa_nmi(void); 566 567 /* consinit.c */ 568 void kgdb_port_init(void); 569 570 /* bus_machdep.c */ 571 void x86_bus_space_init(void); 572 void x86_bus_space_mallocok(void); 573 574 #endif /* _KERNEL */ 575 576 #if defined(_KERNEL) || defined(_KMEMUSER) 577 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 578 #endif /* _KERNEL || __KMEMUSER */ 579 580 /* 581 * CTL_MACHDEP definitions. 582 */ 583 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 584 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 585 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 586 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 587 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 588 #define CPU_DISKINFO 6 /* struct disklist *: 589 * disk geometry information */ 590 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 591 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 592 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 593 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 594 #define CPU_TMLR_MODE 11 /* int: longrun mode 595 * 0: minimum frequency 596 * 1: economy 597 * 2: performance 598 * 3: maximum frequency 599 */ 600 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 601 #define CPU_TMLR_VOLTAGE 13 /* int: current voltage */ 602 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 603 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 604 * to use this, CPU_OSFXSR must be true 605 * 0: FSAVE 606 * 1: FXSAVE 607 * 2: XSAVE 608 * 3: XSAVEOPT 609 */ 610 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 611 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 612 613 /* 614 * Structure for CPU_DISKINFO sysctl call. 615 * XXX this should be somewhere else. 616 */ 617 #define MAX_BIOSDISKS 16 618 619 struct disklist { 620 int dl_nbiosdisks; /* number of bios disks */ 621 int dl_unused; 622 struct biosdisk_info { 623 int bi_dev; /* BIOS device # (0x80 ..) */ 624 int bi_cyl; /* cylinders on disk */ 625 int bi_head; /* heads per track */ 626 int bi_sec; /* sectors per track */ 627 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 628 #define BIFLAG_INVALID 0x01 629 #define BIFLAG_EXTINT13 0x02 630 int bi_flags; 631 int bi_unused; 632 } dl_biosdisks[MAX_BIOSDISKS]; 633 634 int dl_nnativedisks; /* number of native disks */ 635 struct nativedisk_info { 636 char ni_devname[16]; /* native device name */ 637 int ni_nmatches; /* # of matches w/ BIOS */ 638 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 639 } dl_nativedisks[1]; /* actually longer */ 640 }; 641 #endif /* !_X86_CPU_H_ */ 642
Indexes created Thu Sep 25 16:09:42 GMT 2025