cpu.h revision 1.123
1 /* $NetBSD: cpu.h,v 1.123 2020/04/27 16:29:17 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #include "opt_svs.h" 51 #ifdef i386 52 #include "opt_user_ldt.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/include/public/xen.h> 73 #include <xen/include/public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 struct kcpuset; 80 81 #ifdef __x86_64__ 82 #define i386tss x86_64_tss 83 #endif 84 85 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 86 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 87 88 struct cpu_tss { 89 #ifdef i386 90 struct i386tss dblflt_tss; 91 struct i386tss ddbipi_tss; 92 #endif 93 struct i386tss tss; 94 uint8_t iomap[IOMAPSIZE]; 95 } __packed; 96 97 /* 98 * Arguments to hardclock, softclock and statclock 99 * encapsulate the previous machine state in an opaque 100 * clockframe; for now, use generic intrframe. 101 */ 102 struct clockframe { 103 struct intrframe cf_if; 104 }; 105 106 /* 107 * a bunch of this belongs in cpuvar.h; move it later.. 108 */ 109 110 struct cpu_info { 111 struct cpu_data ci_data; /* MI per-cpu data */ 112 device_t ci_dev; /* pointer to our device */ 113 struct cpu_info *ci_self; /* self-pointer */ 114 115 /* 116 * Private members. 117 */ 118 struct pmap *ci_pmap; /* current pmap */ 119 int ci_want_pmapload; /* pmap_load() is needed */ 120 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 121 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 122 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 123 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 124 int ci_curldt; /* current LDT descriptor */ 125 int ci_nintrhand; /* number of H/W interrupt handlers */ 126 uint64_t ci_scratch; 127 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 128 struct kcpuset *ci_tlb_cpuset; 129 130 int ci_kfpu_spl; 131 132 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 133 134 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 135 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 136 137 /* The following must be aligned for cmpxchg8b. */ 138 struct { 139 uint32_t ipending; 140 int ilevel; 141 uint32_t imasked; 142 } ci_istate __aligned(8); 143 #define ci_ipending ci_istate.ipending 144 #define ci_ilevel ci_istate.ilevel 145 #define ci_imasked ci_istate.imasked 146 int ci_idepth; 147 void * ci_intrstack; 148 uint32_t ci_imask[NIPL]; 149 uint32_t ci_iunmask[NIPL]; 150 151 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 152 uint32_t ci_vendor[4]; /* vendor string */ 153 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 154 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 155 volatile uint32_t ci_lapic_counter; 156 157 uint32_t ci_feat_val[8]; /* X86 CPUID feature bits */ 158 /* [0] basic features cpuid.1:%edx 159 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 160 * [2] extended features cpuid:80000001:%edx 161 * [3] extended features cpuid:80000001:%ecx 162 * [4] VIA padlock features 163 * [5] structured extended features cpuid.7:%ebx 164 * [6] structured extended features cpuid.7:%ecx 165 * [7] structured extended features cpuid.7:%edx 166 */ 167 168 const struct cpu_functions *ci_func; /* start/stop functions */ 169 struct trapframe *ci_ddb_regs; 170 171 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 172 struct x86_cache_info ci_cinfo[CAI_COUNT]; 173 174 device_t ci_frequency; /* Frequency scaling technology */ 175 device_t ci_padlock; /* VIA PadLock private storage */ 176 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 177 device_t ci_vm; /* Virtual machine guest driver */ 178 179 /* 180 * Segmentation-related data. 181 */ 182 union descriptor *ci_gdt; 183 struct cpu_tss *ci_tss; /* Per-cpu TSSes; shared among LWPs */ 184 int ci_tss_sel; /* TSS selector of this cpu */ 185 186 /* 187 * The following two are actually region_descriptors, 188 * but that would pollute the namespace. 189 */ 190 uintptr_t ci_suspend_gdt; 191 uint16_t ci_suspend_gdt_padding; 192 uintptr_t ci_suspend_idt; 193 uint16_t ci_suspend_idt_padding; 194 195 uint16_t ci_suspend_tr; 196 uint16_t ci_suspend_ldt; 197 uintptr_t ci_suspend_fs; 198 uintptr_t ci_suspend_gs; 199 uintptr_t ci_suspend_kgs; 200 uintptr_t ci_suspend_efer; 201 uintptr_t ci_suspend_reg[12]; 202 uintptr_t ci_suspend_cr0; 203 uintptr_t ci_suspend_cr2; 204 uintptr_t ci_suspend_cr3; 205 uintptr_t ci_suspend_cr4; 206 uintptr_t ci_suspend_cr8; 207 208 /* 209 * The following must be in their own cache line, as they are 210 * stored to regularly by remote CPUs; when they were mixed with 211 * other fields we observed frequent cache misses. 212 */ 213 int ci_want_resched __aligned(64); 214 uint32_t ci_ipis; /* interprocessor interrupts pending */ 215 216 /* 217 * These are largely static, and will be frequently fetched by other 218 * CPUs. For that reason they get their own cache line, too. 219 */ 220 uint32_t ci_flags __aligned(64);/* general flags */ 221 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 222 uint32_t ci_initapicid; /* our initial APIC ID */ 223 uint32_t ci_vcpuid; /* our CPU id for hypervisor */ 224 cpuid_t ci_cpuid; /* our CPU ID */ 225 struct cpu_info *ci_next; /* next cpu */ 226 227 /* 228 * This is stored frequently, and is fetched by remote CPUs. 229 */ 230 struct lwp *ci_curlwp __aligned(64);/* general flags */ 231 struct lwp *ci_onproc; /* current user LWP / kthread */ 232 233 /* Here ends the cachline-aligned sections. */ 234 int ci_padout __aligned(64); 235 236 #ifndef __HAVE_DIRECT_MAP 237 #define VPAGE_SRC 0 238 #define VPAGE_DST 1 239 #define VPAGE_ZER 2 240 #define VPAGE_PTP 3 241 #define VPAGE_MAX 4 242 vaddr_t vpage[VPAGE_MAX]; 243 pt_entry_t *vpage_pte[VPAGE_MAX]; 244 #endif 245 246 #ifdef PAE 247 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 248 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 249 #endif 250 251 #ifdef SVS 252 pd_entry_t * ci_svs_updir; 253 paddr_t ci_svs_updirpa; 254 int ci_svs_ldt_sel; 255 kmutex_t ci_svs_mtx; 256 pd_entry_t * ci_svs_rsp0_pte; 257 vaddr_t ci_svs_rsp0; 258 vaddr_t ci_svs_ursp0; 259 vaddr_t ci_svs_krsp0; 260 vaddr_t ci_svs_utls; 261 #endif 262 263 #ifndef XENPV 264 struct evcnt ci_ipi_events[X86_NIPI]; 265 #else 266 struct evcnt ci_ipi_events[XEN_NIPIS]; 267 #endif 268 #ifdef XEN 269 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 270 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 271 evtchn_port_t ci_ipi_evtchn; 272 #if defined(XENPV) 273 #if defined(PAE) || defined(__x86_64__) 274 /* Currently active user PGD (can't use rcr3() with Xen) */ 275 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 276 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 277 kmutex_t ci_kpm_mtx; 278 #endif /* defined(PAE) || defined(__x86_64__) */ 279 280 #if defined(__x86_64__) 281 /* per-cpu version of normal_pdes */ 282 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XENPV */ 283 paddr_t ci_xen_current_user_pgd; 284 #endif /* defined(__x86_64__) */ 285 286 size_t ci_xpq_idx; 287 #endif /* XENPV */ 288 289 /* Xen raw system time at which we last ran hardclock. */ 290 uint64_t ci_xen_hardclock_systime_ns; 291 292 /* 293 * Last TSC-adjusted local Xen system time we observed. Used 294 * to detect whether the Xen clock has gone backwards. 295 */ 296 uint64_t ci_xen_last_systime_ns; 297 298 /* 299 * Distance in nanoseconds from the local view of system time 300 * to the global view of system time, if the local time is 301 * behind the global time. 302 */ 303 uint64_t ci_xen_systime_ns_skew; 304 305 /* 306 * Clockframe for timer interrupt handler. 307 * Saved at entry via event callback. 308 */ 309 vaddr_t ci_xen_clockf_pc; /* RIP at last event interrupt */ 310 bool ci_xen_clockf_usermode; /* Was the guest in usermode ? */ 311 312 /* Event counters for various pathologies that might happen. */ 313 struct evcnt ci_xen_cpu_tsc_backwards_evcnt; 314 struct evcnt ci_xen_tsc_delta_negative_evcnt; 315 struct evcnt ci_xen_raw_systime_wraparound_evcnt; 316 struct evcnt ci_xen_raw_systime_backwards_evcnt; 317 struct evcnt ci_xen_systime_backwards_hardclock_evcnt; 318 struct evcnt ci_xen_missed_hardclock_evcnt; 319 #endif /* XEN */ 320 }; 321 #ifndef XENPV 322 __CTASSERT(XEN_NIPIS <= X86_NIPI); 323 #endif 324 325 /* 326 * Macros to handle (some) trapframe registers for common x86 code. 327 */ 328 #ifdef __x86_64__ 329 #define X86_TF_RAX(tf) tf->tf_rax 330 #define X86_TF_RDX(tf) tf->tf_rdx 331 #define X86_TF_RSP(tf) tf->tf_rsp 332 #define X86_TF_RIP(tf) tf->tf_rip 333 #define X86_TF_RFLAGS(tf) tf->tf_rflags 334 #else 335 #define X86_TF_RAX(tf) tf->tf_eax 336 #define X86_TF_RDX(tf) tf->tf_edx 337 #define X86_TF_RSP(tf) tf->tf_esp 338 #define X86_TF_RIP(tf) tf->tf_eip 339 #define X86_TF_RFLAGS(tf) tf->tf_eflags 340 #endif 341 342 /* 343 * Processor flag notes: The "primary" CPU has certain MI-defined 344 * roles (mostly relating to hardclock handling); we distinguish 345 * between the processor which booted us, and the processor currently 346 * holding the "primary" role just to give us the flexibility later to 347 * change primaries should we be sufficiently twisted. 348 */ 349 350 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 351 #define CPUF_AP 0x0002 /* CPU is an AP */ 352 #define CPUF_SP 0x0004 /* CPU is only processor */ 353 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 354 355 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 356 #define CPUF_PRESENT 0x1000 /* CPU is present */ 357 #define CPUF_RUNNING 0x2000 /* CPU is running */ 358 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 359 #define CPUF_GO 0x8000 /* CPU should start running */ 360 361 #endif /* _KERNEL || __KMEMUSER */ 362 363 #ifdef _KERNEL 364 /* 365 * We statically allocate the CPU info for the primary CPU (or, 366 * the only CPU on uniprocessors), and the primary CPU is the 367 * first CPU on the CPU info list. 368 */ 369 extern struct cpu_info cpu_info_primary; 370 extern struct cpu_info *cpu_info_list; 371 372 #define CPU_INFO_ITERATOR int __unused 373 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 374 ci != NULL; ci = ci->ci_next 375 376 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 377 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 378 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 379 380 #if !defined(__GNUC__) || defined(_MODULE) 381 /* For non-GCC and modules */ 382 struct cpu_info *x86_curcpu(void); 383 # ifdef __GNUC__ 384 lwp_t *x86_curlwp(void) __attribute__ ((const)); 385 # else 386 lwp_t *x86_curlwp(void); 387 # endif 388 #endif 389 390 #define cpu_number() (cpu_index(curcpu())) 391 392 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 393 394 #define aston(l) ((l)->l_md.md_astpending = 1) 395 396 void cpu_boot_secondary_processors(void); 397 void cpu_init_idle_lwps(void); 398 void cpu_init_msrs(struct cpu_info *, bool); 399 void cpu_load_pmap(struct pmap *, struct pmap *); 400 void cpu_broadcast_halt(void); 401 void cpu_kick(struct cpu_info *); 402 403 void cpu_pcpuarea_init(struct cpu_info *); 404 void cpu_svs_init(struct cpu_info *); 405 void cpu_speculation_init(struct cpu_info *); 406 407 #define curcpu() x86_curcpu() 408 #define curlwp x86_curlwp() 409 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 410 411 /* 412 * Give a profiling tick to the current process when the user profiling 413 * buffer pages are invalid. On the i386, request an ast to send us 414 * through trap(), marking the proc as needing a profiling tick. 415 */ 416 extern void cpu_need_proftick(struct lwp *l); 417 418 /* 419 * Notify the LWP l that it has a signal pending, process as soon as 420 * possible. 421 */ 422 extern void cpu_signotify(struct lwp *); 423 424 /* 425 * We need a machine-independent name for this. 426 */ 427 extern void (*delay_func)(unsigned int); 428 struct timeval; 429 430 #ifndef __HIDE_DELAY 431 #define DELAY(x) (*delay_func)(x) 432 #define delay(x) (*delay_func)(x) 433 #endif 434 435 extern int biosbasemem; 436 extern int biosextmem; 437 extern int cputype; 438 extern int cpuid_level; 439 extern int cpu_class; 440 extern char cpu_brand_string[]; 441 extern int use_pae; 442 443 #ifdef __i386__ 444 #define i386_fpu_present 1 445 int npx586bug1(int, int); 446 extern int i386_fpu_fdivbug; 447 extern int i386_use_fxsave; 448 extern int i386_has_sse; 449 extern int i386_has_sse2; 450 #else 451 #define i386_fpu_present 1 452 #define i386_fpu_fdivbug 0 453 #define i386_use_fxsave 1 454 #define i386_has_sse 1 455 #define i386_has_sse2 1 456 #endif 457 458 extern int x86_fpu_save; 459 #define FPU_SAVE_FSAVE 0 460 #define FPU_SAVE_FXSAVE 1 461 #define FPU_SAVE_XSAVE 2 462 #define FPU_SAVE_XSAVEOPT 3 463 extern unsigned int x86_fpu_save_size; 464 extern uint64_t x86_xsave_features; 465 extern size_t x86_xsave_offsets[]; 466 extern size_t x86_xsave_sizes[]; 467 extern uint32_t x86_fpu_mxcsr_mask; 468 469 extern void (*x86_cpu_idle)(void); 470 #define cpu_idle() (*x86_cpu_idle)() 471 472 /* machdep.c */ 473 #ifdef i386 474 void cpu_set_tss_gates(struct cpu_info *); 475 #endif 476 void cpu_reset(void); 477 478 /* longrun.c */ 479 u_int tmx86_get_longrun_mode(void); 480 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 481 void tmx86_init_longrun(void); 482 483 /* identcpu.c */ 484 void cpu_probe(struct cpu_info *); 485 void cpu_identify(struct cpu_info *); 486 void identify_hypervisor(void); 487 488 /* identcpu_subr.c */ 489 uint64_t cpu_tsc_freq_cpuid(struct cpu_info *); 490 491 typedef enum vm_guest { 492 VM_GUEST_NO = 0, 493 VM_GUEST_VM, 494 VM_GUEST_XENPV, 495 VM_GUEST_XENPVH, 496 VM_GUEST_XENHVM, 497 VM_GUEST_XENPVHVM, 498 VM_GUEST_HV, 499 VM_GUEST_VMWARE, 500 VM_GUEST_KVM, 501 VM_LAST 502 } vm_guest_t; 503 extern vm_guest_t vm_guest; 504 505 static __inline bool __unused 506 vm_guest_is_xenpv(void) 507 { 508 switch(vm_guest) { 509 case VM_GUEST_XENPV: 510 case VM_GUEST_XENPVH: 511 case VM_GUEST_XENPVHVM: 512 return true; 513 default: 514 return false; 515 } 516 } 517 518 /* cpu_topology.c */ 519 void x86_cpu_topology(struct cpu_info *); 520 521 /* locore.s */ 522 struct region_descriptor; 523 void lgdt(struct region_descriptor *); 524 #ifdef XENPV 525 void lgdt_finish(void); 526 #endif 527 528 struct pcb; 529 void savectx(struct pcb *); 530 void lwp_trampoline(void); 531 #ifdef XEN 532 void xen_startrtclock(void); 533 void xen_delay(unsigned int); 534 void xen_initclocks(void); 535 void xen_cpu_initclocks(void); 536 void xen_suspendclocks(struct cpu_info *); 537 void xen_resumeclocks(struct cpu_info *); 538 #endif /* XEN */ 539 /* clock.c */ 540 void initrtclock(u_long); 541 void startrtclock(void); 542 void i8254_delay(unsigned int); 543 void i8254_microtime(struct timeval *); 544 void i8254_initclocks(void); 545 unsigned int gettick(void); 546 extern void (*x86_delay)(unsigned int); 547 548 /* cpu.c */ 549 void cpu_probe_features(struct cpu_info *); 550 551 /* vm_machdep.c */ 552 void cpu_proc_fork(struct proc *, struct proc *); 553 paddr_t kvtop(void *); 554 555 #ifdef USER_LDT 556 /* sys_machdep.h */ 557 int x86_get_ldt(struct lwp *, void *, register_t *); 558 int x86_set_ldt(struct lwp *, void *, register_t *); 559 #endif 560 561 /* isa_machdep.c */ 562 void isa_defaultirq(void); 563 int isa_nmi(void); 564 565 /* consinit.c */ 566 void kgdb_port_init(void); 567 568 /* bus_machdep.c */ 569 void x86_bus_space_init(void); 570 void x86_bus_space_mallocok(void); 571 572 #endif /* _KERNEL */ 573 574 #if defined(_KERNEL) || defined(_KMEMUSER) 575 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 576 #endif /* _KERNEL || __KMEMUSER */ 577 578 /* 579 * CTL_MACHDEP definitions. 580 */ 581 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 582 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 583 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 584 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 585 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 586 #define CPU_DISKINFO 6 /* struct disklist *: 587 * disk geometry information */ 588 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 589 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 590 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 591 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 592 #define CPU_TMLR_MODE 11 /* int: longrun mode 593 * 0: minimum frequency 594 * 1: economy 595 * 2: performance 596 * 3: maximum frequency 597 */ 598 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 599 #define CPU_TMLR_VOLTAGE 13 /* int: current voltage */ 600 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 601 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 602 * to use this, CPU_OSFXSR must be true 603 * 0: FSAVE 604 * 1: FXSAVE 605 * 2: XSAVE 606 * 3: XSAVEOPT 607 */ 608 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 609 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 610 611 /* 612 * Structure for CPU_DISKINFO sysctl call. 613 * XXX this should be somewhere else. 614 */ 615 #define MAX_BIOSDISKS 16 616 617 struct disklist { 618 int dl_nbiosdisks; /* number of bios disks */ 619 int dl_unused; 620 struct biosdisk_info { 621 int bi_dev; /* BIOS device # (0x80 ..) */ 622 int bi_cyl; /* cylinders on disk */ 623 int bi_head; /* heads per track */ 624 int bi_sec; /* sectors per track */ 625 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 626 #define BIFLAG_INVALID 0x01 627 #define BIFLAG_EXTINT13 0x02 628 int bi_flags; 629 int bi_unused; 630 } dl_biosdisks[MAX_BIOSDISKS]; 631 632 int dl_nnativedisks; /* number of native disks */ 633 struct nativedisk_info { 634 char ni_devname[16]; /* native device name */ 635 int ni_nmatches; /* # of matches w/ BIOS */ 636 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 637 } dl_nativedisks[1]; /* actually longer */ 638 }; 639 #endif /* !_X86_CPU_H_ */ 640
Indexes created Fri Sep 26 08:10:20 GMT 2025