cpu.h revision 1.133
1 /* $NetBSD: cpu.h,v 1.133 2022/09/07 00:40:18 knakahara Exp $ */ 2 3 /* 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #include "opt_svs.h" 51 #endif 52 53 /* 54 * Definitions unique to x86 cpu support. 55 */ 56 #include <machine/frame.h> 57 #include <machine/pte.h> 58 #include <machine/segments.h> 59 #include <machine/tss.h> 60 #include <machine/intrdefs.h> 61 62 #include <x86/cacheinfo.h> 63 64 #include <sys/cpu_data.h> 65 #include <sys/evcnt.h> 66 #include <sys/device_if.h> /* for device_t */ 67 68 #ifdef XEN 69 #include <xen/include/public/xen.h> 70 #include <xen/include/public/event_channel.h> 71 #include <sys/mutex.h> 72 #endif /* XEN */ 73 74 struct intrsource; 75 struct pmap; 76 struct kcpuset; 77 78 #ifdef __x86_64__ 79 #define i386tss x86_64_tss 80 #endif 81 82 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 83 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 84 85 struct cpu_tss { 86 #ifdef i386 87 struct i386tss dblflt_tss; 88 struct i386tss ddbipi_tss; 89 #endif 90 struct i386tss tss; 91 uint8_t iomap[IOMAPSIZE]; 92 } __packed; 93 94 /* 95 * Arguments to hardclock, softclock and statclock 96 * encapsulate the previous machine state in an opaque 97 * clockframe; for now, use generic intrframe. 98 */ 99 struct clockframe { 100 struct intrframe cf_if; 101 }; 102 103 struct idt_vec { 104 void *iv_idt; 105 void *iv_idt_pentium; 106 char iv_allocmap[NIDT]; 107 }; 108 109 /* 110 * a bunch of this belongs in cpuvar.h; move it later.. 111 */ 112 113 struct cpu_info { 114 struct cpu_data ci_data; /* MI per-cpu data */ 115 device_t ci_dev; /* pointer to our device */ 116 struct cpu_info *ci_self; /* self-pointer */ 117 118 /* 119 * Private members. 120 */ 121 struct pmap *ci_pmap; /* current pmap */ 122 int ci_want_pmapload; /* pmap_load() is needed */ 123 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 124 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 125 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 126 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 127 int ci_curldt; /* current LDT descriptor */ 128 int ci_nintrhand; /* number of H/W interrupt handlers */ 129 uint64_t ci_scratch; 130 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 131 struct kcpuset *ci_tlb_cpuset; 132 struct idt_vec ci_idtvec; 133 134 int ci_kfpu_spl; 135 136 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 137 138 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 139 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 140 141 /* The following must be aligned for cmpxchg8b. */ 142 union { 143 uint64_t ci_istate; 144 struct { 145 uint64_t ci_ipending:56; 146 uint64_t ci_ilevel:8; 147 }; 148 } __aligned(8); 149 uint64_t ci_imasked; 150 151 int ci_idepth; 152 void * ci_intrstack; 153 uint64_t ci_imask[NIPL]; 154 uint64_t ci_iunmask[NIPL]; 155 156 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 157 uint32_t ci_vendor[4]; /* vendor string */ 158 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 159 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 160 volatile uint32_t ci_lapic_counter; 161 162 uint32_t ci_feat_val[8]; /* X86 CPUID feature bits */ 163 /* [0] basic features cpuid.1:%edx 164 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 165 * [2] extended features cpuid:80000001:%edx 166 * [3] extended features cpuid:80000001:%ecx 167 * [4] VIA padlock features 168 * [5] structured extended features cpuid.7:%ebx 169 * [6] structured extended features cpuid.7:%ecx 170 * [7] structured extended features cpuid.7:%edx 171 */ 172 173 const struct cpu_functions *ci_func; /* start/stop functions */ 174 struct trapframe *ci_ddb_regs; 175 176 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 177 struct x86_cache_info ci_cinfo[CAI_COUNT]; 178 179 device_t ci_frequency; /* Frequency scaling technology */ 180 device_t ci_padlock; /* VIA PadLock private storage */ 181 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 182 device_t ci_vm; /* Virtual machine guest driver */ 183 184 /* 185 * Segmentation-related data. 186 */ 187 union descriptor *ci_gdt; 188 struct cpu_tss *ci_tss; /* Per-cpu TSSes; shared among LWPs */ 189 int ci_tss_sel; /* TSS selector of this cpu */ 190 191 /* 192 * The following two are actually region_descriptors, 193 * but that would pollute the namespace. 194 */ 195 uintptr_t ci_suspend_gdt; 196 uint16_t ci_suspend_gdt_padding; 197 uintptr_t ci_suspend_idt; 198 uint16_t ci_suspend_idt_padding; 199 200 uint16_t ci_suspend_tr; 201 uint16_t ci_suspend_ldt; 202 uintptr_t ci_suspend_fs; 203 uintptr_t ci_suspend_gs; 204 uintptr_t ci_suspend_kgs; 205 uintptr_t ci_suspend_efer; 206 uintptr_t ci_suspend_reg[12]; 207 uintptr_t ci_suspend_cr0; 208 uintptr_t ci_suspend_cr2; 209 uintptr_t ci_suspend_cr3; 210 uintptr_t ci_suspend_cr4; 211 uintptr_t ci_suspend_cr8; 212 213 /* 214 * The following must be in their own cache line, as they are 215 * stored to regularly by remote CPUs; when they were mixed with 216 * other fields we observed frequent cache misses. 217 */ 218 int ci_want_resched __aligned(64); 219 uint32_t ci_ipis; /* interprocessor interrupts pending */ 220 221 /* 222 * These are largely static, and will be frequently fetched by other 223 * CPUs. For that reason they get their own cache line, too. 224 */ 225 uint32_t ci_flags __aligned(64);/* general flags */ 226 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 227 uint32_t ci_initapicid; /* our initial APIC ID */ 228 uint32_t ci_vcpuid; /* our CPU id for hypervisor */ 229 cpuid_t ci_cpuid; /* our CPU ID */ 230 struct cpu_info *ci_next; /* next cpu */ 231 232 /* 233 * This is stored frequently, and is fetched by remote CPUs. 234 */ 235 struct lwp *ci_curlwp __aligned(64);/* general flags */ 236 struct lwp *ci_onproc; /* current user LWP / kthread */ 237 238 /* Here ends the cachline-aligned sections. */ 239 int ci_padout __aligned(64); 240 241 #ifndef __HAVE_DIRECT_MAP 242 #define VPAGE_SRC 0 243 #define VPAGE_DST 1 244 #define VPAGE_ZER 2 245 #define VPAGE_PTP 3 246 #define VPAGE_MAX 4 247 vaddr_t vpage[VPAGE_MAX]; 248 pt_entry_t *vpage_pte[VPAGE_MAX]; 249 #endif 250 251 #ifdef PAE 252 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 253 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 254 #endif 255 256 #ifdef SVS 257 pd_entry_t * ci_svs_updir; 258 paddr_t ci_svs_updirpa; 259 int ci_svs_ldt_sel; 260 kmutex_t ci_svs_mtx; 261 pd_entry_t * ci_svs_rsp0_pte; 262 vaddr_t ci_svs_rsp0; 263 vaddr_t ci_svs_ursp0; 264 vaddr_t ci_svs_krsp0; 265 vaddr_t ci_svs_utls; 266 #endif 267 268 #ifndef XENPV 269 struct evcnt ci_ipi_events[X86_NIPI]; 270 #else 271 struct evcnt ci_ipi_events[XEN_NIPIS]; 272 #endif 273 #ifdef XEN 274 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 275 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 276 evtchn_port_t ci_ipi_evtchn; 277 #if defined(XENPV) 278 #if defined(PAE) || defined(__x86_64__) 279 /* Currently active user PGD (can't use rcr3() with Xen) */ 280 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 281 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 282 kmutex_t ci_kpm_mtx; 283 #endif /* defined(PAE) || defined(__x86_64__) */ 284 285 #if defined(__x86_64__) 286 /* per-cpu version of normal_pdes */ 287 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XENPV */ 288 paddr_t ci_xen_current_user_pgd; 289 #endif /* defined(__x86_64__) */ 290 291 size_t ci_xpq_idx; 292 #endif /* XENPV */ 293 294 /* Xen raw system time at which we last ran hardclock. */ 295 uint64_t ci_xen_hardclock_systime_ns; 296 297 /* 298 * Last TSC-adjusted local Xen system time we observed. Used 299 * to detect whether the Xen clock has gone backwards. 300 */ 301 uint64_t ci_xen_last_systime_ns; 302 303 /* 304 * Distance in nanoseconds from the local view of system time 305 * to the global view of system time, if the local time is 306 * behind the global time. 307 */ 308 uint64_t ci_xen_systime_ns_skew; 309 310 /* 311 * Clockframe for timer interrupt handler. 312 * Saved at entry via event callback. 313 */ 314 vaddr_t ci_xen_clockf_pc; /* RIP at last event interrupt */ 315 bool ci_xen_clockf_usermode; /* Was the guest in usermode ? */ 316 317 /* Event counters for various pathologies that might happen. */ 318 struct evcnt ci_xen_cpu_tsc_backwards_evcnt; 319 struct evcnt ci_xen_tsc_delta_negative_evcnt; 320 struct evcnt ci_xen_raw_systime_wraparound_evcnt; 321 struct evcnt ci_xen_raw_systime_backwards_evcnt; 322 struct evcnt ci_xen_systime_backwards_hardclock_evcnt; 323 struct evcnt ci_xen_missed_hardclock_evcnt; 324 #endif /* XEN */ 325 326 #if defined(GPROF) && defined(MULTIPROCESSOR) 327 struct gmonparam *ci_gmon; /* MI per-cpu GPROF */ 328 #endif 329 }; 330 331 #if defined(XEN) && !defined(XENPV) 332 __CTASSERT(XEN_NIPIS <= X86_NIPI); 333 #endif 334 335 /* 336 * Macros to handle (some) trapframe registers for common x86 code. 337 */ 338 #ifdef __x86_64__ 339 #define X86_TF_RAX(tf) tf->tf_rax 340 #define X86_TF_RDX(tf) tf->tf_rdx 341 #define X86_TF_RSP(tf) tf->tf_rsp 342 #define X86_TF_RIP(tf) tf->tf_rip 343 #define X86_TF_RFLAGS(tf) tf->tf_rflags 344 #else 345 #define X86_TF_RAX(tf) tf->tf_eax 346 #define X86_TF_RDX(tf) tf->tf_edx 347 #define X86_TF_RSP(tf) tf->tf_esp 348 #define X86_TF_RIP(tf) tf->tf_eip 349 #define X86_TF_RFLAGS(tf) tf->tf_eflags 350 #endif 351 352 /* 353 * Processor flag notes: The "primary" CPU has certain MI-defined 354 * roles (mostly relating to hardclock handling); we distinguish 355 * between the processor which booted us, and the processor currently 356 * holding the "primary" role just to give us the flexibility later to 357 * change primaries should we be sufficiently twisted. 358 */ 359 360 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 361 #define CPUF_AP 0x0002 /* CPU is an AP */ 362 #define CPUF_SP 0x0004 /* CPU is only processor */ 363 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 364 365 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 366 #define CPUF_PRESENT 0x1000 /* CPU is present */ 367 #define CPUF_RUNNING 0x2000 /* CPU is running */ 368 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 369 #define CPUF_GO 0x8000 /* CPU should start running */ 370 371 #endif /* _KERNEL || __KMEMUSER */ 372 373 #ifdef _KERNEL 374 /* 375 * We statically allocate the CPU info for the primary CPU (or, 376 * the only CPU on uniprocessors), and the primary CPU is the 377 * first CPU on the CPU info list. 378 */ 379 extern struct cpu_info cpu_info_primary; 380 extern struct cpu_info *cpu_info_list; 381 382 #define CPU_INFO_ITERATOR int __unused 383 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 384 ci != NULL; ci = ci->ci_next 385 386 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 387 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 388 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 389 390 #if !defined(__GNUC__) || defined(_MODULE) 391 /* For non-GCC and modules */ 392 struct cpu_info *x86_curcpu(void); 393 # ifdef __GNUC__ 394 lwp_t *x86_curlwp(void) __attribute__ ((const)); 395 # else 396 lwp_t *x86_curlwp(void); 397 # endif 398 #endif 399 400 #define cpu_number() (cpu_index(curcpu())) 401 402 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 403 404 #define aston(l) ((l)->l_md.md_astpending = 1) 405 406 void cpu_boot_secondary_processors(void); 407 void cpu_init_idle_lwps(void); 408 void cpu_init_msrs(struct cpu_info *, bool); 409 void cpu_load_pmap(struct pmap *, struct pmap *); 410 void cpu_broadcast_halt(void); 411 void cpu_kick(struct cpu_info *); 412 413 void cpu_pcpuarea_init(struct cpu_info *); 414 void cpu_svs_init(struct cpu_info *); 415 void cpu_speculation_init(struct cpu_info *); 416 417 #define curcpu() x86_curcpu() 418 #define curlwp x86_curlwp() 419 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 420 421 /* 422 * Give a profiling tick to the current process when the user profiling 423 * buffer pages are invalid. On the i386, request an ast to send us 424 * through trap(), marking the proc as needing a profiling tick. 425 */ 426 extern void cpu_need_proftick(struct lwp *l); 427 428 /* 429 * Notify the LWP l that it has a signal pending, process as soon as 430 * possible. 431 */ 432 extern void cpu_signotify(struct lwp *); 433 434 /* 435 * We need a machine-independent name for this. 436 */ 437 extern void (*delay_func)(unsigned int); 438 struct timeval; 439 440 #ifndef __HIDE_DELAY 441 #define DELAY(x) (*delay_func)(x) 442 #define delay(x) (*delay_func)(x) 443 #endif 444 445 extern int biosbasemem; 446 extern int biosextmem; 447 extern int cputype; 448 extern int cpuid_level; 449 extern int cpu_class; 450 extern char cpu_brand_string[]; 451 extern int use_pae; 452 453 #ifdef __i386__ 454 #define i386_fpu_present 1 455 int npx586bug1(int, int); 456 extern int i386_fpu_fdivbug; 457 extern int i386_use_fxsave; 458 extern int i386_has_sse; 459 extern int i386_has_sse2; 460 #else 461 #define i386_fpu_present 1 462 #define i386_fpu_fdivbug 0 463 #define i386_use_fxsave 1 464 #define i386_has_sse 1 465 #define i386_has_sse2 1 466 #endif 467 468 extern int x86_fpu_save; 469 #define FPU_SAVE_FSAVE 0 470 #define FPU_SAVE_FXSAVE 1 471 #define FPU_SAVE_XSAVE 2 472 #define FPU_SAVE_XSAVEOPT 3 473 extern unsigned int x86_fpu_save_size; 474 extern uint64_t x86_xsave_features; 475 extern size_t x86_xsave_offsets[]; 476 extern size_t x86_xsave_sizes[]; 477 extern uint32_t x86_fpu_mxcsr_mask; 478 479 extern void (*x86_cpu_idle)(void); 480 #define cpu_idle() (*x86_cpu_idle)() 481 482 /* machdep.c */ 483 #ifdef i386 484 void cpu_set_tss_gates(struct cpu_info *); 485 #endif 486 void cpu_reset(void); 487 488 /* longrun.c */ 489 u_int tmx86_get_longrun_mode(void); 490 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 491 void tmx86_init_longrun(void); 492 493 /* identcpu.c */ 494 void cpu_probe(struct cpu_info *); 495 void cpu_identify(struct cpu_info *); 496 void identify_hypervisor(void); 497 498 /* identcpu_subr.c */ 499 uint64_t cpu_tsc_freq_cpuid(struct cpu_info *); 500 void cpu_dcp_cacheinfo(struct cpu_info *, uint32_t); 501 502 typedef enum vm_guest { 503 VM_GUEST_NO = 0, 504 VM_GUEST_VM, 505 VM_GUEST_XENPV, 506 VM_GUEST_XENPVH, 507 VM_GUEST_XENHVM, 508 VM_GUEST_XENPVHVM, 509 VM_GUEST_HV, 510 VM_GUEST_VMWARE, 511 VM_GUEST_KVM, 512 VM_GUEST_VIRTUALBOX, 513 VM_LAST 514 } vm_guest_t; 515 extern vm_guest_t vm_guest; 516 517 static __inline bool __unused 518 vm_guest_is_xenpv(void) 519 { 520 switch(vm_guest) { 521 case VM_GUEST_XENPV: 522 case VM_GUEST_XENPVH: 523 case VM_GUEST_XENPVHVM: 524 return true; 525 default: 526 return false; 527 } 528 } 529 530 static __inline bool __unused 531 vm_guest_is_xenpvh_or_pvhvm(void) 532 { 533 switch(vm_guest) { 534 case VM_GUEST_XENPVH: 535 case VM_GUEST_XENPVHVM: 536 return true; 537 default: 538 return false; 539 } 540 } 541 542 /* cpu_topology.c */ 543 void x86_cpu_topology(struct cpu_info *); 544 545 /* locore.s */ 546 struct region_descriptor; 547 void lgdt(struct region_descriptor *); 548 #ifdef XENPV 549 void lgdt_finish(void); 550 #endif 551 552 struct pcb; 553 void savectx(struct pcb *); 554 void lwp_trampoline(void); 555 #ifdef XEN 556 void xen_startrtclock(void); 557 void xen_delay(unsigned int); 558 void xen_initclocks(void); 559 void xen_cpu_initclocks(void); 560 void xen_suspendclocks(struct cpu_info *); 561 void xen_resumeclocks(struct cpu_info *); 562 #endif /* XEN */ 563 /* clock.c */ 564 void initrtclock(u_long); 565 void startrtclock(void); 566 void i8254_delay(unsigned int); 567 void i8254_microtime(struct timeval *); 568 void i8254_initclocks(void); 569 unsigned int gettick(void); 570 extern void (*x86_delay)(unsigned int); 571 572 /* cpu.c */ 573 void cpu_probe_features(struct cpu_info *); 574 int x86_cpu_is_lcall(const void *); 575 576 /* vm_machdep.c */ 577 void cpu_proc_fork(struct proc *, struct proc *); 578 paddr_t kvtop(void *); 579 580 /* isa_machdep.c */ 581 void isa_defaultirq(void); 582 int isa_nmi(void); 583 584 /* consinit.c */ 585 void kgdb_port_init(void); 586 587 /* bus_machdep.c */ 588 void x86_bus_space_init(void); 589 void x86_bus_space_mallocok(void); 590 591 #endif /* _KERNEL */ 592 593 #if defined(_KERNEL) || defined(_KMEMUSER) 594 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 595 #endif /* _KERNEL || __KMEMUSER */ 596 597 /* 598 * CTL_MACHDEP definitions. 599 */ 600 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 601 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 602 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 603 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 604 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 605 #define CPU_DISKINFO 6 /* struct disklist *: 606 * disk geometry information */ 607 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 608 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 609 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 610 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 611 #define CPU_TMLR_MODE 11 /* int: longrun mode 612 * 0: minimum frequency 613 * 1: economy 614 * 2: performance 615 * 3: maximum frequency 616 */ 617 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 618 #define CPU_TMLR_VOLTAGE 13 /* int: current voltage */ 619 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 620 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 621 * to use this, CPU_OSFXSR must be true 622 * 0: FSAVE 623 * 1: FXSAVE 624 * 2: XSAVE 625 * 3: XSAVEOPT 626 */ 627 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 628 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 629 630 /* 631 * Structure for CPU_DISKINFO sysctl call. 632 * XXX this should be somewhere else. 633 */ 634 #define MAX_BIOSDISKS 16 635 636 struct disklist { 637 int dl_nbiosdisks; /* number of bios disks */ 638 int dl_unused; 639 struct biosdisk_info { 640 int bi_dev; /* BIOS device # (0x80 ..) */ 641 int bi_cyl; /* cylinders on disk */ 642 int bi_head; /* heads per track */ 643 int bi_sec; /* sectors per track */ 644 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 645 #define BIFLAG_INVALID 0x01 646 #define BIFLAG_EXTINT13 0x02 647 int bi_flags; 648 int bi_unused; 649 } dl_biosdisks[MAX_BIOSDISKS]; 650 651 int dl_nnativedisks; /* number of native disks */ 652 struct nativedisk_info { 653 char ni_devname[16]; /* native device name */ 654 int ni_nmatches; /* # of matches w/ BIOS */ 655 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 656 } dl_nativedisks[1]; /* actually longer */ 657 }; 658 #endif /* !_X86_CPU_H_ */ 659
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