cpu.h revision 1.37
1 /* $NetBSD: cpu.h,v 1.37 2011/08/11 18:11:17 cherry Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdbool.h> 44 #endif /* _KERNEL || _STANDALONE */ 45 46 #if defined(_KERNEL) || defined(_KMEMUSER) 47 #if defined(_KERNEL_OPT) 48 #include "opt_xen.h" 49 #ifdef i386 50 #include "opt_user_ldt.h" 51 #include "opt_vm86.h" 52 #endif 53 #endif 54 55 /* 56 * Definitions unique to x86 cpu support. 57 */ 58 #include <machine/frame.h> 59 #include <machine/pte.h> 60 #include <machine/segments.h> 61 #include <machine/tss.h> 62 #include <machine/intrdefs.h> 63 64 #include <x86/cacheinfo.h> 65 66 #include <sys/cpu_data.h> 67 #include <sys/evcnt.h> 68 #include <sys/device_if.h> /* for device_t */ 69 70 #ifdef XEN 71 #include <xen/xen3-public/xen.h> 72 #include <xen/xen3-public/event_channel.h> 73 #endif /* XEN */ 74 75 struct intrsource; 76 struct pmap; 77 struct device; 78 79 #ifdef __x86_64__ 80 #define i386tss x86_64_tss 81 #endif 82 83 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 84 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 85 86 /* 87 * a bunch of this belongs in cpuvar.h; move it later.. 88 */ 89 90 struct cpu_info { 91 struct cpu_data ci_data; /* MI per-cpu data */ 92 device_t ci_dev; /* pointer to our device */ 93 struct cpu_info *ci_self; /* self-pointer */ 94 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 95 void *ci_tlog_base; /* Trap log base */ 96 int32_t ci_tlog_offset; /* Trap log current offset */ 97 98 /* 99 * Will be accessed by other CPUs. 100 */ 101 struct cpu_info *ci_next; /* next cpu */ 102 struct lwp *ci_curlwp; /* current owner of the processor */ 103 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 104 int ci_fpsaving; /* save in progress */ 105 int ci_fpused; /* XEN: FPU was used by curlwp */ 106 cpuid_t ci_cpuid; /* our CPU ID */ 107 int ci_cpumask; /* (1 << CPU ID) */ 108 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 109 uint32_t ci_initapicid; /* our intitial APIC ID */ 110 111 /* 112 * Private members. 113 */ 114 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 115 struct pmap *ci_pmap; /* current pmap */ 116 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 117 int ci_want_pmapload; /* pmap_load() is needed */ 118 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 119 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 120 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 121 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 122 int ci_curldt; /* current LDT descriptor */ 123 int ci_nintrhand; /* number of H/W interrupt handlers */ 124 uint64_t ci_scratch; 125 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 126 127 #ifdef XEN 128 struct iplsource *ci_isources[NIPL]; 129 #else 130 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 131 #endif 132 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 133 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 134 135 /* The following must be aligned for cmpxchg8b. */ 136 struct { 137 uint32_t ipending; 138 int ilevel; 139 } ci_istate __aligned(8); 140 #define ci_ipending ci_istate.ipending 141 #define ci_ilevel ci_istate.ilevel 142 143 int ci_idepth; 144 void * ci_intrstack; 145 uint32_t ci_imask[NIPL]; 146 uint32_t ci_iunmask[NIPL]; 147 148 uint32_t ci_flags; /* flags; see below */ 149 uint32_t ci_ipis; /* interprocessor interrupts pending */ 150 uint32_t sc_apic_version; /* local APIC version */ 151 152 uint32_t ci_signature; /* X86 cpuid type */ 153 uint32_t ci_vendor[4]; /* vendor string */ 154 uint32_t ci_cpu_serial[3]; /* PIII serial number */ 155 volatile uint32_t ci_lapic_counter; 156 157 uint32_t ci_feat_val[5]; /* X86 CPUID feature bits 158 * [0] basic features %edx 159 * [1] basic features %ecx 160 * [2] extended features %edx 161 * [3] extended features %ecx 162 * [4] VIA padlock features 163 */ 164 165 const struct cpu_functions *ci_func; /* start/stop functions */ 166 struct trapframe *ci_ddb_regs; 167 168 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 169 struct x86_cache_info ci_cinfo[CAI_COUNT]; 170 171 union descriptor *ci_gdt; 172 173 #ifdef i386 174 struct i386tss ci_doubleflt_tss; 175 struct i386tss ci_ddbipi_tss; 176 #endif 177 178 #ifdef PAE 179 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 180 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 181 #endif 182 183 #if defined(XEN) && defined(__x86_64__) 184 /* Currently active user PGD (can't use rcr3() with Xen) */ 185 pd_entry_t * ci_kpm_pdir; /* per-cpu L4 PD (va) */ 186 paddr_t ci_kpm_pdirpa; /* per-cpu L4 PD (pa) */ 187 paddr_t ci_xen_current_user_pgd; 188 #endif 189 190 char *ci_doubleflt_stack; 191 char *ci_ddbipi_stack; 192 193 #ifndef XEN 194 struct evcnt ci_ipi_events[X86_NIPI]; 195 #else /* XEN */ 196 struct evcnt ci_ipi_events[XEN_NIPIS]; 197 evtchn_port_t ci_ipi_evtchn; 198 #endif /* XEN */ 199 200 device_t ci_frequency; /* Frequency scaling technology */ 201 device_t ci_padlock; /* VIA PadLock private storage */ 202 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 203 204 struct i386tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 205 char ci_iomap[IOMAPSIZE]; /* I/O Bitmap */ 206 int ci_tss_sel; /* TSS selector of this cpu */ 207 208 /* 209 * The following two are actually region_descriptors, 210 * but that would pollute the namespace. 211 */ 212 uintptr_t ci_suspend_gdt; 213 uint16_t ci_suspend_gdt_padding; 214 uintptr_t ci_suspend_idt; 215 uint16_t ci_suspend_idt_padding; 216 217 uint16_t ci_suspend_tr; 218 uint16_t ci_suspend_ldt; 219 uintptr_t ci_suspend_fs; 220 uintptr_t ci_suspend_gs; 221 uintptr_t ci_suspend_kgs; 222 uintptr_t ci_suspend_efer; 223 uintptr_t ci_suspend_reg[12]; 224 uintptr_t ci_suspend_cr0; 225 uintptr_t ci_suspend_cr2; 226 uintptr_t ci_suspend_cr3; 227 uintptr_t ci_suspend_cr4; 228 uintptr_t ci_suspend_cr8; 229 230 /* The following must be in a single cache line. */ 231 int ci_want_resched __aligned(64); 232 int ci_padout __aligned(64); 233 }; 234 235 #ifdef __x86_64__ 236 #define ci_pdirpa(ci, index) \ 237 ((ci)->ci_kpm_pdirpa + (index) * sizeof(pd_entry_t)) 238 #endif /* __x86_64__ */ 239 240 /* 241 * Macros to handle (some) trapframe registers for common x86 code. 242 */ 243 #ifdef __x86_64__ 244 #define X86_TF_RAX(tf) tf->tf_rax 245 #define X86_TF_RDX(tf) tf->tf_rdx 246 #define X86_TF_RSP(tf) tf->tf_rsp 247 #define X86_TF_RIP(tf) tf->tf_rip 248 #define X86_TF_RFLAGS(tf) tf->tf_rflags 249 #else 250 #define X86_TF_RAX(tf) tf->tf_eax 251 #define X86_TF_RDX(tf) tf->tf_edx 252 #define X86_TF_RSP(tf) tf->tf_esp 253 #define X86_TF_RIP(tf) tf->tf_eip 254 #define X86_TF_RFLAGS(tf) tf->tf_eflags 255 #endif 256 257 /* 258 * Processor flag notes: The "primary" CPU has certain MI-defined 259 * roles (mostly relating to hardclock handling); we distinguish 260 * betwen the processor which booted us, and the processor currently 261 * holding the "primary" role just to give us the flexibility later to 262 * change primaries should we be sufficiently twisted. 263 */ 264 265 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 266 #define CPUF_AP 0x0002 /* CPU is an AP */ 267 #define CPUF_SP 0x0004 /* CPU is only processor */ 268 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 269 270 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 271 #define CPUF_PRESENT 0x1000 /* CPU is present */ 272 #define CPUF_RUNNING 0x2000 /* CPU is running */ 273 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 274 #define CPUF_GO 0x8000 /* CPU should start running */ 275 276 /* 277 * We statically allocate the CPU info for the primary CPU (or, 278 * the only CPU on uniprocessors), and the primary CPU is the 279 * first CPU on the CPU info list. 280 */ 281 extern struct cpu_info cpu_info_primary; 282 extern struct cpu_info *cpu_info_list; 283 284 #define CPU_INFO_ITERATOR int 285 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 286 ci != NULL; ci = ci->ci_next 287 288 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 289 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 290 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 291 292 #if !defined(__GNUC__) || defined(_MODULE) 293 /* For non-GCC and modules */ 294 struct cpu_info *x86_curcpu(void); 295 void cpu_set_curpri(int); 296 # ifdef __GNUC__ 297 lwp_t *x86_curlwp(void) __attribute__ ((const)); 298 # else 299 lwp_t *x86_curlwp(void); 300 # endif 301 #endif 302 303 #define cpu_number() (cpu_index(curcpu())) 304 305 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 306 307 #define X86_AST_GENERIC 0x01 308 #define X86_AST_PREEMPT 0x02 309 310 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 311 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 312 313 void cpu_boot_secondary_processors(void); 314 void cpu_init_idle_lwps(void); 315 void cpu_init_msrs(struct cpu_info *, bool); 316 void cpu_load_pmap(struct pmap *); 317 void cpu_broadcast_halt(void); 318 void cpu_kick(struct cpu_info *); 319 320 extern uint32_t cpus_attached; 321 322 #define curcpu() x86_curcpu() 323 #define curlwp x86_curlwp() 324 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 325 326 /* 327 * Arguments to hardclock, softclock and statclock 328 * encapsulate the previous machine state in an opaque 329 * clockframe; for now, use generic intrframe. 330 */ 331 struct clockframe { 332 struct intrframe cf_if; 333 }; 334 335 /* 336 * Give a profiling tick to the current process when the user profiling 337 * buffer pages are invalid. On the i386, request an ast to send us 338 * through trap(), marking the proc as needing a profiling tick. 339 */ 340 extern void cpu_need_proftick(struct lwp *l); 341 342 /* 343 * Notify the LWP l that it has a signal pending, process as soon as 344 * possible. 345 */ 346 extern void cpu_signotify(struct lwp *); 347 348 /* 349 * We need a machine-independent name for this. 350 */ 351 extern void (*delay_func)(unsigned int); 352 struct timeval; 353 354 #define DELAY(x) (*delay_func)(x) 355 #define delay(x) (*delay_func)(x) 356 357 extern int biosbasemem; 358 extern int biosextmem; 359 extern int cpu; 360 extern int cpuid_level; 361 extern int cpu_class; 362 extern char cpu_brand_string[]; 363 364 extern int i386_use_fxsave; 365 extern int i386_use_pae; 366 extern int i386_has_sse; 367 extern int i386_has_sse2; 368 369 extern void (*x86_cpu_idle)(void); 370 #define cpu_idle() (*x86_cpu_idle)() 371 372 /* machdep.c */ 373 void dumpconf(void); 374 void cpu_reset(void); 375 void i386_proc0_tss_ldt_init(void); 376 void dumpconf(void); 377 void cpu_reset(void); 378 void x86_64_proc0_tss_ldt_init(void); 379 void x86_64_init_pcb_tss_ldt(struct cpu_info *); 380 381 /* longrun.c */ 382 u_int tmx86_get_longrun_mode(void); 383 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 384 void tmx86_init_longrun(void); 385 386 /* identcpu.c */ 387 void cpu_probe(struct cpu_info *); 388 void cpu_identify(struct cpu_info *); 389 390 /* cpu_topology.c */ 391 void x86_cpu_topology(struct cpu_info *); 392 393 /* vm_machdep.c */ 394 void cpu_proc_fork(struct proc *, struct proc *); 395 396 /* locore.s */ 397 struct region_descriptor; 398 void lgdt(struct region_descriptor *); 399 #ifdef XEN 400 void lgdt_finish(void); 401 void i386_switch_context(lwp_t *); 402 #endif 403 404 struct pcb; 405 void savectx(struct pcb *); 406 void lwp_trampoline(void); 407 void child_trampoline(void); 408 #ifdef XEN 409 void startrtclock(void); 410 void xen_delay(unsigned int); 411 void xen_initclocks(void); 412 #else 413 /* clock.c */ 414 void initrtclock(u_long); 415 void startrtclock(void); 416 void i8254_delay(unsigned int); 417 void i8254_microtime(struct timeval *); 418 void i8254_initclocks(void); 419 #endif 420 421 /* cpu.c */ 422 423 void cpu_probe_features(struct cpu_info *); 424 425 /* npx.c */ 426 void npxsave_lwp(struct lwp *, bool); 427 void npxsave_cpu(bool); 428 429 /* vm_machdep.c */ 430 paddr_t kvtop(void *); 431 432 #ifdef USER_LDT 433 /* sys_machdep.h */ 434 int x86_get_ldt(struct lwp *, void *, register_t *); 435 int x86_set_ldt(struct lwp *, void *, register_t *); 436 #endif 437 438 /* isa_machdep.c */ 439 void isa_defaultirq(void); 440 int isa_nmi(void); 441 442 #ifdef VM86 443 /* vm86.c */ 444 void vm86_gpfault(struct lwp *, int); 445 #endif /* VM86 */ 446 447 /* consinit.c */ 448 void kgdb_port_init(void); 449 450 /* bus_machdep.c */ 451 void x86_bus_space_init(void); 452 void x86_bus_space_mallocok(void); 453 454 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 455 456 #endif /* _KERNEL || __KMEMUSER */ 457 458 /* 459 * CTL_MACHDEP definitions. 460 */ 461 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 462 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 463 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 464 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 465 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 466 #define CPU_DISKINFO 6 /* struct disklist *: 467 * disk geometry information */ 468 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 469 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 470 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 471 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 472 #define CPU_TMLR_MODE 11 /* int: longrun mode 473 * 0: minimum frequency 474 * 1: economy 475 * 2: performance 476 * 3: maximum frequency 477 */ 478 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 479 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 480 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 481 #define CPU_MAXID 15 /* number of valid machdep ids */ 482 483 /* 484 * Structure for CPU_DISKINFO sysctl call. 485 * XXX this should be somewhere else. 486 */ 487 #define MAX_BIOSDISKS 16 488 489 struct disklist { 490 int dl_nbiosdisks; /* number of bios disks */ 491 struct biosdisk_info { 492 int bi_dev; /* BIOS device # (0x80 ..) */ 493 int bi_cyl; /* cylinders on disk */ 494 int bi_head; /* heads per track */ 495 int bi_sec; /* sectors per track */ 496 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 497 #define BIFLAG_INVALID 0x01 498 #define BIFLAG_EXTINT13 0x02 499 int bi_flags; 500 } dl_biosdisks[MAX_BIOSDISKS]; 501 502 int dl_nnativedisks; /* number of native disks */ 503 struct nativedisk_info { 504 char ni_devname[16]; /* native device name */ 505 int ni_nmatches; /* # of matches w/ BIOS */ 506 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 507 } dl_nativedisks[1]; /* actually longer */ 508 }; 509 #endif /* !_X86_CPU_H_ */ 510
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