cpu.h revision 1.4
1 /* $NetBSD: cpu.h,v 1.4 2008/05/12 14:41:07 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #ifdef _KERNEL 41 #if defined(_KERNEL_OPT) 42 #include "opt_xen.h" 43 #ifdef i386 44 #include "opt_user_ldt.h" 45 #include "opt_vm86.h" 46 #endif 47 #endif 48 49 /* 50 * Definitions unique to x86 cpu support. 51 */ 52 #include <machine/frame.h> 53 #include <machine/segments.h> 54 #include <machine/tss.h> 55 #include <machine/intrdefs.h> 56 57 #include <x86/cacheinfo.h> 58 #include <x86/via_padlock.h> 59 60 #include <sys/cpu_data.h> 61 62 #include <lib/libkern/libkern.h> /* offsetof */ 63 64 struct intrsource; 65 struct pmap; 66 struct device; 67 68 #ifdef __x86_64__ 69 #define i386tss x86_64_tss 70 #endif 71 72 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 73 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 74 75 /* 76 * a bunch of this belongs in cpuvar.h; move it later.. 77 */ 78 79 struct cpu_info { 80 struct device *ci_dev; /* pointer to our device */ 81 struct cpu_info *ci_self; /* self-pointer */ 82 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 83 void *ci_tlog_base; /* Trap log base */ 84 int32_t ci_tlog_offset; /* Trap log current offset */ 85 86 /* 87 * Will be accessed by other CPUs. 88 */ 89 struct cpu_info *ci_next; /* next cpu */ 90 struct lwp *ci_curlwp; /* current owner of the processor */ 91 struct pmap_cpu *ci_pmap_cpu; /* per-CPU pmap data */ 92 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 93 int ci_fpsaving; /* save in progress */ 94 int ci_fpused; /* XEN: FPU was used by curlwp */ 95 cpuid_t ci_cpuid; /* our CPU ID */ 96 int ci_cpumask; /* (1 << CPU ID) */ 97 uint8_t ci_initapicid; /* our intitial APIC ID */ 98 uint8_t ci_packageid; 99 uint8_t ci_coreid; 100 uint8_t ci_smtid; 101 struct cpu_data ci_data; /* MI per-cpu data */ 102 103 /* 104 * Private members. 105 */ 106 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 107 struct pmap *ci_pmap; /* current pmap */ 108 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 109 int ci_want_pmapload; /* pmap_load() is needed */ 110 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 111 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 112 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 113 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 114 int ci_curldt; /* current LDT descriptor */ 115 uint64_t ci_scratch; 116 117 #ifdef XEN 118 struct iplsource *ci_isources[NIPL]; 119 #else 120 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 121 #endif 122 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 123 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 124 125 /* The following must be aligned for cmpxchg8b. */ 126 struct { 127 uint32_t ipending; 128 int ilevel; 129 } ci_istate __aligned(8); 130 #define ci_ipending ci_istate.ipending 131 #define ci_ilevel ci_istate.ilevel 132 133 int ci_idepth; 134 void * ci_intrstack; 135 uint32_t ci_imask[NIPL]; 136 uint32_t ci_iunmask[NIPL]; 137 138 uint32_t ci_flags; /* flags; see below */ 139 uint32_t ci_ipis; /* interprocessor interrupts pending */ 140 int sc_apic_version; /* local APIC version */ 141 142 uint32_t ci_signature; /* X86 cpuid type */ 143 uint32_t ci_feature_flags;/* X86 %edx CPUID feature bits */ 144 uint32_t ci_feature2_flags;/* X86 %ecx CPUID feature bits */ 145 uint32_t ci_feature3_flags;/* X86 extended feature bits */ 146 uint32_t ci_padlock_flags;/* VIA PadLock feature bits */ 147 uint32_t ci_vendor[4]; /* vendor string */ 148 uint32_t ci_cpu_serial[3]; /* PIII serial number */ 149 volatile uint32_t ci_lapic_counter; 150 151 const struct cpu_functions *ci_func; /* start/stop functions */ 152 struct trapframe *ci_ddb_regs; 153 154 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 155 struct x86_cache_info ci_cinfo[CAI_COUNT]; 156 157 union descriptor *ci_gdt; 158 159 #ifdef i386 160 struct i386tss ci_doubleflt_tss; 161 struct i386tss ci_ddbipi_tss; 162 #endif 163 char *ci_doubleflt_stack; 164 char *ci_ddbipi_stack; 165 166 struct evcnt ci_ipi_events[X86_NIPI]; 167 168 struct via_padlock ci_vp; /* VIA PadLock private storage */ 169 170 struct i386tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 171 char ci_iomap[IOMAPSIZE]; /* I/O Bitmap */ 172 int ci_tss_sel; /* TSS selector of this cpu */ 173 174 /* 175 * The following two are actually region_descriptors, 176 * but that would pollute the namespace. 177 */ 178 uintptr_t ci_suspend_gdt; 179 uint16_t ci_suspend_gdt_padding; 180 uintptr_t ci_suspend_idt; 181 uint16_t ci_suspend_idt_padding; 182 183 uint16_t ci_suspend_tr; 184 uint16_t ci_suspend_ldt; 185 uintptr_t ci_suspend_fs; 186 uintptr_t ci_suspend_gs; 187 uintptr_t ci_suspend_kgs; 188 uintptr_t ci_suspend_efer; 189 uintptr_t ci_suspend_reg[12]; 190 uintptr_t ci_suspend_cr0; 191 uintptr_t ci_suspend_cr2; 192 uintptr_t ci_suspend_cr3; 193 uintptr_t ci_suspend_cr4; 194 uintptr_t ci_suspend_cr8; 195 196 /* The following must be in a single cache line. */ 197 int ci_want_resched __aligned(64); 198 int ci_padout __aligned(64); 199 }; 200 201 /* 202 * Processor flag notes: The "primary" CPU has certain MI-defined 203 * roles (mostly relating to hardclock handling); we distinguish 204 * betwen the processor which booted us, and the processor currently 205 * holding the "primary" role just to give us the flexibility later to 206 * change primaries should we be sufficiently twisted. 207 */ 208 209 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 210 #define CPUF_AP 0x0002 /* CPU is an AP */ 211 #define CPUF_SP 0x0004 /* CPU is only processor */ 212 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 213 214 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 215 #define CPUF_PRESENT 0x1000 /* CPU is present */ 216 #define CPUF_RUNNING 0x2000 /* CPU is running */ 217 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 218 #define CPUF_GO 0x8000 /* CPU should start running */ 219 220 /* 221 * We statically allocate the CPU info for the primary CPU (or, 222 * the only CPU on uniprocessors), and the primary CPU is the 223 * first CPU on the CPU info list. 224 */ 225 extern struct cpu_info cpu_info_primary; 226 extern struct cpu_info *cpu_info_list; 227 228 #define CPU_INFO_ITERATOR int 229 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 230 ci != NULL; ci = ci->ci_next 231 232 #define X86_MAXPROCS 32 /* because we use a bitmask */ 233 234 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 235 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 236 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 237 238 #if !defined(__GNUC__) || defined(_LKM) 239 /* For non-GCC and modules */ 240 struct cpu_info *x86_curcpu(void); 241 lwp_t *x86_curlwp(void); 242 void cpu_set_curpri(int); 243 #endif 244 245 #define cpu_number() (cpu_index(curcpu())) 246 247 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 248 249 #define X86_AST_GENERIC 0x01 250 #define X86_AST_PREEMPT 0x02 251 252 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 253 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 254 255 void cpu_boot_secondary_processors(void); 256 void cpu_init_idle_lwps(void); 257 void cpu_init_msrs(struct cpu_info *, bool); 258 259 extern uint32_t cpus_attached; 260 #ifndef XEN 261 #define curcpu() x86_curcpu() 262 #define curlwp x86_curlwp() 263 #else 264 /* XXX initgdt() calls pmap_kenter_pa() which calls splvm() before %fs is set */ 265 #define curcpu() (&cpu_info_primary) 266 #define curlwp curcpu()->ci_curlwp 267 #endif 268 #define curpcb (&curlwp->l_addr->u_pcb) 269 270 /* 271 * Arguments to hardclock, softclock and statclock 272 * encapsulate the previous machine state in an opaque 273 * clockframe; for now, use generic intrframe. 274 */ 275 struct clockframe { 276 struct intrframe cf_if; 277 }; 278 279 /* 280 * Give a profiling tick to the current process when the user profiling 281 * buffer pages are invalid. On the i386, request an ast to send us 282 * through trap(), marking the proc as needing a profiling tick. 283 */ 284 extern void cpu_need_proftick(struct lwp *l); 285 286 /* 287 * Notify the LWP l that it has a signal pending, process as soon as 288 * possible. 289 */ 290 extern void cpu_signotify(struct lwp *); 291 292 /* 293 * We need a machine-independent name for this. 294 */ 295 extern void (*delay_func)(unsigned int); 296 struct timeval; 297 298 #define DELAY(x) (*delay_func)(x) 299 #define delay(x) (*delay_func)(x) 300 301 extern int biosbasemem; 302 extern int biosextmem; 303 extern unsigned int cpu_feature; 304 extern unsigned int cpu_feature2; 305 extern unsigned int cpu_feature_padlock; 306 extern int cpu; 307 extern int cpuid_level; 308 extern int cpu_class; 309 extern char cpu_brand_string[]; 310 311 extern int i386_use_fxsave; 312 extern int i386_has_sse; 313 extern int i386_has_sse2; 314 315 extern void (*x86_cpu_idle)(void); 316 #define cpu_idle() (*x86_cpu_idle)() 317 318 /* machdep.c */ 319 void dumpconf(void); 320 void cpu_reset(void); 321 void i386_proc0_tss_ldt_init(void); 322 void dumpconf(void); 323 void cpu_reset(void); 324 void x86_64_proc0_tss_ldt_init(void); 325 void x86_64_init_pcb_tss_ldt(struct cpu_info *); 326 327 /* longrun.c */ 328 u_int tmx86_get_longrun_mode(void); 329 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 330 void tmx86_init_longrun(void); 331 332 /* identcpu.c */ 333 void cpu_probe(struct cpu_info *); 334 void cpu_identify(struct cpu_info *); 335 336 /* vm_machdep.c */ 337 void cpu_proc_fork(struct proc *, struct proc *); 338 339 /* locore.s */ 340 struct region_descriptor; 341 void lgdt(struct region_descriptor *); 342 #ifdef XEN 343 void lgdt_finish(void); 344 void i386_switch_context(lwp_t *); 345 #endif 346 void fillw(short, void *, size_t); 347 348 struct pcb; 349 void savectx(struct pcb *); 350 void lwp_trampoline(void); 351 void child_trampoline(void); 352 #ifdef XEN 353 void startrtclock(void); 354 void xen_delay(unsigned int); 355 void xen_initclocks(void); 356 #else 357 /* clock.c */ 358 void initrtclock(u_long); 359 void startrtclock(void); 360 void i8254_delay(unsigned int); 361 void i8254_microtime(struct timeval *); 362 void i8254_initclocks(void); 363 #endif 364 365 /* cpu.c */ 366 367 void cpu_probe_features(struct cpu_info *); 368 369 /* npx.c */ 370 void npxsave_lwp(struct lwp *, bool); 371 void npxsave_cpu(bool); 372 373 /* vm_machdep.c */ 374 int kvtop(void *); 375 376 #ifdef USER_LDT 377 /* sys_machdep.h */ 378 int x86_get_ldt(struct lwp *, void *, register_t *); 379 int x86_set_ldt(struct lwp *, void *, register_t *); 380 #endif 381 382 /* isa_machdep.c */ 383 void isa_defaultirq(void); 384 int isa_nmi(void); 385 386 #ifdef VM86 387 /* vm86.c */ 388 void vm86_gpfault(struct lwp *, int); 389 #endif /* VM86 */ 390 391 /* consinit.c */ 392 void kgdb_port_init(void); 393 394 /* bus_machdep.c */ 395 void x86_bus_space_init(void); 396 void x86_bus_space_mallocok(void); 397 398 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 399 400 #endif /* _KERNEL */ 401 402 /* 403 * CTL_MACHDEP definitions. 404 */ 405 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 406 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 407 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 408 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 409 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 410 #define CPU_DISKINFO 6 /* struct disklist *: 411 * disk geometry information */ 412 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 413 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 414 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 415 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 416 #define CPU_TMLR_MODE 11 /* int: longrun mode 417 * 0: minimum frequency 418 * 1: economy 419 * 2: performance 420 * 3: maximum frequency 421 */ 422 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 423 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 424 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 425 #define CPU_MAXID 15 /* number of valid machdep ids */ 426 427 /* 428 * Structure for CPU_DISKINFO sysctl call. 429 * XXX this should be somewhere else. 430 */ 431 #define MAX_BIOSDISKS 16 432 433 struct disklist { 434 int dl_nbiosdisks; /* number of bios disks */ 435 struct biosdisk_info { 436 int bi_dev; /* BIOS device # (0x80 ..) */ 437 int bi_cyl; /* cylinders on disk */ 438 int bi_head; /* heads per track */ 439 int bi_sec; /* sectors per track */ 440 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 441 #define BIFLAG_INVALID 0x01 442 #define BIFLAG_EXTINT13 0x02 443 int bi_flags; 444 } dl_biosdisks[MAX_BIOSDISKS]; 445 446 int dl_nnativedisks; /* number of native disks */ 447 struct nativedisk_info { 448 char ni_devname[16]; /* native device name */ 449 int ni_nmatches; /* # of matches w/ BIOS */ 450 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 451 } dl_nativedisks[1]; /* actually longer */ 452 }; 453 #endif /* !_X86_CPU_H_ */ 454
Indexes created Tue Sep 23 07:09:52 GMT 2025