cpu.h revision 1.48
1 /* $NetBSD: cpu.h,v 1.48 2012/02/17 18:40:18 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdbool.h> 44 #endif /* _KERNEL || _STANDALONE */ 45 46 #if defined(_KERNEL) || defined(_KMEMUSER) 47 #if defined(_KERNEL_OPT) 48 #include "opt_xen.h" 49 #ifdef i386 50 #include "opt_user_ldt.h" 51 #include "opt_vm86.h" 52 #endif 53 #endif 54 55 /* 56 * Definitions unique to x86 cpu support. 57 */ 58 #include <machine/frame.h> 59 #include <machine/pte.h> 60 #include <machine/segments.h> 61 #include <machine/tss.h> 62 #include <machine/intrdefs.h> 63 64 #include <x86/cacheinfo.h> 65 66 #include <sys/cpu_data.h> 67 #include <sys/evcnt.h> 68 #include <sys/device_if.h> /* for device_t */ 69 70 #ifdef XEN 71 #include <xen/xen-public/xen.h> 72 #include <xen/xen-public/event_channel.h> 73 #include <sys/mutex.h> 74 #endif /* XEN */ 75 76 struct intrsource; 77 struct pmap; 78 struct device; 79 80 #ifdef __x86_64__ 81 #define i386tss x86_64_tss 82 #endif 83 84 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 85 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 86 87 /* 88 * a bunch of this belongs in cpuvar.h; move it later.. 89 */ 90 91 struct cpu_info { 92 struct cpu_data ci_data; /* MI per-cpu data */ 93 device_t ci_dev; /* pointer to our device */ 94 struct cpu_info *ci_self; /* self-pointer */ 95 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 96 void *ci_tlog_base; /* Trap log base */ 97 int32_t ci_tlog_offset; /* Trap log current offset */ 98 99 /* 100 * Will be accessed by other CPUs. 101 */ 102 struct cpu_info *ci_next; /* next cpu */ 103 struct lwp *ci_curlwp; /* current owner of the processor */ 104 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 105 int ci_fpsaving; /* save in progress */ 106 int ci_fpused; /* XEN: FPU was used by curlwp */ 107 cpuid_t ci_cpuid; /* our CPU ID */ 108 int ci_cpumask; /* (1 << CPU ID) */ 109 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 110 uint32_t ci_initapicid; /* our intitial APIC ID */ 111 112 /* 113 * Private members. 114 */ 115 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 116 struct pmap *ci_pmap; /* current pmap */ 117 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 118 int ci_want_pmapload; /* pmap_load() is needed */ 119 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 120 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 121 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 122 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 123 int ci_curldt; /* current LDT descriptor */ 124 int ci_nintrhand; /* number of H/W interrupt handlers */ 125 uint64_t ci_scratch; 126 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 127 128 #ifdef XEN 129 struct iplsource *ci_isources[NIPL]; 130 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 131 #else 132 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 133 #endif 134 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 135 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 136 137 /* The following must be aligned for cmpxchg8b. */ 138 struct { 139 uint32_t ipending; 140 int ilevel; 141 } ci_istate __aligned(8); 142 #define ci_ipending ci_istate.ipending 143 #define ci_ilevel ci_istate.ilevel 144 145 int ci_idepth; 146 void * ci_intrstack; 147 uint32_t ci_imask[NIPL]; 148 uint32_t ci_iunmask[NIPL]; 149 150 uint32_t ci_flags; /* flags; see below */ 151 uint32_t ci_ipis; /* interprocessor interrupts pending */ 152 uint32_t sc_apic_version; /* local APIC version */ 153 154 uint32_t ci_signature; /* X86 cpuid type */ 155 uint32_t ci_vendor[4]; /* vendor string */ 156 uint32_t ci_cpu_serial[3]; /* PIII serial number */ 157 volatile uint32_t ci_lapic_counter; 158 159 uint32_t ci_feat_val[5]; /* X86 CPUID feature bits 160 * [0] basic features %edx 161 * [1] basic features %ecx 162 * [2] extended features %edx 163 * [3] extended features %ecx 164 * [4] VIA padlock features 165 */ 166 167 const struct cpu_functions *ci_func; /* start/stop functions */ 168 struct trapframe *ci_ddb_regs; 169 170 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 171 struct x86_cache_info ci_cinfo[CAI_COUNT]; 172 173 union descriptor *ci_gdt; 174 175 #ifdef i386 176 struct i386tss ci_doubleflt_tss; 177 struct i386tss ci_ddbipi_tss; 178 #endif 179 180 #ifdef PAE 181 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 182 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 183 #endif 184 185 #if defined(XEN) && (defined(PAE) || defined(__x86_64__)) 186 /* Currently active user PGD (can't use rcr3() with Xen) */ 187 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 188 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 189 kmutex_t ci_kpm_mtx; 190 #if defined(__x86_64__) 191 /* per-cpu version of normal_pdes */ 192 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */ 193 paddr_t ci_xen_current_user_pgd; 194 #endif /* __x86_64__ */ 195 #endif /* XEN et.al */ 196 197 char *ci_doubleflt_stack; 198 char *ci_ddbipi_stack; 199 200 #ifndef XEN 201 struct evcnt ci_ipi_events[X86_NIPI]; 202 #else /* XEN */ 203 struct evcnt ci_ipi_events[XEN_NIPIS]; 204 evtchn_port_t ci_ipi_evtchn; 205 #endif /* XEN */ 206 207 device_t ci_frequency; /* Frequency scaling technology */ 208 device_t ci_padlock; /* VIA PadLock private storage */ 209 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 210 device_t ci_vm; /* Virtual machine guest driver */ 211 212 struct i386tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 213 char ci_iomap[IOMAPSIZE]; /* I/O Bitmap */ 214 int ci_tss_sel; /* TSS selector of this cpu */ 215 216 /* 217 * The following two are actually region_descriptors, 218 * but that would pollute the namespace. 219 */ 220 uintptr_t ci_suspend_gdt; 221 uint16_t ci_suspend_gdt_padding; 222 uintptr_t ci_suspend_idt; 223 uint16_t ci_suspend_idt_padding; 224 225 uint16_t ci_suspend_tr; 226 uint16_t ci_suspend_ldt; 227 uintptr_t ci_suspend_fs; 228 uintptr_t ci_suspend_gs; 229 uintptr_t ci_suspend_kgs; 230 uintptr_t ci_suspend_efer; 231 uintptr_t ci_suspend_reg[12]; 232 uintptr_t ci_suspend_cr0; 233 uintptr_t ci_suspend_cr2; 234 uintptr_t ci_suspend_cr3; 235 uintptr_t ci_suspend_cr4; 236 uintptr_t ci_suspend_cr8; 237 238 /* The following must be in a single cache line. */ 239 int ci_want_resched __aligned(64); 240 int ci_padout __aligned(64); 241 }; 242 243 /* 244 * Macros to handle (some) trapframe registers for common x86 code. 245 */ 246 #ifdef __x86_64__ 247 #define X86_TF_RAX(tf) tf->tf_rax 248 #define X86_TF_RDX(tf) tf->tf_rdx 249 #define X86_TF_RSP(tf) tf->tf_rsp 250 #define X86_TF_RIP(tf) tf->tf_rip 251 #define X86_TF_RFLAGS(tf) tf->tf_rflags 252 #else 253 #define X86_TF_RAX(tf) tf->tf_eax 254 #define X86_TF_RDX(tf) tf->tf_edx 255 #define X86_TF_RSP(tf) tf->tf_esp 256 #define X86_TF_RIP(tf) tf->tf_eip 257 #define X86_TF_RFLAGS(tf) tf->tf_eflags 258 #endif 259 260 /* 261 * Processor flag notes: The "primary" CPU has certain MI-defined 262 * roles (mostly relating to hardclock handling); we distinguish 263 * betwen the processor which booted us, and the processor currently 264 * holding the "primary" role just to give us the flexibility later to 265 * change primaries should we be sufficiently twisted. 266 */ 267 268 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 269 #define CPUF_AP 0x0002 /* CPU is an AP */ 270 #define CPUF_SP 0x0004 /* CPU is only processor */ 271 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 272 273 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 274 #define CPUF_PRESENT 0x1000 /* CPU is present */ 275 #define CPUF_RUNNING 0x2000 /* CPU is running */ 276 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 277 #define CPUF_GO 0x8000 /* CPU should start running */ 278 279 #endif /* _KERNEL || __KMEMUSER */ 280 281 #ifdef _KERNEL 282 /* 283 * We statically allocate the CPU info for the primary CPU (or, 284 * the only CPU on uniprocessors), and the primary CPU is the 285 * first CPU on the CPU info list. 286 */ 287 extern struct cpu_info cpu_info_primary; 288 extern struct cpu_info *cpu_info_list; 289 290 #define CPU_INFO_ITERATOR int 291 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 292 ci != NULL; ci = ci->ci_next 293 294 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 295 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 296 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 297 298 #if !defined(__GNUC__) || defined(_MODULE) 299 /* For non-GCC and modules */ 300 struct cpu_info *x86_curcpu(void); 301 void cpu_set_curpri(int); 302 # ifdef __GNUC__ 303 lwp_t *x86_curlwp(void) __attribute__ ((const)); 304 # else 305 lwp_t *x86_curlwp(void); 306 # endif 307 #endif 308 309 #define cpu_number() (cpu_index(curcpu())) 310 311 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 312 313 #define X86_AST_GENERIC 0x01 314 #define X86_AST_PREEMPT 0x02 315 316 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 317 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 318 319 void cpu_boot_secondary_processors(void); 320 void cpu_init_idle_lwps(void); 321 void cpu_init_msrs(struct cpu_info *, bool); 322 void cpu_load_pmap(struct pmap *, struct pmap *); 323 void cpu_broadcast_halt(void); 324 void cpu_kick(struct cpu_info *); 325 326 extern uint32_t cpus_attached; 327 328 #define curcpu() x86_curcpu() 329 #define curlwp x86_curlwp() 330 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 331 332 /* 333 * Arguments to hardclock, softclock and statclock 334 * encapsulate the previous machine state in an opaque 335 * clockframe; for now, use generic intrframe. 336 */ 337 struct clockframe { 338 struct intrframe cf_if; 339 }; 340 341 /* 342 * Give a profiling tick to the current process when the user profiling 343 * buffer pages are invalid. On the i386, request an ast to send us 344 * through trap(), marking the proc as needing a profiling tick. 345 */ 346 extern void cpu_need_proftick(struct lwp *l); 347 348 /* 349 * Notify the LWP l that it has a signal pending, process as soon as 350 * possible. 351 */ 352 extern void cpu_signotify(struct lwp *); 353 354 /* 355 * We need a machine-independent name for this. 356 */ 357 extern void (*delay_func)(unsigned int); 358 struct timeval; 359 360 #define DELAY(x) (*delay_func)(x) 361 #define delay(x) (*delay_func)(x) 362 363 extern int biosbasemem; 364 extern int biosextmem; 365 extern int cpu; 366 extern int cpuid_level; 367 extern int cpu_class; 368 extern char cpu_brand_string[]; 369 extern int use_pae; 370 371 extern int i386_use_fxsave; 372 extern int i386_has_sse; 373 extern int i386_has_sse2; 374 375 extern void (*x86_cpu_idle)(void); 376 #define cpu_idle() (*x86_cpu_idle)() 377 378 /* machdep.c */ 379 void dumpconf(void); 380 void cpu_reset(void); 381 void i386_proc0_tss_ldt_init(void); 382 void dumpconf(void); 383 void cpu_reset(void); 384 void x86_64_proc0_tss_ldt_init(void); 385 void x86_64_init_pcb_tss_ldt(struct cpu_info *); 386 387 /* longrun.c */ 388 u_int tmx86_get_longrun_mode(void); 389 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 390 void tmx86_init_longrun(void); 391 392 /* identcpu.c */ 393 void cpu_probe(struct cpu_info *); 394 void cpu_identify(struct cpu_info *); 395 396 /* cpu_topology.c */ 397 void x86_cpu_topology(struct cpu_info *); 398 399 /* vm_machdep.c */ 400 void cpu_proc_fork(struct proc *, struct proc *); 401 402 /* locore.s */ 403 struct region_descriptor; 404 void lgdt(struct region_descriptor *); 405 #ifdef XEN 406 void lgdt_finish(void); 407 void i386_switch_context(lwp_t *); 408 #endif 409 410 struct pcb; 411 void savectx(struct pcb *); 412 void lwp_trampoline(void); 413 void child_trampoline(void); 414 #ifdef XEN 415 void startrtclock(void); 416 void xen_delay(unsigned int); 417 void xen_initclocks(void); 418 void xen_suspendclocks(struct cpu_info *); 419 void xen_resumeclocks(struct cpu_info *); 420 #else 421 /* clock.c */ 422 void initrtclock(u_long); 423 void startrtclock(void); 424 void i8254_delay(unsigned int); 425 void i8254_microtime(struct timeval *); 426 void i8254_initclocks(void); 427 #endif 428 429 /* cpu.c */ 430 431 void cpu_probe_features(struct cpu_info *); 432 433 /* npx.c */ 434 void npxsave_lwp(struct lwp *, bool); 435 void npxsave_cpu(bool); 436 437 /* vm_machdep.c */ 438 paddr_t kvtop(void *); 439 440 #ifdef USER_LDT 441 /* sys_machdep.h */ 442 int x86_get_ldt(struct lwp *, void *, register_t *); 443 int x86_set_ldt(struct lwp *, void *, register_t *); 444 #endif 445 446 /* isa_machdep.c */ 447 void isa_defaultirq(void); 448 int isa_nmi(void); 449 450 #ifdef VM86 451 /* vm86.c */ 452 void vm86_gpfault(struct lwp *, int); 453 #endif /* VM86 */ 454 455 /* consinit.c */ 456 void kgdb_port_init(void); 457 458 /* bus_machdep.c */ 459 void x86_bus_space_init(void); 460 void x86_bus_space_mallocok(void); 461 462 #endif /* _KERNEL */ 463 464 #if defined(_KERNEL) || defined(_KMEMUSER) 465 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 466 #endif /* _KERNEL || __KMEMUSER */ 467 468 /* 469 * CTL_MACHDEP definitions. 470 */ 471 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 472 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 473 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 474 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 475 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 476 #define CPU_DISKINFO 6 /* struct disklist *: 477 * disk geometry information */ 478 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 479 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 480 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 481 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 482 #define CPU_TMLR_MODE 11 /* int: longrun mode 483 * 0: minimum frequency 484 * 1: economy 485 * 2: performance 486 * 3: maximum frequency 487 */ 488 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 489 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 490 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 491 #define CPU_MAXID 15 /* number of valid machdep ids */ 492 493 /* 494 * Structure for CPU_DISKINFO sysctl call. 495 * XXX this should be somewhere else. 496 */ 497 #define MAX_BIOSDISKS 16 498 499 struct disklist { 500 int dl_nbiosdisks; /* number of bios disks */ 501 struct biosdisk_info { 502 int bi_dev; /* BIOS device # (0x80 ..) */ 503 int bi_cyl; /* cylinders on disk */ 504 int bi_head; /* heads per track */ 505 int bi_sec; /* sectors per track */ 506 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 507 #define BIFLAG_INVALID 0x01 508 #define BIFLAG_EXTINT13 0x02 509 int bi_flags; 510 } dl_biosdisks[MAX_BIOSDISKS]; 511 512 int dl_nnativedisks; /* number of native disks */ 513 struct nativedisk_info { 514 char ni_devname[16]; /* native device name */ 515 int ni_nmatches; /* # of matches w/ BIOS */ 516 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 517 } dl_nativedisks[1]; /* actually longer */ 518 }; 519 #endif /* !_X86_CPU_H_ */ 520
Indexes created Thu Sep 25 16:09:42 GMT 2025