cpu.h revision 1.5
1 /* $NetBSD: cpu.h,v 1.5 2008/05/22 13:55:51 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #ifdef _KERNEL 41 #if defined(_KERNEL_OPT) 42 #include "opt_xen.h" 43 #ifdef i386 44 #include "opt_user_ldt.h" 45 #include "opt_vm86.h" 46 #endif 47 #endif 48 49 /* 50 * Definitions unique to x86 cpu support. 51 */ 52 #include <machine/frame.h> 53 #include <machine/segments.h> 54 #include <machine/tss.h> 55 #include <machine/intrdefs.h> 56 57 #include <x86/cacheinfo.h> 58 #include <x86/via_padlock.h> 59 60 #include <sys/cpu_data.h> 61 62 #include <lib/libkern/libkern.h> /* offsetof */ 63 64 struct intrsource; 65 struct pmap; 66 struct device; 67 68 #ifdef __x86_64__ 69 #define i386tss x86_64_tss 70 #endif 71 72 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 73 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 74 75 /* 76 * a bunch of this belongs in cpuvar.h; move it later.. 77 */ 78 79 struct cpu_info { 80 struct device *ci_dev; /* pointer to our device */ 81 struct cpu_info *ci_self; /* self-pointer */ 82 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 83 void *ci_tlog_base; /* Trap log base */ 84 int32_t ci_tlog_offset; /* Trap log current offset */ 85 86 /* 87 * Will be accessed by other CPUs. 88 */ 89 struct cpu_info *ci_next; /* next cpu */ 90 struct lwp *ci_curlwp; /* current owner of the processor */ 91 struct pmap_cpu *ci_pmap_cpu; /* per-CPU pmap data */ 92 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 93 int ci_fpsaving; /* save in progress */ 94 int ci_fpused; /* XEN: FPU was used by curlwp */ 95 cpuid_t ci_cpuid; /* our CPU ID */ 96 int ci_cpumask; /* (1 << CPU ID) */ 97 uint8_t ci_initapicid; /* our intitial APIC ID */ 98 uint8_t ci_packageid; 99 uint8_t ci_coreid; 100 uint8_t ci_smtid; 101 struct cpu_data ci_data; /* MI per-cpu data */ 102 103 /* 104 * Private members. 105 */ 106 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 107 struct pmap *ci_pmap; /* current pmap */ 108 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 109 int ci_want_pmapload; /* pmap_load() is needed */ 110 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 111 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 112 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 113 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 114 int ci_curldt; /* current LDT descriptor */ 115 uint64_t ci_scratch; 116 117 #ifdef XEN 118 struct iplsource *ci_isources[NIPL]; 119 #else 120 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 121 #endif 122 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 123 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 124 125 /* The following must be aligned for cmpxchg8b. */ 126 struct { 127 uint32_t ipending; 128 int ilevel; 129 } ci_istate __aligned(8); 130 #define ci_ipending ci_istate.ipending 131 #define ci_ilevel ci_istate.ilevel 132 133 int ci_idepth; 134 void * ci_intrstack; 135 uint32_t ci_imask[NIPL]; 136 uint32_t ci_iunmask[NIPL]; 137 138 uint32_t ci_flags; /* flags; see below */ 139 uint32_t ci_ipis; /* interprocessor interrupts pending */ 140 int sc_apic_version; /* local APIC version */ 141 142 uint32_t ci_signature; /* X86 cpuid type */ 143 uint32_t ci_feature_flags;/* X86 %edx CPUID feature bits */ 144 uint32_t ci_feature2_flags;/* X86 %ecx CPUID feature bits */ 145 uint32_t ci_feature3_flags;/* X86 extended feature bits */ 146 uint32_t ci_padlock_flags;/* VIA PadLock feature bits */ 147 uint32_t ci_vendor[4]; /* vendor string */ 148 uint32_t ci_cpu_serial[3]; /* PIII serial number */ 149 volatile uint32_t ci_lapic_counter; 150 151 const struct cpu_functions *ci_func; /* start/stop functions */ 152 struct trapframe *ci_ddb_regs; 153 154 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 155 struct x86_cache_info ci_cinfo[CAI_COUNT]; 156 157 union descriptor *ci_gdt; 158 159 #ifdef i386 160 struct i386tss ci_doubleflt_tss; 161 struct i386tss ci_ddbipi_tss; 162 #endif 163 char *ci_doubleflt_stack; 164 char *ci_ddbipi_stack; 165 166 struct evcnt ci_ipi_events[X86_NIPI]; 167 168 struct via_padlock ci_vp; /* VIA PadLock private storage */ 169 170 struct i386tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 171 char ci_iomap[IOMAPSIZE]; /* I/O Bitmap */ 172 int ci_tss_sel; /* TSS selector of this cpu */ 173 174 /* 175 * The following two are actually region_descriptors, 176 * but that would pollute the namespace. 177 */ 178 uintptr_t ci_suspend_gdt; 179 uint16_t ci_suspend_gdt_padding; 180 uintptr_t ci_suspend_idt; 181 uint16_t ci_suspend_idt_padding; 182 183 uint16_t ci_suspend_tr; 184 uint16_t ci_suspend_ldt; 185 uintptr_t ci_suspend_fs; 186 uintptr_t ci_suspend_gs; 187 uintptr_t ci_suspend_kgs; 188 uintptr_t ci_suspend_efer; 189 uintptr_t ci_suspend_reg[12]; 190 uintptr_t ci_suspend_cr0; 191 uintptr_t ci_suspend_cr2; 192 uintptr_t ci_suspend_cr3; 193 uintptr_t ci_suspend_cr4; 194 uintptr_t ci_suspend_cr8; 195 196 /* The following must be in a single cache line. */ 197 int ci_want_resched __aligned(64); 198 int ci_padout __aligned(64); 199 }; 200 201 /* 202 * Processor flag notes: The "primary" CPU has certain MI-defined 203 * roles (mostly relating to hardclock handling); we distinguish 204 * betwen the processor which booted us, and the processor currently 205 * holding the "primary" role just to give us the flexibility later to 206 * change primaries should we be sufficiently twisted. 207 */ 208 209 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 210 #define CPUF_AP 0x0002 /* CPU is an AP */ 211 #define CPUF_SP 0x0004 /* CPU is only processor */ 212 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 213 214 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 215 #define CPUF_PRESENT 0x1000 /* CPU is present */ 216 #define CPUF_RUNNING 0x2000 /* CPU is running */ 217 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 218 #define CPUF_GO 0x8000 /* CPU should start running */ 219 220 /* 221 * We statically allocate the CPU info for the primary CPU (or, 222 * the only CPU on uniprocessors), and the primary CPU is the 223 * first CPU on the CPU info list. 224 */ 225 extern struct cpu_info cpu_info_primary; 226 extern struct cpu_info *cpu_info_list; 227 228 #define CPU_INFO_ITERATOR int 229 #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = cpu_info_list; \ 230 ci != NULL; ci = ci->ci_next 231 232 #define X86_MAXPROCS 32 /* because we use a bitmask */ 233 234 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 235 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 236 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 237 238 #if !defined(__GNUC__) || defined(_LKM) 239 /* For non-GCC and modules */ 240 struct cpu_info *x86_curcpu(void); 241 void cpu_set_curpri(int); 242 # ifdef __GNUC__ 243 lwp_t *x86_curlwp(void) __attribute__ ((const)); 244 # else 245 lwp_t *x86_curlwp(void); 246 # endif 247 #endif 248 249 #define cpu_number() (cpu_index(curcpu())) 250 251 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 252 253 #define X86_AST_GENERIC 0x01 254 #define X86_AST_PREEMPT 0x02 255 256 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 257 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 258 259 void cpu_boot_secondary_processors(void); 260 void cpu_init_idle_lwps(void); 261 void cpu_init_msrs(struct cpu_info *, bool); 262 263 extern uint32_t cpus_attached; 264 #ifndef XEN 265 #define curcpu() x86_curcpu() 266 #define curlwp x86_curlwp() 267 #else 268 /* XXX initgdt() calls pmap_kenter_pa() which calls splvm() before %fs is set */ 269 #define curcpu() (&cpu_info_primary) 270 #define curlwp curcpu()->ci_curlwp 271 #endif 272 #define curpcb (&curlwp->l_addr->u_pcb) 273 274 /* 275 * Arguments to hardclock, softclock and statclock 276 * encapsulate the previous machine state in an opaque 277 * clockframe; for now, use generic intrframe. 278 */ 279 struct clockframe { 280 struct intrframe cf_if; 281 }; 282 283 /* 284 * Give a profiling tick to the current process when the user profiling 285 * buffer pages are invalid. On the i386, request an ast to send us 286 * through trap(), marking the proc as needing a profiling tick. 287 */ 288 extern void cpu_need_proftick(struct lwp *l); 289 290 /* 291 * Notify the LWP l that it has a signal pending, process as soon as 292 * possible. 293 */ 294 extern void cpu_signotify(struct lwp *); 295 296 /* 297 * We need a machine-independent name for this. 298 */ 299 extern void (*delay_func)(unsigned int); 300 struct timeval; 301 302 #define DELAY(x) (*delay_func)(x) 303 #define delay(x) (*delay_func)(x) 304 305 extern int biosbasemem; 306 extern int biosextmem; 307 extern unsigned int cpu_feature; 308 extern unsigned int cpu_feature2; 309 extern unsigned int cpu_feature_padlock; 310 extern int cpu; 311 extern int cpuid_level; 312 extern int cpu_class; 313 extern char cpu_brand_string[]; 314 315 extern int i386_use_fxsave; 316 extern int i386_has_sse; 317 extern int i386_has_sse2; 318 319 extern void (*x86_cpu_idle)(void); 320 #define cpu_idle() (*x86_cpu_idle)() 321 322 /* machdep.c */ 323 void dumpconf(void); 324 void cpu_reset(void); 325 void i386_proc0_tss_ldt_init(void); 326 void dumpconf(void); 327 void cpu_reset(void); 328 void x86_64_proc0_tss_ldt_init(void); 329 void x86_64_init_pcb_tss_ldt(struct cpu_info *); 330 331 /* longrun.c */ 332 u_int tmx86_get_longrun_mode(void); 333 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 334 void tmx86_init_longrun(void); 335 336 /* identcpu.c */ 337 void cpu_probe(struct cpu_info *); 338 void cpu_identify(struct cpu_info *); 339 340 /* vm_machdep.c */ 341 void cpu_proc_fork(struct proc *, struct proc *); 342 343 /* locore.s */ 344 struct region_descriptor; 345 void lgdt(struct region_descriptor *); 346 #ifdef XEN 347 void lgdt_finish(void); 348 void i386_switch_context(lwp_t *); 349 #endif 350 void fillw(short, void *, size_t); 351 352 struct pcb; 353 void savectx(struct pcb *); 354 void lwp_trampoline(void); 355 void child_trampoline(void); 356 #ifdef XEN 357 void startrtclock(void); 358 void xen_delay(unsigned int); 359 void xen_initclocks(void); 360 #else 361 /* clock.c */ 362 void initrtclock(u_long); 363 void startrtclock(void); 364 void i8254_delay(unsigned int); 365 void i8254_microtime(struct timeval *); 366 void i8254_initclocks(void); 367 #endif 368 369 /* cpu.c */ 370 371 void cpu_probe_features(struct cpu_info *); 372 373 /* npx.c */ 374 void npxsave_lwp(struct lwp *, bool); 375 void npxsave_cpu(bool); 376 377 /* vm_machdep.c */ 378 int kvtop(void *); 379 380 #ifdef USER_LDT 381 /* sys_machdep.h */ 382 int x86_get_ldt(struct lwp *, void *, register_t *); 383 int x86_set_ldt(struct lwp *, void *, register_t *); 384 #endif 385 386 /* isa_machdep.c */ 387 void isa_defaultirq(void); 388 int isa_nmi(void); 389 390 #ifdef VM86 391 /* vm86.c */ 392 void vm86_gpfault(struct lwp *, int); 393 #endif /* VM86 */ 394 395 /* consinit.c */ 396 void kgdb_port_init(void); 397 398 /* bus_machdep.c */ 399 void x86_bus_space_init(void); 400 void x86_bus_space_mallocok(void); 401 402 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 403 404 #endif /* _KERNEL */ 405 406 /* 407 * CTL_MACHDEP definitions. 408 */ 409 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 410 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 411 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 412 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 413 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 414 #define CPU_DISKINFO 6 /* struct disklist *: 415 * disk geometry information */ 416 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 417 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 418 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 419 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 420 #define CPU_TMLR_MODE 11 /* int: longrun mode 421 * 0: minimum frequency 422 * 1: economy 423 * 2: performance 424 * 3: maximum frequency 425 */ 426 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 427 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 428 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 429 #define CPU_MAXID 15 /* number of valid machdep ids */ 430 431 /* 432 * Structure for CPU_DISKINFO sysctl call. 433 * XXX this should be somewhere else. 434 */ 435 #define MAX_BIOSDISKS 16 436 437 struct disklist { 438 int dl_nbiosdisks; /* number of bios disks */ 439 struct biosdisk_info { 440 int bi_dev; /* BIOS device # (0x80 ..) */ 441 int bi_cyl; /* cylinders on disk */ 442 int bi_head; /* heads per track */ 443 int bi_sec; /* sectors per track */ 444 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 445 #define BIFLAG_INVALID 0x01 446 #define BIFLAG_EXTINT13 0x02 447 int bi_flags; 448 } dl_biosdisks[MAX_BIOSDISKS]; 449 450 int dl_nnativedisks; /* number of native disks */ 451 struct nativedisk_info { 452 char ni_devname[16]; /* native device name */ 453 int ni_nmatches; /* # of matches w/ BIOS */ 454 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 455 } dl_nativedisks[1]; /* actually longer */ 456 }; 457 #endif /* !_X86_CPU_H_ */ 458
Indexes created Tue Sep 23 07:09:52 GMT 2025