cpu.h revision 1.63
1 /* $NetBSD: cpu.h,v 1.63 2014/02/20 18:14:11 dsl Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #ifdef i386 51 #include "opt_user_ldt.h" 52 #include "opt_vm86.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/xen-public/xen.h> 73 #include <xen/xen-public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 80 #ifdef __x86_64__ 81 #define i386tss x86_64_tss 82 #endif 83 84 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 85 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 86 87 /* 88 * a bunch of this belongs in cpuvar.h; move it later.. 89 */ 90 91 struct cpu_info { 92 struct cpu_data ci_data; /* MI per-cpu data */ 93 device_t ci_dev; /* pointer to our device */ 94 struct cpu_info *ci_self; /* self-pointer */ 95 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 96 void *ci_tlog_base; /* Trap log base */ 97 int32_t ci_tlog_offset; /* Trap log current offset */ 98 99 /* 100 * Will be accessed by other CPUs. 101 */ 102 struct cpu_info *ci_next; /* next cpu */ 103 struct lwp *ci_curlwp; /* current owner of the processor */ 104 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 105 int _unused1[2]; 106 cpuid_t ci_cpuid; /* our CPU ID */ 107 int _unused; 108 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 109 uint32_t ci_initapicid; /* our intitial APIC ID */ 110 111 /* 112 * Private members. 113 */ 114 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 115 struct pmap *ci_pmap; /* current pmap */ 116 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 117 int ci_want_pmapload; /* pmap_load() is needed */ 118 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 119 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 120 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 121 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 122 int ci_curldt; /* current LDT descriptor */ 123 int ci_nintrhand; /* number of H/W interrupt handlers */ 124 uint64_t ci_scratch; 125 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 126 127 #ifdef XEN 128 struct iplsource *ci_isources[NIPL]; 129 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 130 #else 131 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 132 #endif 133 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 134 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 135 136 /* The following must be aligned for cmpxchg8b. */ 137 struct { 138 uint32_t ipending; 139 int ilevel; 140 } ci_istate __aligned(8); 141 #define ci_ipending ci_istate.ipending 142 #define ci_ilevel ci_istate.ilevel 143 144 int ci_idepth; 145 void * ci_intrstack; 146 uint32_t ci_imask[NIPL]; 147 uint32_t ci_iunmask[NIPL]; 148 149 uint32_t ci_flags; /* flags; see below */ 150 uint32_t ci_ipis; /* interprocessor interrupts pending */ 151 uint32_t sc_apic_version; /* local APIC version */ 152 153 uint32_t ci_signature; /* X86 cpuid type */ 154 uint32_t ci_vendor[4]; /* vendor string */ 155 uint32_t ci_cpu_serial[3]; /* PIII serial number */ 156 volatile uint32_t ci_lapic_counter; 157 158 uint32_t ci_feat_val[5]; /* X86 CPUID feature bits 159 * [0] basic features %edx 160 * [1] basic features %ecx 161 * [2] extended features %edx 162 * [3] extended features %ecx 163 * [4] VIA padlock features 164 */ 165 166 const struct cpu_functions *ci_func; /* start/stop functions */ 167 struct trapframe *ci_ddb_regs; 168 169 u_int ci_cflush_lsize; /* CFLUSH insn line size */ 170 struct x86_cache_info ci_cinfo[CAI_COUNT]; 171 172 union descriptor *ci_gdt; 173 174 #ifdef i386 175 struct i386tss ci_doubleflt_tss; 176 struct i386tss ci_ddbipi_tss; 177 #endif 178 179 #ifdef PAE 180 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 181 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 182 #endif 183 184 #if defined(XEN) && (defined(PAE) || defined(__x86_64__)) 185 /* Currently active user PGD (can't use rcr3() with Xen) */ 186 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 187 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 188 kmutex_t ci_kpm_mtx; 189 #if defined(__x86_64__) 190 /* per-cpu version of normal_pdes */ 191 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */ 192 paddr_t ci_xen_current_user_pgd; 193 #endif /* __x86_64__ */ 194 #endif /* XEN et.al */ 195 196 char *ci_doubleflt_stack; 197 char *ci_ddbipi_stack; 198 199 #ifndef XEN 200 struct evcnt ci_ipi_events[X86_NIPI]; 201 #else /* XEN */ 202 struct evcnt ci_ipi_events[XEN_NIPIS]; 203 evtchn_port_t ci_ipi_evtchn; 204 #endif /* XEN */ 205 206 device_t ci_frequency; /* Frequency scaling technology */ 207 device_t ci_padlock; /* VIA PadLock private storage */ 208 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 209 device_t ci_vm; /* Virtual machine guest driver */ 210 211 struct i386tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 212 char ci_iomap[IOMAPSIZE]; /* I/O Bitmap */ 213 int ci_tss_sel; /* TSS selector of this cpu */ 214 215 /* 216 * The following two are actually region_descriptors, 217 * but that would pollute the namespace. 218 */ 219 uintptr_t ci_suspend_gdt; 220 uint16_t ci_suspend_gdt_padding; 221 uintptr_t ci_suspend_idt; 222 uint16_t ci_suspend_idt_padding; 223 224 uint16_t ci_suspend_tr; 225 uint16_t ci_suspend_ldt; 226 uintptr_t ci_suspend_fs; 227 uintptr_t ci_suspend_gs; 228 uintptr_t ci_suspend_kgs; 229 uintptr_t ci_suspend_efer; 230 uintptr_t ci_suspend_reg[12]; 231 uintptr_t ci_suspend_cr0; 232 uintptr_t ci_suspend_cr2; 233 uintptr_t ci_suspend_cr3; 234 uintptr_t ci_suspend_cr4; 235 uintptr_t ci_suspend_cr8; 236 237 /* The following must be in a single cache line. */ 238 int ci_want_resched __aligned(64); 239 int ci_padout __aligned(64); 240 }; 241 242 /* 243 * Macros to handle (some) trapframe registers for common x86 code. 244 */ 245 #ifdef __x86_64__ 246 #define X86_TF_RAX(tf) tf->tf_rax 247 #define X86_TF_RDX(tf) tf->tf_rdx 248 #define X86_TF_RSP(tf) tf->tf_rsp 249 #define X86_TF_RIP(tf) tf->tf_rip 250 #define X86_TF_RFLAGS(tf) tf->tf_rflags 251 #else 252 #define X86_TF_RAX(tf) tf->tf_eax 253 #define X86_TF_RDX(tf) tf->tf_edx 254 #define X86_TF_RSP(tf) tf->tf_esp 255 #define X86_TF_RIP(tf) tf->tf_eip 256 #define X86_TF_RFLAGS(tf) tf->tf_eflags 257 #endif 258 259 /* 260 * Processor flag notes: The "primary" CPU has certain MI-defined 261 * roles (mostly relating to hardclock handling); we distinguish 262 * betwen the processor which booted us, and the processor currently 263 * holding the "primary" role just to give us the flexibility later to 264 * change primaries should we be sufficiently twisted. 265 */ 266 267 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 268 #define CPUF_AP 0x0002 /* CPU is an AP */ 269 #define CPUF_SP 0x0004 /* CPU is only processor */ 270 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 271 272 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 273 #define CPUF_PRESENT 0x1000 /* CPU is present */ 274 #define CPUF_RUNNING 0x2000 /* CPU is running */ 275 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 276 #define CPUF_GO 0x8000 /* CPU should start running */ 277 278 #endif /* _KERNEL || __KMEMUSER */ 279 280 #ifdef _KERNEL 281 /* 282 * We statically allocate the CPU info for the primary CPU (or, 283 * the only CPU on uniprocessors), and the primary CPU is the 284 * first CPU on the CPU info list. 285 */ 286 extern struct cpu_info cpu_info_primary; 287 extern struct cpu_info *cpu_info_list; 288 289 #define CPU_INFO_ITERATOR int __unused 290 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 291 ci != NULL; ci = ci->ci_next 292 293 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 294 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 295 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 296 297 #if !defined(__GNUC__) || defined(_MODULE) 298 /* For non-GCC and modules */ 299 struct cpu_info *x86_curcpu(void); 300 void cpu_set_curpri(int); 301 # ifdef __GNUC__ 302 lwp_t *x86_curlwp(void) __attribute__ ((const)); 303 # else 304 lwp_t *x86_curlwp(void); 305 # endif 306 #endif 307 308 #define cpu_number() (cpu_index(curcpu())) 309 310 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 311 312 #define X86_AST_GENERIC 0x01 313 #define X86_AST_PREEMPT 0x02 314 315 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 316 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 317 318 void cpu_boot_secondary_processors(void); 319 void cpu_init_idle_lwps(void); 320 void cpu_init_msrs(struct cpu_info *, bool); 321 void cpu_load_pmap(struct pmap *, struct pmap *); 322 void cpu_broadcast_halt(void); 323 void cpu_kick(struct cpu_info *); 324 325 #define curcpu() x86_curcpu() 326 #define curlwp x86_curlwp() 327 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 328 329 /* 330 * Arguments to hardclock, softclock and statclock 331 * encapsulate the previous machine state in an opaque 332 * clockframe; for now, use generic intrframe. 333 */ 334 struct clockframe { 335 struct intrframe cf_if; 336 }; 337 338 /* 339 * Give a profiling tick to the current process when the user profiling 340 * buffer pages are invalid. On the i386, request an ast to send us 341 * through trap(), marking the proc as needing a profiling tick. 342 */ 343 extern void cpu_need_proftick(struct lwp *l); 344 345 /* 346 * Notify the LWP l that it has a signal pending, process as soon as 347 * possible. 348 */ 349 extern void cpu_signotify(struct lwp *); 350 351 /* 352 * We need a machine-independent name for this. 353 */ 354 extern void (*delay_func)(unsigned int); 355 struct timeval; 356 357 #define DELAY(x) (*delay_func)(x) 358 #define delay(x) (*delay_func)(x) 359 360 extern int biosbasemem; 361 extern int biosextmem; 362 extern int cputype; 363 extern int cpuid_level; 364 extern int cpu_class; 365 extern char cpu_brand_string[]; 366 extern int use_pae; 367 368 #ifdef __i386__ 369 extern int i386_fpu_present; 370 int npx586bug1(int, int); 371 extern int i386_fpu_fdivbug; 372 extern int i386_use_fxsave; 373 extern int i386_has_sse; 374 extern int i386_has_sse2; 375 #else 376 #define i386_fpu_present 1 377 #define i386_fpu_fdivbug 0 378 #define i386_use_fxsave 1 379 #define i386_has_sse 1 380 #define i386_has_sse2 1 381 #endif 382 383 extern void (*x86_cpu_idle)(void); 384 #define cpu_idle() (*x86_cpu_idle)() 385 386 /* machdep.c */ 387 void dumpconf(void); 388 void cpu_reset(void); 389 void i386_proc0_tss_ldt_init(void); 390 void dumpconf(void); 391 void cpu_reset(void); 392 void x86_64_proc0_tss_ldt_init(void); 393 void x86_64_init_pcb_tss_ldt(struct cpu_info *); 394 395 /* longrun.c */ 396 u_int tmx86_get_longrun_mode(void); 397 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 398 void tmx86_init_longrun(void); 399 400 /* identcpu.c */ 401 void cpu_probe(struct cpu_info *); 402 void cpu_identify(struct cpu_info *); 403 404 /* cpu_topology.c */ 405 void x86_cpu_topology(struct cpu_info *); 406 407 /* vm_machdep.c */ 408 void cpu_proc_fork(struct proc *, struct proc *); 409 410 /* locore.s */ 411 struct region_descriptor; 412 void lgdt(struct region_descriptor *); 413 #ifdef XEN 414 void lgdt_finish(void); 415 #endif 416 417 struct pcb; 418 void savectx(struct pcb *); 419 void lwp_trampoline(void); 420 #ifdef XEN 421 void startrtclock(void); 422 void xen_delay(unsigned int); 423 void xen_initclocks(void); 424 void xen_suspendclocks(struct cpu_info *); 425 void xen_resumeclocks(struct cpu_info *); 426 #else 427 /* clock.c */ 428 void initrtclock(u_long); 429 void startrtclock(void); 430 void i8254_delay(unsigned int); 431 void i8254_microtime(struct timeval *); 432 void i8254_initclocks(void); 433 #endif 434 435 /* cpu.c */ 436 437 void cpu_probe_features(struct cpu_info *); 438 439 /* vm_machdep.c */ 440 paddr_t kvtop(void *); 441 442 #ifdef USER_LDT 443 /* sys_machdep.h */ 444 int x86_get_ldt(struct lwp *, void *, register_t *); 445 int x86_set_ldt(struct lwp *, void *, register_t *); 446 #endif 447 448 /* isa_machdep.c */ 449 void isa_defaultirq(void); 450 int isa_nmi(void); 451 452 #ifdef VM86 453 /* vm86.c */ 454 void vm86_gpfault(struct lwp *, int); 455 #endif /* VM86 */ 456 457 /* consinit.c */ 458 void kgdb_port_init(void); 459 460 /* bus_machdep.c */ 461 void x86_bus_space_init(void); 462 void x86_bus_space_mallocok(void); 463 464 #endif /* _KERNEL */ 465 466 #if defined(_KERNEL) || defined(_KMEMUSER) 467 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 468 #endif /* _KERNEL || __KMEMUSER */ 469 470 /* 471 * CTL_MACHDEP definitions. 472 */ 473 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 474 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 475 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 476 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 477 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 478 #define CPU_DISKINFO 6 /* struct disklist *: 479 * disk geometry information */ 480 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 481 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 482 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 483 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 484 #define CPU_TMLR_MODE 11 /* int: longrun mode 485 * 0: minimum frequency 486 * 1: economy 487 * 2: performance 488 * 3: maximum frequency 489 */ 490 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 491 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 492 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 493 #define CPU_MAXID 15 /* number of valid machdep ids */ 494 495 /* 496 * Structure for CPU_DISKINFO sysctl call. 497 * XXX this should be somewhere else. 498 */ 499 #define MAX_BIOSDISKS 16 500 501 struct disklist { 502 int dl_nbiosdisks; /* number of bios disks */ 503 struct biosdisk_info { 504 int bi_dev; /* BIOS device # (0x80 ..) */ 505 int bi_cyl; /* cylinders on disk */ 506 int bi_head; /* heads per track */ 507 int bi_sec; /* sectors per track */ 508 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 509 #define BIFLAG_INVALID 0x01 510 #define BIFLAG_EXTINT13 0x02 511 int bi_flags; 512 } dl_biosdisks[MAX_BIOSDISKS]; 513 514 int dl_nnativedisks; /* number of native disks */ 515 struct nativedisk_info { 516 char ni_devname[16]; /* native device name */ 517 int ni_nmatches; /* # of matches w/ BIOS */ 518 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 519 } dl_nativedisks[1]; /* actually longer */ 520 }; 521 #endif /* !_X86_CPU_H_ */ 522
Indexes created Thu Sep 25 16:09:42 GMT 2025