cpu.h revision 1.71
1 /* $NetBSD: cpu.h,v 1.71 2017/05/23 08:48:34 nonaka Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 #ifndef _X86_CPU_H_ 38 #define _X86_CPU_H_ 39 40 #if defined(_KERNEL) || defined(_STANDALONE) 41 #include <sys/types.h> 42 #else 43 #include <stdint.h> 44 #include <stdbool.h> 45 #endif /* _KERNEL || _STANDALONE */ 46 47 #if defined(_KERNEL) || defined(_KMEMUSER) 48 #if defined(_KERNEL_OPT) 49 #include "opt_xen.h" 50 #ifdef i386 51 #include "opt_user_ldt.h" 52 #include "opt_vm86.h" 53 #endif 54 #endif 55 56 /* 57 * Definitions unique to x86 cpu support. 58 */ 59 #include <machine/frame.h> 60 #include <machine/pte.h> 61 #include <machine/segments.h> 62 #include <machine/tss.h> 63 #include <machine/intrdefs.h> 64 65 #include <x86/cacheinfo.h> 66 67 #include <sys/cpu_data.h> 68 #include <sys/evcnt.h> 69 #include <sys/device_if.h> /* for device_t */ 70 71 #ifdef XEN 72 #include <xen/xen-public/xen.h> 73 #include <xen/xen-public/event_channel.h> 74 #include <sys/mutex.h> 75 #endif /* XEN */ 76 77 struct intrsource; 78 struct pmap; 79 80 #ifdef __x86_64__ 81 #define i386tss x86_64_tss 82 #endif 83 84 #define NIOPORTS 1024 /* # of ports we allow to be mapped */ 85 #define IOMAPSIZE (NIOPORTS / 8) /* I/O bitmap size in bytes */ 86 87 /* 88 * a bunch of this belongs in cpuvar.h; move it later.. 89 */ 90 91 struct cpu_info { 92 struct cpu_data ci_data; /* MI per-cpu data */ 93 device_t ci_dev; /* pointer to our device */ 94 struct cpu_info *ci_self; /* self-pointer */ 95 volatile struct vcpu_info *ci_vcpu; /* for XEN */ 96 void *ci_tlog_base; /* Trap log base */ 97 int32_t ci_tlog_offset; /* Trap log current offset */ 98 99 /* 100 * Will be accessed by other CPUs. 101 */ 102 struct cpu_info *ci_next; /* next cpu */ 103 struct lwp *ci_curlwp; /* current owner of the processor */ 104 struct lwp *ci_fpcurlwp; /* current owner of the FPU */ 105 int _unused1[2]; 106 cpuid_t ci_cpuid; /* our CPU ID */ 107 int _unused; 108 uint32_t ci_acpiid; /* our ACPI/MADT ID */ 109 uint32_t ci_initapicid; /* our intitial APIC ID */ 110 111 /* 112 * Private members. 113 */ 114 struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */ 115 struct pmap *ci_pmap; /* current pmap */ 116 int ci_need_tlbwait; /* need to wait for TLB invalidations */ 117 int ci_want_pmapload; /* pmap_load() is needed */ 118 volatile int ci_tlbstate; /* one of TLBSTATE_ states. see below */ 119 #define TLBSTATE_VALID 0 /* all user tlbs are valid */ 120 #define TLBSTATE_LAZY 1 /* tlbs are valid but won't be kept uptodate */ 121 #define TLBSTATE_STALE 2 /* we might have stale user tlbs */ 122 int ci_curldt; /* current LDT descriptor */ 123 int ci_nintrhand; /* number of H/W interrupt handlers */ 124 uint64_t ci_scratch; 125 uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)]; 126 127 #ifdef XEN 128 struct iplsource *ci_isources[NIPL]; 129 u_long ci_evtmask[NR_EVENT_CHANNELS]; /* events allowed on this CPU */ 130 #else 131 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 132 #endif 133 volatile int ci_mtx_count; /* Negative count of spin mutexes */ 134 volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */ 135 136 #ifndef __HAVE_DIRECT_MAP 137 #define VPAGE_SRC 0 138 #define VPAGE_DST 1 139 #define VPAGE_ZER 2 140 #define VPAGE_PTP 3 141 #define VPAGE_MAX 4 142 vaddr_t vpage[VPAGE_MAX]; 143 pt_entry_t *vpage_pte[VPAGE_MAX]; 144 #endif 145 146 /* The following must be aligned for cmpxchg8b. */ 147 struct { 148 uint32_t ipending; 149 int ilevel; 150 } ci_istate __aligned(8); 151 #define ci_ipending ci_istate.ipending 152 #define ci_ilevel ci_istate.ilevel 153 154 int ci_idepth; 155 void * ci_intrstack; 156 uint32_t ci_imask[NIPL]; 157 uint32_t ci_iunmask[NIPL]; 158 159 uint32_t ci_flags; /* flags; see below */ 160 uint32_t ci_ipis; /* interprocessor interrupts pending */ 161 uint32_t sc_apic_version; /* local APIC version */ 162 163 uint32_t ci_signature; /* X86 cpuid type (cpuid.1.%eax) */ 164 uint32_t ci_vendor[4]; /* vendor string */ 165 uint32_t _unused2; 166 uint32_t ci_max_cpuid; /* cpuid.0:%eax */ 167 uint32_t ci_max_ext_cpuid; /* cpuid.80000000:%eax */ 168 volatile uint32_t ci_lapic_counter; 169 170 uint32_t ci_feat_val[7]; /* X86 CPUID feature bits */ 171 /* [0] basic features cpuid.1:%edx 172 * [1] basic features cpuid.1:%ecx (CPUID2_xxx bits) 173 * [2] extended features cpuid:80000001:%edx 174 * [3] extended features cpuid:80000001:%ecx 175 * [4] VIA padlock features 176 * [5] structured extended features cpuid.7:%ebx 177 * [6] structured extended features cpuid.7:%ecx 178 */ 179 180 const struct cpu_functions *ci_func; /* start/stop functions */ 181 struct trapframe *ci_ddb_regs; 182 183 u_int ci_cflush_lsize; /* CLFLUSH insn line size */ 184 struct x86_cache_info ci_cinfo[CAI_COUNT]; 185 186 union descriptor *ci_gdt; 187 188 #ifdef i386 189 struct i386tss ci_doubleflt_tss; 190 struct i386tss ci_ddbipi_tss; 191 #endif 192 193 #ifdef PAE 194 uint32_t ci_pae_l3_pdirpa; /* PA of L3 PD */ 195 pd_entry_t * ci_pae_l3_pdir; /* VA pointer to L3 PD */ 196 #endif 197 198 #if defined(XEN) && (defined(PAE) || defined(__x86_64__)) 199 /* Currently active user PGD (can't use rcr3() with Xen) */ 200 pd_entry_t * ci_kpm_pdir; /* per-cpu PMD (va) */ 201 paddr_t ci_kpm_pdirpa; /* per-cpu PMD (pa) */ 202 kmutex_t ci_kpm_mtx; 203 #if defined(__x86_64__) 204 /* per-cpu version of normal_pdes */ 205 pd_entry_t * ci_normal_pdes[3]; /* Ok to hardcode. only for x86_64 && XEN */ 206 paddr_t ci_xen_current_user_pgd; 207 #endif /* __x86_64__ */ 208 #endif /* XEN et.al */ 209 210 char *ci_doubleflt_stack; 211 char *ci_ddbipi_stack; 212 213 #ifndef XEN 214 struct evcnt ci_ipi_events[X86_NIPI]; 215 #else /* XEN */ 216 struct evcnt ci_ipi_events[XEN_NIPIS]; 217 evtchn_port_t ci_ipi_evtchn; 218 #endif /* XEN */ 219 220 device_t ci_frequency; /* Frequency scaling technology */ 221 device_t ci_padlock; /* VIA PadLock private storage */ 222 device_t ci_temperature; /* Intel coretemp(4) or equivalent */ 223 device_t ci_vm; /* Virtual machine guest driver */ 224 225 struct i386tss ci_tss; /* Per-cpu TSS; shared among LWPs */ 226 char ci_iomap[IOMAPSIZE]; /* I/O Bitmap */ 227 int ci_tss_sel; /* TSS selector of this cpu */ 228 229 /* 230 * The following two are actually region_descriptors, 231 * but that would pollute the namespace. 232 */ 233 uintptr_t ci_suspend_gdt; 234 uint16_t ci_suspend_gdt_padding; 235 uintptr_t ci_suspend_idt; 236 uint16_t ci_suspend_idt_padding; 237 238 uint16_t ci_suspend_tr; 239 uint16_t ci_suspend_ldt; 240 uintptr_t ci_suspend_fs; 241 uintptr_t ci_suspend_gs; 242 uintptr_t ci_suspend_kgs; 243 uintptr_t ci_suspend_efer; 244 uintptr_t ci_suspend_reg[12]; 245 uintptr_t ci_suspend_cr0; 246 uintptr_t ci_suspend_cr2; 247 uintptr_t ci_suspend_cr3; 248 uintptr_t ci_suspend_cr4; 249 uintptr_t ci_suspend_cr8; 250 251 /* The following must be in a single cache line. */ 252 int ci_want_resched __aligned(64); 253 int ci_padout __aligned(64); 254 }; 255 256 /* 257 * Macros to handle (some) trapframe registers for common x86 code. 258 */ 259 #ifdef __x86_64__ 260 #define X86_TF_RAX(tf) tf->tf_rax 261 #define X86_TF_RDX(tf) tf->tf_rdx 262 #define X86_TF_RSP(tf) tf->tf_rsp 263 #define X86_TF_RIP(tf) tf->tf_rip 264 #define X86_TF_RFLAGS(tf) tf->tf_rflags 265 #else 266 #define X86_TF_RAX(tf) tf->tf_eax 267 #define X86_TF_RDX(tf) tf->tf_edx 268 #define X86_TF_RSP(tf) tf->tf_esp 269 #define X86_TF_RIP(tf) tf->tf_eip 270 #define X86_TF_RFLAGS(tf) tf->tf_eflags 271 #endif 272 273 /* 274 * Processor flag notes: The "primary" CPU has certain MI-defined 275 * roles (mostly relating to hardclock handling); we distinguish 276 * betwen the processor which booted us, and the processor currently 277 * holding the "primary" role just to give us the flexibility later to 278 * change primaries should we be sufficiently twisted. 279 */ 280 281 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 282 #define CPUF_AP 0x0002 /* CPU is an AP */ 283 #define CPUF_SP 0x0004 /* CPU is only processor */ 284 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 285 286 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 287 #define CPUF_PRESENT 0x1000 /* CPU is present */ 288 #define CPUF_RUNNING 0x2000 /* CPU is running */ 289 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 290 #define CPUF_GO 0x8000 /* CPU should start running */ 291 292 #endif /* _KERNEL || __KMEMUSER */ 293 294 #ifdef _KERNEL 295 /* 296 * We statically allocate the CPU info for the primary CPU (or, 297 * the only CPU on uniprocessors), and the primary CPU is the 298 * first CPU on the CPU info list. 299 */ 300 extern struct cpu_info cpu_info_primary; 301 extern struct cpu_info *cpu_info_list; 302 303 #define CPU_INFO_ITERATOR int __unused 304 #define CPU_INFO_FOREACH(cii, ci) ci = cpu_info_list; \ 305 ci != NULL; ci = ci->ci_next 306 307 #define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target)) 308 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 309 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 310 311 #if !defined(__GNUC__) || defined(_MODULE) 312 /* For non-GCC and modules */ 313 struct cpu_info *x86_curcpu(void); 314 void cpu_set_curpri(int); 315 # ifdef __GNUC__ 316 lwp_t *x86_curlwp(void) __attribute__ ((const)); 317 # else 318 lwp_t *x86_curlwp(void); 319 # endif 320 #endif 321 322 #define cpu_number() (cpu_index(curcpu())) 323 324 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 325 326 #define X86_AST_GENERIC 0x01 327 #define X86_AST_PREEMPT 0x02 328 329 #define aston(l, why) ((l)->l_md.md_astpending |= (why)) 330 #define cpu_did_resched(l) ((l)->l_md.md_astpending &= ~X86_AST_PREEMPT) 331 332 void cpu_boot_secondary_processors(void); 333 void cpu_init_idle_lwps(void); 334 void cpu_init_msrs(struct cpu_info *, bool); 335 void cpu_load_pmap(struct pmap *, struct pmap *); 336 void cpu_broadcast_halt(void); 337 void cpu_kick(struct cpu_info *); 338 339 #define curcpu() x86_curcpu() 340 #define curlwp x86_curlwp() 341 #define curpcb ((struct pcb *)lwp_getpcb(curlwp)) 342 343 /* 344 * Arguments to hardclock, softclock and statclock 345 * encapsulate the previous machine state in an opaque 346 * clockframe; for now, use generic intrframe. 347 */ 348 struct clockframe { 349 struct intrframe cf_if; 350 }; 351 352 /* 353 * Give a profiling tick to the current process when the user profiling 354 * buffer pages are invalid. On the i386, request an ast to send us 355 * through trap(), marking the proc as needing a profiling tick. 356 */ 357 extern void cpu_need_proftick(struct lwp *l); 358 359 /* 360 * Notify the LWP l that it has a signal pending, process as soon as 361 * possible. 362 */ 363 extern void cpu_signotify(struct lwp *); 364 365 /* 366 * We need a machine-independent name for this. 367 */ 368 extern void (*delay_func)(unsigned int); 369 struct timeval; 370 371 #define DELAY(x) (*delay_func)(x) 372 #define delay(x) (*delay_func)(x) 373 374 extern int biosbasemem; 375 extern int biosextmem; 376 extern int cputype; 377 extern int cpuid_level; 378 extern int cpu_class; 379 extern char cpu_brand_string[]; 380 extern int use_pae; 381 382 #ifdef __i386__ 383 extern int i386_fpu_present; 384 int npx586bug1(int, int); 385 extern int i386_fpu_fdivbug; 386 extern int i386_use_fxsave; 387 extern int i386_has_sse; 388 extern int i386_has_sse2; 389 #else 390 #define i386_fpu_present 1 391 #define i386_fpu_fdivbug 0 392 #define i386_use_fxsave 1 393 #define i386_has_sse 1 394 #define i386_has_sse2 1 395 #endif 396 397 extern int x86_fpu_save; 398 #define FPU_SAVE_FSAVE 0 399 #define FPU_SAVE_FXSAVE 1 400 #define FPU_SAVE_XSAVE 2 401 #define FPU_SAVE_XSAVEOPT 3 402 extern unsigned int x86_fpu_save_size; 403 extern uint64_t x86_xsave_features; 404 405 extern void (*x86_cpu_idle)(void); 406 #define cpu_idle() (*x86_cpu_idle)() 407 408 /* machdep.c */ 409 void dumpconf(void); 410 void cpu_reset(void); 411 void i386_proc0_tss_ldt_init(void); 412 void dumpconf(void); 413 void cpu_reset(void); 414 void x86_64_proc0_tss_ldt_init(void); 415 void x86_64_init_pcb_tss_ldt(struct cpu_info *); 416 417 /* longrun.c */ 418 u_int tmx86_get_longrun_mode(void); 419 void tmx86_get_longrun_status(u_int *, u_int *, u_int *); 420 void tmx86_init_longrun(void); 421 422 /* identcpu.c */ 423 void cpu_probe(struct cpu_info *); 424 void cpu_identify(struct cpu_info *); 425 void identify_hypervisor(void); 426 427 typedef enum vm_guest { 428 VM_GUEST_NO = 0, 429 VM_GUEST_VM, 430 VM_GUEST_XEN, 431 VM_GUEST_HV, 432 VM_GUEST_VMWARE, 433 VM_GUEST_KVM, 434 VM_LAST 435 } vm_guest_t; 436 extern vm_guest_t vm_guest; 437 438 /* cpu_topology.c */ 439 void x86_cpu_topology(struct cpu_info *); 440 441 /* vm_machdep.c */ 442 void cpu_proc_fork(struct proc *, struct proc *); 443 444 /* locore.s */ 445 struct region_descriptor; 446 void lgdt(struct region_descriptor *); 447 #ifdef XEN 448 void lgdt_finish(void); 449 #endif 450 451 struct pcb; 452 void savectx(struct pcb *); 453 void lwp_trampoline(void); 454 #ifdef XEN 455 void startrtclock(void); 456 void xen_delay(unsigned int); 457 void xen_initclocks(void); 458 void xen_suspendclocks(struct cpu_info *); 459 void xen_resumeclocks(struct cpu_info *); 460 #else 461 /* clock.c */ 462 void initrtclock(u_long); 463 void startrtclock(void); 464 void i8254_delay(unsigned int); 465 void i8254_microtime(struct timeval *); 466 void i8254_initclocks(void); 467 #endif 468 469 /* cpu.c */ 470 471 void cpu_probe_features(struct cpu_info *); 472 473 /* vm_machdep.c */ 474 paddr_t kvtop(void *); 475 476 #ifdef USER_LDT 477 /* sys_machdep.h */ 478 int x86_get_ldt(struct lwp *, void *, register_t *); 479 int x86_set_ldt(struct lwp *, void *, register_t *); 480 #endif 481 482 /* isa_machdep.c */ 483 void isa_defaultirq(void); 484 int isa_nmi(void); 485 486 #ifdef VM86 487 /* vm86.c */ 488 void vm86_gpfault(struct lwp *, int); 489 #endif /* VM86 */ 490 491 /* consinit.c */ 492 void kgdb_port_init(void); 493 494 /* bus_machdep.c */ 495 void x86_bus_space_init(void); 496 void x86_bus_space_mallocok(void); 497 498 #endif /* _KERNEL */ 499 500 #if defined(_KERNEL) || defined(_KMEMUSER) 501 #include <machine/psl.h> /* Must be after struct cpu_info declaration */ 502 #endif /* _KERNEL || __KMEMUSER */ 503 504 /* 505 * CTL_MACHDEP definitions. 506 */ 507 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 508 #define CPU_BIOSBASEMEM 2 /* int: bios-reported base mem (K) */ 509 #define CPU_BIOSEXTMEM 3 /* int: bios-reported ext. mem (K) */ 510 /* CPU_NKPDE 4 obsolete: int: number of kernel PDEs */ 511 #define CPU_BOOTED_KERNEL 5 /* string: booted kernel name */ 512 #define CPU_DISKINFO 6 /* struct disklist *: 513 * disk geometry information */ 514 #define CPU_FPU_PRESENT 7 /* int: FPU is present */ 515 #define CPU_OSFXSR 8 /* int: OS uses FXSAVE/FXRSTOR */ 516 #define CPU_SSE 9 /* int: OS/CPU supports SSE */ 517 #define CPU_SSE2 10 /* int: OS/CPU supports SSE2 */ 518 #define CPU_TMLR_MODE 11 /* int: longrun mode 519 * 0: minimum frequency 520 * 1: economy 521 * 2: performance 522 * 3: maximum frequency 523 */ 524 #define CPU_TMLR_FREQUENCY 12 /* int: current frequency */ 525 #define CPU_TMLR_VOLTAGE 13 /* int: curret voltage */ 526 #define CPU_TMLR_PERCENTAGE 14 /* int: current clock percentage */ 527 #define CPU_FPU_SAVE 15 /* int: FPU Instructions layout 528 * to use this, CPU_OSFXSR must be true 529 * 0: FSAVE 530 * 1: FXSAVE 531 * 2: XSAVE 532 * 3: XSAVEOPT 533 */ 534 #define CPU_FPU_SAVE_SIZE 16 /* int: FPU Instruction layout size */ 535 #define CPU_XSAVE_FEATURES 17 /* quad: XSAVE features */ 536 537 #define CPU_MAXID 18 /* number of valid machdep ids */ 538 539 /* 540 * Structure for CPU_DISKINFO sysctl call. 541 * XXX this should be somewhere else. 542 */ 543 #define MAX_BIOSDISKS 16 544 545 struct disklist { 546 int dl_nbiosdisks; /* number of bios disks */ 547 struct biosdisk_info { 548 int bi_dev; /* BIOS device # (0x80 ..) */ 549 int bi_cyl; /* cylinders on disk */ 550 int bi_head; /* heads per track */ 551 int bi_sec; /* sectors per track */ 552 uint64_t bi_lbasecs; /* total sec. (iff ext13) */ 553 #define BIFLAG_INVALID 0x01 554 #define BIFLAG_EXTINT13 0x02 555 int bi_flags; 556 } dl_biosdisks[MAX_BIOSDISKS]; 557 558 int dl_nnativedisks; /* number of native disks */ 559 struct nativedisk_info { 560 char ni_devname[16]; /* native device name */ 561 int ni_nmatches; /* # of matches w/ BIOS */ 562 int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */ 563 } dl_nativedisks[1]; /* actually longer */ 564 }; 565 #endif /* !_X86_CPU_H_ */ 566
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